blob: abb064ad01374bd30c630d254045f6ff2632789b [file] [log] [blame]
wdenk11a72d92002-10-27 22:25:25 +00001/*
2 * (C) Copyright 2002
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 *
6 * (C) Copyright 2002
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Alex Zuepke <azu@sysgo.de>
9 *
10 * See file CREDITS for list of people who contributed to this
11 * project.
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * MA 02111-1307 USA
27 */
28
29/*
30 * CPU specific code
31 */
32
33#include <common.h>
34#include <command.h>
wdenk71f95112003-06-15 22:40:42 +000035#include <asm/arch/pxa-regs.h>
wdenk11a72d92002-10-27 22:25:25 +000036
37int cpu_init (void)
38{
39 /*
wdenka8c7c702003-12-06 19:49:23 +000040 * setup up stacks if necessary
wdenk11a72d92002-10-27 22:25:25 +000041 */
wdenk11a72d92002-10-27 22:25:25 +000042#ifdef CONFIG_USE_IRQ
wdenka8c7c702003-12-06 19:49:23 +000043 DECLARE_GLOBAL_DATA_PTR;
44
wdenkf6e20fc2004-02-08 19:38:38 +000045 IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4;
wdenka8c7c702003-12-06 19:49:23 +000046 FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
wdenk11a72d92002-10-27 22:25:25 +000047#endif
wdenka8c7c702003-12-06 19:49:23 +000048 return 0;
wdenk11a72d92002-10-27 22:25:25 +000049}
50
51int cleanup_before_linux (void)
52{
53 /*
54 * this function is called just before we call linux
55 * it prepares the processor for linux
56 *
57 * just disable everything that can disturb booting linux
58 */
59
60 unsigned long i;
61
62 disable_interrupts ();
63
64 /* turn off I-cache */
65 asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
66 i &= ~0x1000;
67 asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
68
69 /* flush I-cache */
70 asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
71
72 return (0);
73}
74
75int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
76{
77 extern void reset_cpu (ulong addr);
78
wdenk5f535fe2003-09-18 09:21:33 +000079 printf ("resetting ...\n");
wdenk11a72d92002-10-27 22:25:25 +000080
81 udelay (50000); /* wait 50 ms */
82 disable_interrupts ();
83 reset_cpu (0);
84
85 /*NOTREACHED*/
86 return (0);
87}
88
89/* taken from blob */
90void icache_enable (void)
91{
92 register u32 i;
93
94 /* read control register */
95 asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
96
97 /* set i-cache */
98 i |= 0x1000;
99
100 /* write back to control register */
101 asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
102}
103
104void icache_disable (void)
105{
106 register u32 i;
107
108 /* read control register */
109 asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
110
111 /* clear i-cache */
112 i &= ~0x1000;
113
114 /* write back to control register */
115 asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
116
117 /* flush i-cache */
118 asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
119}
120
121int icache_status (void)
122{
123 register u32 i;
124
125 /* read control register */
126 asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
127
128 /* return bit */
129 return (i & 0x1000);
130}
131
132/* we will never enable dcache, because we have to setup MMU first */
133void dcache_enable (void)
134{
135 return;
136}
137
138void dcache_disable (void)
139{
140 return;
141}
142
143int dcache_status (void)
144{
145 return 0; /* always off */
146}
wdenk71f95112003-06-15 22:40:42 +0000147
148void set_GPIO_mode(int gpio_mode)
149{
150 int gpio = gpio_mode & GPIO_MD_MASK_NR;
151 int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8;
152 int gafr;
153
154 if (gpio_mode & GPIO_MD_MASK_DIR)
155 {
156 GPDR(gpio) |= GPIO_bit(gpio);
157 }
158 else
159 {
160 GPDR(gpio) &= ~GPIO_bit(gpio);
161 }
162 gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2));
163 GAFR(gpio) = gafr | (fn << (((gpio) & 0xf)*2));
164}