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Haavard Skinnemoenfc26c972006-01-20 10:03:53 +01001/*
2 * Copyright (C) 2005-2006 Atmel Corporation
3 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Haavard Skinnemoenfc26c972006-01-20 10:03:53 +01005 */
Sven Schnelle72fa4672011-10-21 14:49:25 +02006#ifndef __ATMEL_MCI_H__
7#define __ATMEL_MCI_H__
8
9int atmel_mci_init(void *regs);
Haavard Skinnemoenfc26c972006-01-20 10:03:53 +010010
Reinhard Meyer1592ef82010-08-13 10:31:06 +020011#ifndef __ASSEMBLY__
12
13/*
14 * Structure for struct SoC access.
15 * Names starting with '_' are fillers.
16 */
17typedef struct atmel_mci {
18 /* reg Offset */
19 u32 cr; /* 0x00 */
20 u32 mr; /* 0x04 */
21 u32 dtor; /* 0x08 */
22 u32 sdcr; /* 0x0c */
23 u32 argr; /* 0x10 */
24 u32 cmdr; /* 0x14 */
Wu, Josh1db73772012-09-13 22:22:04 +000025 u32 blkr; /* 0x18 */
Reinhard Meyer1592ef82010-08-13 10:31:06 +020026 u32 _1c; /* 0x1c */
27 u32 rspr; /* 0x20 */
28 u32 rspr1; /* 0x24 */
29 u32 rspr2; /* 0x28 */
30 u32 rspr3; /* 0x2c */
31 u32 rdr; /* 0x30 */
32 u32 tdr; /* 0x34 */
33 u32 _38; /* 0x38 */
34 u32 _3c; /* 0x3c */
35 u32 sr; /* 0x40 */
36 u32 ier; /* 0x44 */
37 u32 idr; /* 0x48 */
38 u32 imr; /* 0x4c */
Bo Shen70ec3282014-07-31 14:39:31 +080039 u32 dma; /* 0x50 */
40 u32 cfg; /* 0x54 */
41 u32 reserved[41];
Bo Shenaac4b692013-04-26 00:27:06 +000042 u32 version;
Reinhard Meyer1592ef82010-08-13 10:31:06 +020043} atmel_mci_t;
44
45#endif /* __ASSEMBLY__ */
46
Haavard Skinnemoenfc26c972006-01-20 10:03:53 +010047/* Bitfields in CR */
48#define MMCI_MCIEN_OFFSET 0
49#define MMCI_MCIEN_SIZE 1
50#define MMCI_MCIDIS_OFFSET 1
51#define MMCI_MCIDIS_SIZE 1
52#define MMCI_PWSEN_OFFSET 2
53#define MMCI_PWSEN_SIZE 1
54#define MMCI_PWSDIS_OFFSET 3
55#define MMCI_PWSDIS_SIZE 1
56#define MMCI_SWRST_OFFSET 7
57#define MMCI_SWRST_SIZE 1
58
59/* Bitfields in MR */
60#define MMCI_CLKDIV_OFFSET 0
61#define MMCI_CLKDIV_SIZE 8
62#define MMCI_PWSDIV_OFFSET 8
63#define MMCI_PWSDIV_SIZE 3
Haavard Skinnemoenf0d12462007-06-27 13:34:26 +020064#define MMCI_RDPROOF_OFFSET 11
65#define MMCI_RDPROOF_SIZE 1
66#define MMCI_WRPROOF_OFFSET 12
67#define MMCI_WRPROOF_SIZE 1
Haavard Skinnemoenfc26c972006-01-20 10:03:53 +010068#define MMCI_PDCPADV_OFFSET 14
69#define MMCI_PDCPADV_SIZE 1
70#define MMCI_PDCMODE_OFFSET 15
71#define MMCI_PDCMODE_SIZE 1
Bo Shencd60ebd42014-07-31 14:39:30 +080072/* MCI IP version >= 0x500, MR bit 16 used for CLKODD */
73#define MMCI_CLKODD_OFFSET 16
74#define MMCI_CLKODD_SIZE 1
75/* MCI IP version < 0x200, MR higher 16bits for BLKLEN */
Haavard Skinnemoenfc26c972006-01-20 10:03:53 +010076#define MMCI_BLKLEN_OFFSET 16
77#define MMCI_BLKLEN_SIZE 16
78
79/* Bitfields in DTOR */
80#define MMCI_DTOCYC_OFFSET 0
81#define MMCI_DTOCYC_SIZE 4
82#define MMCI_DTOMUL_OFFSET 4
83#define MMCI_DTOMUL_SIZE 3
84
85/* Bitfields in SDCR */
86#define MMCI_SCDSEL_OFFSET 0
87#define MMCI_SCDSEL_SIZE 4
88#define MMCI_SCDBUS_OFFSET 7
89#define MMCI_SCDBUS_SIZE 1
90
91/* Bitfields in ARGR */
92#define MMCI_ARG_OFFSET 0
93#define MMCI_ARG_SIZE 32
94
95/* Bitfields in CMDR */
96#define MMCI_CMDNB_OFFSET 0
97#define MMCI_CMDNB_SIZE 6
98#define MMCI_RSPTYP_OFFSET 6
99#define MMCI_RSPTYP_SIZE 2
100#define MMCI_SPCMD_OFFSET 8
101#define MMCI_SPCMD_SIZE 3
102#define MMCI_OPDCMD_OFFSET 11
103#define MMCI_OPDCMD_SIZE 1
104#define MMCI_MAXLAT_OFFSET 12
105#define MMCI_MAXLAT_SIZE 1
106#define MMCI_TRCMD_OFFSET 16
107#define MMCI_TRCMD_SIZE 2
108#define MMCI_TRDIR_OFFSET 18
109#define MMCI_TRDIR_SIZE 1
110#define MMCI_TRTYP_OFFSET 19
111#define MMCI_TRTYP_SIZE 2
112
Wu, Josh1db73772012-09-13 22:22:04 +0000113/* Bitfields in BLKR */
114/* MMCI_BLKLEN_OFFSET/SIZE already defined in MR */
115#define MMCI_BCNT_OFFSET 0
116#define MMCI_BCNT_SIZE 16
117
Haavard Skinnemoenfc26c972006-01-20 10:03:53 +0100118/* Bitfields in RSPRx */
119#define MMCI_RSP_OFFSET 0
120#define MMCI_RSP_SIZE 32
121
122/* Bitfields in SR/IER/IDR/IMR */
123#define MMCI_CMDRDY_OFFSET 0
124#define MMCI_CMDRDY_SIZE 1
125#define MMCI_RXRDY_OFFSET 1
126#define MMCI_RXRDY_SIZE 1
127#define MMCI_TXRDY_OFFSET 2
128#define MMCI_TXRDY_SIZE 1
129#define MMCI_BLKE_OFFSET 3
130#define MMCI_BLKE_SIZE 1
131#define MMCI_DTIP_OFFSET 4
132#define MMCI_DTIP_SIZE 1
133#define MMCI_NOTBUSY_OFFSET 5
134#define MMCI_NOTBUSY_SIZE 1
135#define MMCI_ENDRX_OFFSET 6
136#define MMCI_ENDRX_SIZE 1
137#define MMCI_ENDTX_OFFSET 7
138#define MMCI_ENDTX_SIZE 1
139#define MMCI_RXBUFF_OFFSET 14
140#define MMCI_RXBUFF_SIZE 1
141#define MMCI_TXBUFE_OFFSET 15
142#define MMCI_TXBUFE_SIZE 1
143#define MMCI_RINDE_OFFSET 16
144#define MMCI_RINDE_SIZE 1
145#define MMCI_RDIRE_OFFSET 17
146#define MMCI_RDIRE_SIZE 1
147#define MMCI_RCRCE_OFFSET 18
148#define MMCI_RCRCE_SIZE 1
149#define MMCI_RENDE_OFFSET 19
150#define MMCI_RENDE_SIZE 1
151#define MMCI_RTOE_OFFSET 20
152#define MMCI_RTOE_SIZE 1
153#define MMCI_DCRCE_OFFSET 21
154#define MMCI_DCRCE_SIZE 1
155#define MMCI_DTOE_OFFSET 22
156#define MMCI_DTOE_SIZE 1
157#define MMCI_OVRE_OFFSET 30
158#define MMCI_OVRE_SIZE 1
159#define MMCI_UNRE_OFFSET 31
160#define MMCI_UNRE_SIZE 1
161
162/* Constants for DTOMUL */
163#define MMCI_DTOMUL_1_CYCLE 0
164#define MMCI_DTOMUL_16_CYCLES 1
165#define MMCI_DTOMUL_128_CYCLES 2
166#define MMCI_DTOMUL_256_CYCLES 3
167#define MMCI_DTOMUL_1024_CYCLES 4
168#define MMCI_DTOMUL_4096_CYCLES 5
169#define MMCI_DTOMUL_65536_CYCLES 6
170#define MMCI_DTOMUL_1048576_CYCLES 7
171
172/* Constants for RSPTYP */
173#define MMCI_RSPTYP_NO_RESP 0
174#define MMCI_RSPTYP_48_BIT_RESP 1
175#define MMCI_RSPTYP_136_BIT_RESP 2
176
177/* Constants for SPCMD */
178#define MMCI_SPCMD_NO_SPEC_CMD 0
179#define MMCI_SPCMD_INIT_CMD 1
180#define MMCI_SPCMD_SYNC_CMD 2
181#define MMCI_SPCMD_INT_CMD 4
182#define MMCI_SPCMD_INT_RESP 5
183
184/* Constants for TRCMD */
185#define MMCI_TRCMD_NO_TRANS 0
186#define MMCI_TRCMD_START_TRANS 1
187#define MMCI_TRCMD_STOP_TRANS 2
188
189/* Constants for TRTYP */
190#define MMCI_TRTYP_BLOCK 0
191#define MMCI_TRTYP_MULTI_BLOCK 1
192#define MMCI_TRTYP_STREAM 2
193
Bo Shen70ec3282014-07-31 14:39:31 +0800194/* Bitfields in CFG */
195#define MMCI_FIFOMODE_OFFSET 0
196#define MMCI_FIFOMODE_SIZE 1
197#define MMCI_FERRCTRL_OFFSET 4
198#define MMCI_FERRCTRL_SIZE 1
199#define MMCI_HSMODE_OFFSET 8
200#define MMCI_HSMODE_SIZE 1
201#define MMCI_LSYNC_OFFSET 12
202#define MMCI_LSYNC_SIZE 1
203
Haavard Skinnemoenfc26c972006-01-20 10:03:53 +0100204/* Bit manipulation macros */
205#define MMCI_BIT(name) \
206 (1 << MMCI_##name##_OFFSET)
207#define MMCI_BF(name,value) \
208 (((value) & ((1 << MMCI_##name##_SIZE) - 1)) \
209 << MMCI_##name##_OFFSET)
210#define MMCI_BFEXT(name,value) \
211 (((value) >> MMCI_##name##_OFFSET)\
212 & ((1 << MMCI_##name##_SIZE) - 1))
213#define MMCI_BFINS(name,value,old) \
214 (((old) & ~(((1 << MMCI_##name##_SIZE) - 1) \
215 << MMCI_##name##_OFFSET)) \
216 | MMCI_BF(name,value))
217
Sven Schnelle72fa4672011-10-21 14:49:25 +0200218#endif /* __ATMEL_MCI_H__ */