Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/clock/qcom,a7pll.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Qualcomm A7 PLL clock |
| 8 | |
| 9 | maintainers: |
| 10 | - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> |
| 11 | |
| 12 | description: |
| 13 | The A7 PLL on the Qualcomm platforms like SDX55, SDX65 is used to provide high |
| 14 | frequency clock to the CPU. |
| 15 | |
| 16 | properties: |
| 17 | compatible: |
| 18 | enum: |
| 19 | - qcom,sdx55-a7pll |
| 20 | |
| 21 | reg: |
| 22 | maxItems: 1 |
| 23 | |
| 24 | '#clock-cells': |
| 25 | const: 0 |
| 26 | |
| 27 | clocks: |
| 28 | items: |
| 29 | - description: board XO clock |
| 30 | |
| 31 | clock-names: |
| 32 | items: |
| 33 | - const: bi_tcxo |
| 34 | |
| 35 | required: |
| 36 | - compatible |
| 37 | - reg |
| 38 | - '#clock-cells' |
| 39 | |
| 40 | additionalProperties: false |
| 41 | |
| 42 | examples: |
| 43 | - | |
| 44 | #include <dt-bindings/clock/qcom,rpmh.h> |
| 45 | a7pll: clock@17808000 { |
| 46 | compatible = "qcom,sdx55-a7pll"; |
| 47 | reg = <0x17808000 0x1000>; |
| 48 | clocks = <&rpmhcc RPMH_CXO_CLK>; |
| 49 | clock-names = "bi_tcxo"; |
| 50 | #clock-cells = <0>; |
| 51 | }; |