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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / f732b8747fe767ec46ef44abbe3f49fbd9e96423 / . / dts / upstream / Bindings / phy / qcom,sc8280xp-qmp-usb3-uni-phy.yaml
blob: 57702f7f2a46cf54bcf6f660704144780faee8f7 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm QMP PHY controller (USB, SC8280XP)
8
9maintainers:
10 - Vinod Koul <vkoul@kernel.org>
11
12description:
13 The QMP PHY controller supports physical layer functionality for a number of
14 controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
15
16properties:
17 compatible:
18 enum:
19 - qcom,ipq6018-qmp-usb3-phy
20 - qcom,ipq8074-qmp-usb3-phy
21 - qcom,ipq9574-qmp-usb3-phy
22 - qcom,msm8996-qmp-usb3-phy
23 - qcom,msm8998-qmp-usb3-phy
24 - qcom,qcm2290-qmp-usb3-phy
25 - qcom,sa8775p-qmp-usb3-uni-phy
26 - qcom,sc8280xp-qmp-usb3-uni-phy
27 - qcom,sdm845-qmp-usb3-uni-phy
28 - qcom,sdx55-qmp-usb3-uni-phy
29 - qcom,sdx65-qmp-usb3-uni-phy
30 - qcom,sdx75-qmp-usb3-uni-phy
31 - qcom,sm6115-qmp-usb3-phy
32 - qcom,sm8150-qmp-usb3-uni-phy
33 - qcom,sm8250-qmp-usb3-uni-phy
34 - qcom,sm8350-qmp-usb3-uni-phy
35
36
37 reg:
38 maxItems: 1
39
40 clocks:
41 minItems: 4
42 maxItems: 5
43
44 clock-names:
45 minItems: 4
46 maxItems: 5
47
48 power-domains:
49 maxItems: 1
50
51 resets:
52 maxItems: 2
53
54 reset-names:
55 items:
56 - const: phy
57 - const: phy_phy
58
59 vdda-phy-supply: true
60
61 vdda-pll-supply: true
62
63 "#clock-cells":
64 const: 0
65
66 clock-output-names:
67 maxItems: 1
68
69 "#phy-cells":
70 const: 0
71
72required:
73 - compatible
74 - reg
75 - clocks
76 - clock-names
77 - resets
78 - reset-names
79 - vdda-phy-supply
80 - vdda-pll-supply
81 - "#clock-cells"
82 - clock-output-names
83 - "#phy-cells"
84
85allOf:
86 - if:
87 properties:
88 compatible:
89 contains:
90 enum:
91 - qcom,ipq6018-qmp-usb3-phy
92 - qcom,ipq8074-qmp-usb3-phy
93 - qcom,ipq9574-qmp-usb3-phy
94 - qcom,msm8996-qmp-usb3-phy
95 - qcom,msm8998-qmp-usb3-phy
96 - qcom,sdx55-qmp-usb3-uni-phy
97 - qcom,sdx65-qmp-usb3-uni-phy
98 - qcom,sdx75-qmp-usb3-uni-phy
99 then:
100 properties:
101 clocks:
102 maxItems: 4
103 clock-names:
104 items:
105 - const: aux
106 - const: ref
107 - const: cfg_ahb
108 - const: pipe
109
110 - if:
111 properties:
112 compatible:
113 contains:
114 enum:
115 - qcom,qcm2290-qmp-usb3-phy
116 - qcom,sm6115-qmp-usb3-phy
117 then:
118 properties:
119 clocks:
120 maxItems: 4
121 clock-names:
122 items:
123 - const: cfg_ahb
124 - const: ref
125 - const: com_aux
126 - const: pipe
127
128 - if:
129 properties:
130 compatible:
131 contains:
132 enum:
133 - qcom,sa8775p-qmp-usb3-uni-phy
134 - qcom,sc8280xp-qmp-usb3-uni-phy
135 - qcom,sm8150-qmp-usb3-uni-phy
136 - qcom,sm8250-qmp-usb3-uni-phy
137 - qcom,sm8350-qmp-usb3-uni-phy
138 then:
139 properties:
140 clocks:
141 maxItems: 4
142 clock-names:
143 items:
144 - const: aux
145 - const: ref
146 - const: com_aux
147 - const: pipe
148
149 - if:
150 properties:
151 compatible:
152 contains:
153 enum:
154 - qcom,sdm845-qmp-usb3-uni-phy
155 then:
156 properties:
157 clocks:
158 maxItems: 5
159 clock-names:
160 items:
161 - const: aux
162 - const: cfg_ahb
163 - const: ref
164 - const: com_aux
165 - const: pipe
166
167 - if:
168 properties:
169 compatible:
170 contains:
171 enum:
172 - qcom,sa8775p-qmp-usb3-uni-phy
173 - qcom,sc8280xp-qmp-usb3-uni-phy
174 then:
175 required:
176 - power-domains
177
178additionalProperties: false
179
180examples:
181 - |
182 #include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
183 #include <dt-bindings/clock/qcom,rpmh.h>
184
185 phy@88ef000 {
186 compatible = "qcom,sc8280xp-qmp-usb3-uni-phy";
187 reg = <0x088ef000 0x2000>;
188
189 clocks = <&gcc GCC_USB3_MP_PHY_AUX_CLK>,
190 <&gcc GCC_USB3_MP0_CLKREF_CLK>,
191 <&gcc GCC_USB3_MP_PHY_COM_AUX_CLK>,
192 <&gcc GCC_USB3_MP_PHY_PIPE_0_CLK>;
193 clock-names = "aux", "ref", "com_aux", "pipe";
194
195 power-domains = <&gcc USB30_MP_GDSC>;
196
197 resets = <&gcc GCC_USB3_UNIPHY_MP0_BCR>,
198 <&gcc GCC_USB3UNIPHY_PHY_MP0_BCR>;
199 reset-names = "phy", "phy_phy";
200
201 vdda-phy-supply = <&vreg_l3a>;
202 vdda-pll-supply = <&vreg_l5a>;
203
204 #clock-cells = <0>;
205 clock-output-names = "usb2_phy0_pipe_clk";
206
207 #phy-cells = <0>;
208 };