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Stefan Agner31b1e172018-05-30 19:01:48 +02001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
Marcel Ziswiler535800d2019-04-09 17:24:15 +02003 * Copyright 2018-2019 Toradex AG
Stefan Agner31b1e172018-05-30 19:01:48 +02004 *
5 * Configuration settings for the Colibri iMX6ULL module.
6 *
7 * based on colibri_imx7.h
8 */
9
10#ifndef __COLIBRI_IMX6ULL_CONFIG_H
11#define __COLIBRI_IMX6ULL_CONFIG_H
12
13#include "mx6_common.h"
14#define CONFIG_IOMUX_LPSR
15
Stefan Agner31b1e172018-05-30 19:01:48 +020016#define PHYS_SDRAM_SIZE SZ_512M
17
18/* Size of malloc() pool */
19#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
20
21/* Network */
Stefan Agner31b1e172018-05-30 19:01:48 +020022#define CONFIG_TFTP_TSIZE
23
24/* ENET1 */
25#define IMX_FEC_BASE ENET2_BASE_ADDR
26
Marcel Ziswiler535800d2019-04-09 17:24:15 +020027/* MMC Config */
Stefan Agner31b1e172018-05-30 19:01:48 +020028#define CONFIG_SYS_FSL_ESDHC_ADDR 0
29#define CONFIG_SYS_FSL_USDHC_NUM 1
30
Stefan Agner31b1e172018-05-30 19:01:48 +020031/* I2C configs */
32#define CONFIG_SYS_I2C_SPEED 100000
33
34#define CONFIG_IPADDR 192.168.10.2
35#define CONFIG_NETMASK 255.255.255.0
36#define CONFIG_SERVERIP 192.168.10.1
37
38#define FDT_FILE "imx6ull-colibri${variant}-${fdt_board}.dtb"
39
40#define MEM_LAYOUT_ENV_SETTINGS \
41 "bootm_size=0x10000000\0" \
Stefan Agnerce303822019-04-09 17:24:10 +020042 "fdt_addr_r=0x82100000\0" \
Stefan Agner31b1e172018-05-30 19:01:48 +020043 "kernel_addr_r=0x81000000\0" \
44 "pxefile_addr_r=0x87100000\0" \
Stefan Agnerce303822019-04-09 17:24:10 +020045 "ramdisk_addr_r=0x82200000\0" \
Stefan Agner31b1e172018-05-30 19:01:48 +020046 "scriptaddr=0x87000000\0"
47
Igor Opaniukba195a92019-12-09 12:33:31 +020048#define UBOOT_UPDATE \
49 "update_uboot=nand erase.part u-boot1 && " \
50 "nand write ${loadaddr} u-boot1 ${filesize} && " \
51 "nand erase.part u-boot2 && " \
52 "nand write ${loadaddr} u-boot2 ${filesize}\0"
53
Stefan Agner31b1e172018-05-30 19:01:48 +020054#define NFS_BOOTCMD \
55 "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \
56 "nfsboot=run setup; " \
57 "setenv bootargs ${defargs} ${nfsargs} " \
58 "${setupargs} ${vidargs}; echo Booting from NFS...;" \
59 "dhcp ${kernel_addr_r} && " \
60 "tftp ${fdt_addr_r} " FDT_FILE " && " \
61 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
62
Stefan Agner31b1e172018-05-30 19:01:48 +020063#define UBI_BOOTCMD \
64 "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rw rootfstype=ubifs " \
65 "ubi.fm_autoconvert=1\0" \
66 "ubiboot=run setup; " \
67 "setenv bootargs ${defargs} ${ubiargs} " \
68 "${setupargs} ${vidargs}; echo Booting from NAND...; " \
69 "ubi part ubi &&" \
70 "ubi read ${kernel_addr_r} kernel && " \
71 "ubi read ${fdt_addr_r} dtb && " \
72 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
73
74#define CONFIG_BOOTCOMMAND "run ubiboot; " \
75 "setenv fdtfile " FDT_FILE " && run distro_bootcmd;"
76
77#define BOOT_TARGET_DEVICES(func) \
78 func(MMC, mmc, 0) \
79 func(USB, usb, 0) \
80 func(DHCP, dhcp, na)
81#include <config_distro_bootcmd.h>
82
83#define DFU_ALT_NAND_INFO "imx6ull-bcb part 0,1;u-boot1 part 0,2;u-boot2 part 0,3;u-boot-env part 0,4;ubi partubi 0,5"
84
85#define CONFIG_EXTRA_ENV_SETTINGS \
86 BOOTENV \
87 MEM_LAYOUT_ENV_SETTINGS \
88 NFS_BOOTCMD \
Stefan Agner31b1e172018-05-30 19:01:48 +020089 UBI_BOOTCMD \
Igor Opaniukba195a92019-12-09 12:33:31 +020090 UBOOT_UPDATE \
Stefan Agner31b1e172018-05-30 19:01:48 +020091 "console=ttymxc0\0" \
92 "defargs=user_debug=30\0" \
93 "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \
94 "fdt_board=eval-v3\0" \
95 "fdt_fixup=;\0" \
96 "ip_dyn=yes\0" \
97 "kernel_file=zImage\0" \
Tom Rinif0306a12018-07-23 10:51:13 -040098 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
Stefan Agner31b1e172018-05-30 19:01:48 +020099 "setethupdate=if env exists ethaddr; then; else setenv ethaddr " \
100 "00:14:2d:00:00:00; fi; tftpboot ${loadaddr} " \
101 "${board}/flash_eth.img && source ${loadaddr}\0" \
102 "setsdupdate=mmc rescan && setenv interface mmc && " \
103 "fatload ${interface} 0:1 ${loadaddr} " \
104 "${board}/flash_blk.img && source ${loadaddr}\0" \
105 "setup=setenv setupargs " \
106 "console=tty1 console=${console}" \
107 ",${baudrate}n8 ${memargs} consoleblank=0\0" \
108 "setupdate=run setsdupdate || run setusbupdate || run setethupdate\0" \
109 "setusbupdate=usb start && setenv interface usb && " \
110 "fatload ${interface} 0:1 ${loadaddr} " \
111 "${board}/flash_blk.img && source ${loadaddr}\0" \
112 "splashpos=m,m\0" \
113 "videomode=video=ctfb:x:640,y:480,depth:18,pclk:39722,le:48,ri:16,up:33,lo:10,hs:96,vs:2,sync:0,vmode:0\0" \
Marcel Ziswiler7c5e4b22019-07-10 09:42:38 +0200114 "vidargs=video=mxsfb:640x480M-16@60"
Stefan Agner31b1e172018-05-30 19:01:48 +0200115
Stefan Agner31b1e172018-05-30 19:01:48 +0200116#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
117
118/* Physical Memory Map */
Stefan Agner31b1e172018-05-30 19:01:48 +0200119#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
120
121#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
122#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
123#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
124
125#define CONFIG_SYS_INIT_SP_OFFSET \
126 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
127#define CONFIG_SYS_INIT_SP_ADDR \
128 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
129
Stefan Agner31b1e172018-05-30 19:01:48 +0200130/* NAND stuff */
131#define CONFIG_SYS_MAX_NAND_DEVICE 1
132/* used to initialize CONFIG_SYS_NAND_BASE_LIST which is unused */
133#define CONFIG_SYS_NAND_BASE -1
134#define CONFIG_SYS_NAND_ONFI_DETECTION
Stefan Agner31b1e172018-05-30 19:01:48 +0200135
Stefan Agner31b1e172018-05-30 19:01:48 +0200136/* USB Configs */
137#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
138
139#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
140#define CONFIG_MXC_USB_FLAGS 0
141#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
142
143#define CONFIG_IMX_THERMAL
144
145#define CONFIG_USBD_HS
146
147/* USB Device Firmware Update support */
148#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M
149#define DFU_DEFAULT_POLL_TIMEOUT 300
150
Igor Opaniuk9de5eb22019-06-19 11:47:08 +0300151#if defined(CONFIG_VIDEO) || defined(CONFIG_DM_VIDEO)
Stefan Agner31b1e172018-05-30 19:01:48 +0200152#define CONFIG_VIDEO_MXS
153#define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR
154#define CONFIG_VIDEO_LOGO
155#define CONFIG_SPLASH_SCREEN
156#define CONFIG_SPLASH_SCREEN_ALIGN
157#define CONFIG_BMP_16BPP
158#define CONFIG_VIDEO_BMP_RLE8
159#define CONFIG_VIDEO_BMP_LOGO
160#endif
161
Marcel Ziswiler535800d2019-04-09 17:24:15 +0200162#endif /* __COLIBRI_IMX6ULL_CONFIG_H */