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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Stefan Roese21b29fc2016-05-25 08:13:45 +02002/*
3 * Copyright (C) 2016 Stefan Roese <sr@denx.de>
Stefan Roese21b29fc2016-05-25 08:13:45 +02004 */
5
6#include <common.h>
7#include <dm.h>
8#include <fdtdec.h>
Simon Glass67c4e9f2019-11-14 12:57:45 -07009#include <init.h>
Simon Glass90526e92020-05-10 11:39:56 -060010#include <asm/cache.h>
Masahiro Yamadab08c8c42018-03-05 01:20:11 +090011#include <linux/libfdt.h>
Baruch Siach2b4d9642018-11-11 12:31:04 +020012#include <linux/sizes.h>
Konstantin Porotchkinf4f194e2017-04-05 17:42:33 +030013#include <pci.h>
Stefan Roese21b29fc2016-05-25 08:13:45 +020014#include <asm/io.h>
15#include <asm/system.h>
16#include <asm/arch/cpu.h>
17#include <asm/arch/soc.h>
18#include <asm/armv8/mmu.h>
19
20DECLARE_GLOBAL_DATA_PTR;
21
22/*
Stefan Roese059f75d2016-11-11 08:18:44 +010023 * Not all memory is mapped in the MMU. So we need to restrict the
24 * memory size so that U-Boot does not try to access it. Also, the
25 * internal registers are located at 0xf000.0000 - 0xffff.ffff.
26 * Currently only 2GiB are mapped for system memory. This is what
27 * we pass to the U-Boot subsystem here.
28 */
29#define USABLE_RAM_SIZE 0x80000000
30
31ulong board_get_usable_ram_top(ulong total_size)
32{
33 if (gd->ram_size > USABLE_RAM_SIZE)
34 return USABLE_RAM_SIZE;
35
36 return gd->ram_size;
37}
38
39/*
Stefan Roese21b29fc2016-05-25 08:13:45 +020040 * On ARMv8, MBus is not configured in U-Boot. To enable compilation
41 * of the already implemented drivers, lets add a dummy version of
42 * this function so that linking does not fail.
43 */
44const struct mbus_dram_target_info *mvebu_mbus_dram_info(void)
45{
46 return NULL;
47}
48
Marek Behún3b281ac2018-12-17 16:10:09 +010049__weak int dram_init_banksize(void)
Stefan Roese21b29fc2016-05-25 08:13:45 +020050{
Baruch Siach2b4d9642018-11-11 12:31:04 +020051 if (CONFIG_IS_ENABLED(ARMADA_8K))
Marek Behúnf075b422020-04-08 19:25:18 +020052 return a8k_dram_init_banksize();
Marek Behúna129f642020-04-08 19:25:19 +020053 else if (CONFIG_IS_ENABLED(ARMADA_3700))
54 return a3700_dram_init_banksize();
Baruch Siach2b4d9642018-11-11 12:31:04 +020055 else
Marek Behúnf075b422020-04-08 19:25:18 +020056 return fdtdec_setup_memory_banksize();
Stefan Roese21b29fc2016-05-25 08:13:45 +020057}
58
Marek Behún3b281ac2018-12-17 16:10:09 +010059__weak int dram_init(void)
Stefan Roese21b29fc2016-05-25 08:13:45 +020060{
Baruch Siach2b4d9642018-11-11 12:31:04 +020061 if (CONFIG_IS_ENABLED(ARMADA_8K)) {
62 gd->ram_size = a8k_dram_scan_ap_sz();
63 if (gd->ram_size != 0)
64 return 0;
65 }
66
Marek Behúna129f642020-04-08 19:25:19 +020067 if (CONFIG_IS_ENABLED(ARMADA_3700))
68 return a3700_dram_init();
69
Siva Durga Prasad Paladugu12308b12018-07-16 15:56:11 +053070 if (fdtdec_setup_mem_size_base() != 0)
Stefan Roese780f80c2017-05-08 08:31:30 +020071 return -EINVAL;
Simon Glass76b00ac2017-03-31 08:40:32 -060072
73 return 0;
Stefan Roese21b29fc2016-05-25 08:13:45 +020074}
75
76int arch_cpu_init(void)
77{
78 /* Nothing to do (yet) */
79 return 0;
80}
81
82int arch_early_init_r(void)
83{
84 struct udevice *dev;
85 int ret;
Stefan Roesed7dd3582016-10-25 18:12:40 +020086 int i;
Stefan Roese21b29fc2016-05-25 08:13:45 +020087
Stefan Roesed7dd3582016-10-25 18:12:40 +020088 /*
89 * Loop over all MISC uclass drivers to call the comphy code
90 * and init all CP110 devices enabled in the DT
91 */
92 i = 0;
93 while (1) {
94 /* Call the comphy code via the MISC uclass driver */
95 ret = uclass_get_device(UCLASS_MISC, i++, &dev);
96
97 /* We're done, once no further CP110 device is found */
98 if (ret)
99 break;
Stefan Roese21b29fc2016-05-25 08:13:45 +0200100 }
101
102 /* Cause the SATA device to do its early init */
103 uclass_first_device(UCLASS_AHCI, &dev);
104
Konstantin Porotchkinf4f194e2017-04-05 17:42:33 +0300105#ifdef CONFIG_DM_PCI
106 /* Trigger PCIe devices detection */
107 pci_init();
108#endif
109
Stefan Roese21b29fc2016-05-25 08:13:45 +0200110 return 0;
111}