blob: f645befb2c044c5ace02263d087c3b51166252ea [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Stefan Roeseb0f80b92015-01-19 11:33:42 +01002/*
Stefan Roesea5f88872016-01-07 14:09:09 +01003 * Copyright (C) 2014-2016 Stefan Roese <sr@denx.de>
Stefan Roeseb0f80b92015-01-19 11:33:42 +01004 */
5
6#include <common.h>
Stefan Roese64512232015-11-25 07:37:00 +01007#include <dm.h>
8#include <debug_uart.h>
9#include <fdtdec.h>
Simon Glassdb41d652019-12-28 10:45:07 -070010#include <hang.h>
Simon Glass691d7192020-05-10 11:40:02 -060011#include <init.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -060012#include <log.h>
Stefan Roeseb0f80b92015-01-19 11:33:42 +010013#include <spl.h>
14#include <asm/io.h>
15#include <asm/arch/cpu.h>
16#include <asm/arch/soc.h>
17
Stefan Roesea5f88872016-01-07 14:09:09 +010018static u32 get_boot_device(void)
19{
20 u32 val;
21 u32 boot_device;
22
Stefan Roesef4db6c92016-01-07 14:12:04 +010023 /*
24 * First check, if UART boot-mode is active. This can only
25 * be done, via the bootrom error register. Here the
26 * MSB marks if the UART mode is active.
27 */
28 val = readl(CONFIG_BOOTROM_ERR_REG);
29 boot_device = (val & BOOTROM_ERR_MODE_MASK) >> BOOTROM_ERR_MODE_OFFS;
30 debug("BOOTROM_REG=0x%08x boot_device=0x%x\n", val, boot_device);
31 if (boot_device == BOOTROM_ERR_MODE_UART)
32 return BOOT_DEVICE_UART;
33
Chris Packham2fd42842018-08-17 20:47:42 +120034#ifdef CONFIG_ARMADA_38X
35 /*
36 * If the bootrom error code contains any other than zeros it's an
37 * error condition and the bootROM has fallen back to UART boot
38 */
39 boot_device = (val & BOOTROM_ERR_CODE_MASK) >> BOOTROM_ERR_CODE_OFFS;
40 if (boot_device)
41 return BOOT_DEVICE_UART;
42#endif
43
Stefan Roesef4db6c92016-01-07 14:12:04 +010044 /*
45 * Now check the SAR register for the strapped boot-device
46 */
Stefan Roesea5f88872016-01-07 14:09:09 +010047 val = readl(CONFIG_SAR_REG); /* SAR - Sample At Reset */
48 boot_device = (val & BOOT_DEV_SEL_MASK) >> BOOT_DEV_SEL_OFFS;
Stefan Roesef4db6c92016-01-07 14:12:04 +010049 debug("SAR_REG=0x%08x boot_device=0x%x\n", val, boot_device);
Stefan Roesea5f88872016-01-07 14:09:09 +010050 switch (boot_device) {
Sean Nyekjaer926c8b22017-11-24 14:01:47 +010051#if defined(CONFIG_ARMADA_38X)
52 case BOOT_FROM_NAND:
53 return BOOT_DEVICE_NAND;
54#endif
Stefan Roesea5f88872016-01-07 14:09:09 +010055#ifdef CONFIG_SPL_MMC_SUPPORT
56 case BOOT_FROM_MMC:
57 case BOOT_FROM_MMC_ALT:
58 return BOOT_DEVICE_MMC1;
59#endif
60 case BOOT_FROM_UART:
Baruch Siachf3a88e22017-09-24 15:50:17 +030061#ifdef BOOT_FROM_UART_ALT
62 case BOOT_FROM_UART_ALT:
63#endif
Stefan Roesea5f88872016-01-07 14:09:09 +010064 return BOOT_DEVICE_UART;
Baruch Siach22c65452019-05-16 13:03:58 +030065#ifdef BOOT_FROM_SATA
66 case BOOT_FROM_SATA:
67 case BOOT_FROM_SATA_ALT:
68 return BOOT_DEVICE_SATA;
69#endif
Stefan Roesea5f88872016-01-07 14:09:09 +010070 case BOOT_FROM_SPI:
71 default:
72 return BOOT_DEVICE_SPI;
73 };
74}
75
Stefan Roeseb0f80b92015-01-19 11:33:42 +010076u32 spl_boot_device(void)
77{
Stefan Roesea5f88872016-01-07 14:09:09 +010078 return get_boot_device();
Stefan Roeseb0f80b92015-01-19 11:33:42 +010079}
80
81void board_init_f(ulong dummy)
82{
Stefan Roese64512232015-11-25 07:37:00 +010083 int ret;
84
Stefan Roesee3cccf92015-04-17 18:13:06 +020085 /*
86 * Pin muxing needs to be done before UART output, since
87 * on A38x the UART pins need some re-muxing for output
88 * to work.
89 */
90 board_early_init_f();
91
Stefan Roese64512232015-11-25 07:37:00 +010092 /* Example code showing how to enable the debug UART on MVEBU */
93#ifdef EARLY_UART
94 /*
95 * Debug UART can be used from here if required:
96 *
97 * debug_uart_init();
98 * printch('a');
99 * printhex8(0x1234);
100 * printascii("string");
101 */
102#endif
103
Stefan Roesef2100f62019-04-12 16:42:28 +0200104 /*
105 * Use special translation offset for SPL. This needs to be
106 * configured *before* spl_init() is called as this function
107 * calls dm_init() which calls the bind functions of the
108 * device drivers. Here the base address needs to be configured
109 * (translated) correctly.
110 */
111 gd->translation_offset = 0xd0000000 - 0xf1000000;
112
Stefan Roese64512232015-11-25 07:37:00 +0100113 ret = spl_init();
114 if (ret) {
115 debug("spl_init() failed: %d\n", ret);
116 hang();
117 }
118
Stefan Roeseb0f80b92015-01-19 11:33:42 +0100119 preloader_console_init();
120
Stefan Roeseade741b2015-07-15 15:36:52 +0200121 timer_init();
122
Stefan Roese09e89ab2016-02-10 07:23:00 +0100123 /* Armada 375 does not support SerDes and DDR3 init yet */
124#if !defined(CONFIG_ARMADA_375)
Stefan Roeseb0f80b92015-01-19 11:33:42 +0100125 /* First init the serdes PHY's */
126 serdes_phy_config();
127
128 /* Setup DDR */
129 ddr3_init();
Stefan Roese09e89ab2016-02-10 07:23:00 +0100130#endif
Stefan Roeseb0f80b92015-01-19 11:33:42 +0100131
Baruch Siachcc66ebd2019-07-10 18:23:04 +0300132 /* Initialize Auto Voltage Scaling */
133 mv_avs_init();
134
Chris Packhamad91fdf2020-02-26 19:53:50 +1300135 /* Update read timing control for PCIe */
136 mv_rtc_config();
137
Stefan Roese944c7a32015-08-25 13:49:41 +0200138 /*
139 * Return to the BootROM to continue the Marvell xmodem
140 * UART boot protocol. As initiated by the kwboot tool.
141 *
142 * This can only be done by the BootROM and not by the
143 * U-Boot SPL infrastructure, since the beginning of the
144 * image is already read and interpreted by the BootROM.
145 * SPL has no chance to receive this information. So we
146 * need to return to the BootROM to enable this xmodem
147 * UART download.
Sean Nyekjaer926c8b22017-11-24 14:01:47 +0100148 *
149 * If booting from NAND lets let the BootROM load the
150 * rest of the bootloader.
Stefan Roese944c7a32015-08-25 13:49:41 +0200151 */
Sean Nyekjaer926c8b22017-11-24 14:01:47 +0100152 switch (get_boot_device()) {
153 case BOOT_DEVICE_UART:
154#if defined(CONFIG_ARMADA_38X)
155 case BOOT_DEVICE_NAND:
156#endif
157 return_to_bootrom();
158 }
Stefan Roeseb0f80b92015-01-19 11:33:42 +0100159}