blob: ba556de00f1cd02a9b0ca7ae69ccd44e0c261d82 [file] [log] [blame]
Tom Rini4549e782018-05-06 18:27:01 -04001// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Patrick Delaunayf8598d92018-03-12 10:46:18 +01002/*
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
Patrick Delaunayf8598d92018-03-12 10:46:18 +01004 */
Patrice Chotard395f1292019-02-12 16:50:40 +01005#include <common.h>
6#include <adc.h>
Patrick Delaunay8e194772019-06-21 15:26:40 +02007#include <bootm.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +02008#include <clk.h>
Patrick Delaunayd1a597f2019-07-30 19:16:44 +02009#include <config.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020010#include <dm.h>
Simon Glass3a7d5572019-08-01 09:46:42 -060011#include <env.h>
Simon Glassf3998fd2019-08-02 09:44:25 -060012#include <env_internal.h>
Simon Glass4d72caa2020-05-10 11:40:01 -060013#include <fdt_support.h>
Patrick Delaunayc31000c2019-03-29 15:42:23 +010014#include <g_dnl.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020015#include <generic-phy.h>
Simon Glassdb41d652019-12-28 10:45:07 -070016#include <hang.h>
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +010017#include <i2c.h>
Simon Glass52559322019-11-14 12:57:46 -070018#include <init.h>
Patrick Delaunayd461f102019-02-12 11:44:41 +010019#include <led.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -060020#include <log.h>
Simon Glass336d4612020-02-03 07:36:16 -070021#include <malloc.h>
Patrick Delaunayd461f102019-02-12 11:44:41 +010022#include <misc.h>
Patrick Delaunaye81f8d12019-07-02 13:26:07 +020023#include <mtd_node.h>
Simon Glass90526e92020-05-10 11:39:56 -060024#include <net.h>
Patrick Delaunay53e3d522019-08-01 11:29:03 +020025#include <netdev.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020026#include <phy.h>
Patrick Delaunaya68ae8d2019-08-02 15:07:20 +020027#include <remoteproc.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020028#include <reset.h>
Patrick Delaunay45459742019-02-27 17:01:24 +010029#include <syscon.h>
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +010030#include <usb.h>
Patrick Delaunaydd281082019-07-30 19:16:39 +020031#include <watchdog.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020032#include <asm/io.h>
Patrick Delaunay842ebb52019-02-27 17:01:18 +010033#include <asm/gpio.h>
Patrick Delaunay45459742019-02-27 17:01:24 +010034#include <asm/arch/stm32.h>
Patrice Chotard7f90cd62019-05-02 18:36:01 +020035#include <asm/arch/sys_proto.h>
Patrick Delaunaye81f8d12019-07-02 13:26:07 +020036#include <jffs2/load_kernel.h>
Simon Glass61b29b82020-02-03 07:36:15 -070037#include <linux/err.h>
Patrick Delaunay5ef642c2020-04-22 14:29:16 +020038#include <linux/iopoll.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020039#include <power/regulator.h>
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +010040#include <usb/dwc2_udc.h>
Patrick Delaunayf8598d92018-03-12 10:46:18 +010041
Patrick Delaunay45459742019-02-27 17:01:24 +010042/* SYSCFG registers */
43#define SYSCFG_BOOTR 0x00
44#define SYSCFG_PMCSETR 0x04
45#define SYSCFG_IOCTRLSETR 0x18
46#define SYSCFG_ICNR 0x1C
47#define SYSCFG_CMPCR 0x20
48#define SYSCFG_CMPENSETR 0x24
49#define SYSCFG_PMCCLRR 0x44
50
51#define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0)
52#define SYSCFG_BOOTR_BOOTPD_SHIFT 4
53
54#define SYSCFG_IOCTRLSETR_HSLVEN_TRACE BIT(0)
55#define SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI BIT(1)
56#define SYSCFG_IOCTRLSETR_HSLVEN_ETH BIT(2)
57#define SYSCFG_IOCTRLSETR_HSLVEN_SDMMC BIT(3)
58#define SYSCFG_IOCTRLSETR_HSLVEN_SPI BIT(4)
59
60#define SYSCFG_CMPCR_SW_CTRL BIT(1)
61#define SYSCFG_CMPCR_READY BIT(8)
62
63#define SYSCFG_CMPENSETR_MPU_EN BIT(0)
64
65#define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
66#define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
67
68#define SYSCFG_PMCSETR_ETH_SELMII BIT(20)
69
70#define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21)
Christophe Roullieredacf262019-05-17 15:08:43 +020071#define SYSCFG_PMCSETR_ETH_SEL_GMII_MII 0
72#define SYSCFG_PMCSETR_ETH_SEL_RGMII BIT(21)
73#define SYSCFG_PMCSETR_ETH_SEL_RMII BIT(23)
Patrick Delaunay45459742019-02-27 17:01:24 +010074
Patrick Delaunayf8598d92018-03-12 10:46:18 +010075/*
76 * Get a global data pointer
77 */
78DECLARE_GLOBAL_DATA_PTR;
79
Patrice Chotard28c064e2019-04-30 18:09:38 +020080#define USB_LOW_THRESHOLD_UV 200000
Patrice Chotard395f1292019-02-12 16:50:40 +010081#define USB_WARNING_LOW_THRESHOLD_UV 660000
82#define USB_START_LOW_THRESHOLD_UV 1230000
Patrice Chotard28c064e2019-04-30 18:09:38 +020083#define USB_START_HIGH_THRESHOLD_UV 2150000
Patrice Chotard395f1292019-02-12 16:50:40 +010084
Patrick Delaunayd461f102019-02-12 11:44:41 +010085int checkboard(void)
86{
87 int ret;
88 char *mode;
89 u32 otp;
90 struct udevice *dev;
91 const char *fdt_compat;
92 int fdt_compat_len;
93
Patrick Delaunay43df0a12020-03-18 09:22:49 +010094 if (IS_ENABLED(CONFIG_TFABOOT))
Patrick Delaunayd461f102019-02-12 11:44:41 +010095 mode = "trusted";
96 else
97 mode = "basic";
98
99 printf("Board: stm32mp1 in %s mode", mode);
100 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
101 &fdt_compat_len);
102 if (fdt_compat && fdt_compat_len)
103 printf(" (%s)", fdt_compat);
104 puts("\n");
105
Patrick Delaunay888dc682020-03-24 09:05:00 +0100106 /* display the STMicroelectronics board identification */
Patrick Delaunay61f6d462020-02-12 19:37:42 +0100107 if (CONFIG_IS_ENABLED(CMD_STBOARD)) {
108 ret = uclass_get_device_by_driver(UCLASS_MISC,
109 DM_GET_DRIVER(stm32mp_bsec),
110 &dev);
111 if (!ret)
112 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
113 &otp, sizeof(otp));
114 if (ret > 0 && otp)
115 printf("Board: MB%04x Var%d.%d Rev.%c-%02d\n",
116 otp >> 16,
117 (otp >> 12) & 0xF,
118 (otp >> 4) & 0xF,
119 ((otp >> 8) & 0xF) - 1 + 'A',
120 otp & 0xF);
Patrick Delaunayd461f102019-02-12 11:44:41 +0100121 }
122
123 return 0;
124}
125
Patrick Delaunay9a2ba282019-02-27 17:01:20 +0100126static void board_key_check(void)
127{
128#if defined(CONFIG_FASTBOOT) || defined(CONFIG_CMD_STM32PROG)
129 ofnode node;
130 struct gpio_desc gpio;
131 enum forced_boot_mode boot_mode = BOOT_NORMAL;
132
133 node = ofnode_path("/config");
134 if (!ofnode_valid(node)) {
135 debug("%s: no /config node?\n", __func__);
136 return;
137 }
138#ifdef CONFIG_FASTBOOT
139 if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0,
140 &gpio, GPIOD_IS_IN)) {
141 debug("%s: could not find a /config/st,fastboot-gpios\n",
142 __func__);
143 } else {
144 if (dm_gpio_get_value(&gpio)) {
145 puts("Fastboot key pressed, ");
146 boot_mode = BOOT_FASTBOOT;
147 }
148
149 dm_gpio_free(NULL, &gpio);
150 }
151#endif
152#ifdef CONFIG_CMD_STM32PROG
153 if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0,
154 &gpio, GPIOD_IS_IN)) {
155 debug("%s: could not find a /config/st,stm32prog-gpios\n",
156 __func__);
157 } else {
158 if (dm_gpio_get_value(&gpio)) {
159 puts("STM32Programmer key pressed, ");
160 boot_mode = BOOT_STM32PROG;
161 }
162 dm_gpio_free(NULL, &gpio);
163 }
164#endif
165
166 if (boot_mode != BOOT_NORMAL) {
167 puts("entering download mode...\n");
168 clrsetbits_le32(TAMP_BOOT_CONTEXT,
169 TAMP_BOOT_FORCED_MASK,
170 boot_mode);
171 }
172#endif
173}
174
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100175#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
Patrice Chotard4c834b92018-08-10 17:12:14 +0200176
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +0100177/* STMicroelectronics STUSB1600 Type-C controller */
178#define STUSB1600_CC_CONNECTION_STATUS 0x0E
179
180/* STUSB1600_CC_CONNECTION_STATUS bitfields */
181#define STUSB1600_CC_ATTACH BIT(0)
182
183static int stusb1600_init(struct udevice **dev_stusb1600)
184{
185 ofnode node;
186 struct udevice *dev, *bus;
187 int ret;
188 u32 chip_addr;
189
190 *dev_stusb1600 = NULL;
191
192 /* if node stusb1600 is present, means DK1 or DK2 board */
193 node = ofnode_by_compatible(ofnode_null(), "st,stusb1600");
194 if (!ofnode_valid(node))
195 return -ENODEV;
196
197 ret = ofnode_read_u32(node, "reg", &chip_addr);
198 if (ret)
199 return -EINVAL;
200
201 ret = uclass_get_device_by_ofnode(UCLASS_I2C, ofnode_get_parent(node),
202 &bus);
203 if (ret) {
204 printf("bus for stusb1600 not found\n");
205 return -ENODEV;
206 }
207
208 ret = dm_i2c_probe(bus, chip_addr, 0, &dev);
209 if (!ret)
210 *dev_stusb1600 = dev;
211
212 return ret;
213}
214
215static int stusb1600_cable_connected(struct udevice *dev)
216{
217 u8 status;
218
219 if (dm_i2c_read(dev, STUSB1600_CC_CONNECTION_STATUS, &status, 1))
220 return 0;
221
222 return status & STUSB1600_CC_ATTACH;
223}
224
225#include <usb/dwc2_udc.h>
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100226int g_dnl_board_usb_cable_connected(void)
Patrice Chotard4c834b92018-08-10 17:12:14 +0200227{
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +0100228 struct udevice *stusb1600;
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100229 struct udevice *dwc2_udc_otg;
Patrice Chotard4c834b92018-08-10 17:12:14 +0200230 int ret;
231
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +0100232 if (!stusb1600_init(&stusb1600))
233 return stusb1600_cable_connected(stusb1600);
234
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100235 ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC,
236 DM_GET_DRIVER(dwc2_udc_otg),
237 &dwc2_udc_otg);
238 if (!ret)
239 debug("dwc2_udc_otg init failed\n");
Patrice Chotard4c834b92018-08-10 17:12:14 +0200240
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100241 return dwc2_udc_B_session_valid(dwc2_udc_otg);
Patrice Chotard4c834b92018-08-10 17:12:14 +0200242}
Patrick Delaunayfb90fcf2019-09-13 15:24:17 +0200243
244#define STM32MP1_G_DNL_DFU_PRODUCT_NUM 0xdf11
245#define STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM 0x0afb
246
247int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
248{
249 if (!strcmp(name, "usb_dnl_dfu"))
250 put_unaligned(STM32MP1_G_DNL_DFU_PRODUCT_NUM, &dev->idProduct);
251 else if (!strcmp(name, "usb_dnl_fastboot"))
252 put_unaligned(STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM,
253 &dev->idProduct);
254 else
255 put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM, &dev->idProduct);
256
257 return 0;
258}
259
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100260#endif /* CONFIG_USB_GADGET */
Patrice Chotard4c834b92018-08-10 17:12:14 +0200261
Patrice Chotard395f1292019-02-12 16:50:40 +0100262static int get_led(struct udevice **dev, char *led_string)
263{
264 char *led_name;
265 int ret;
266
267 led_name = fdtdec_get_config_string(gd->fdt_blob, led_string);
268 if (!led_name) {
269 pr_debug("%s: could not find %s config string\n",
270 __func__, led_string);
271 return -ENOENT;
272 }
273 ret = led_get_by_label(led_name, dev);
274 if (ret) {
275 debug("%s: get=%d\n", __func__, ret);
276 return ret;
277 }
278
279 return 0;
280}
281
282static int setup_led(enum led_state_t cmd)
283{
284 struct udevice *dev;
285 int ret;
286
Patrick Delaunay0c952952020-04-22 14:29:12 +0200287 if (!CONFIG_IS_ENABLED(LED))
288 return 0;
289
Patrice Chotard395f1292019-02-12 16:50:40 +0100290 ret = get_led(&dev, "u-boot,boot-led");
291 if (ret)
292 return ret;
293
294 ret = led_set_state(dev, cmd);
295 return ret;
296}
Patrick Delaunaydd281082019-07-30 19:16:39 +0200297
298static void __maybe_unused led_error_blink(u32 nb_blink)
299{
Patrick Delaunaydd281082019-07-30 19:16:39 +0200300 int ret;
301 struct udevice *led;
302 u32 i;
Patrick Delaunaydd281082019-07-30 19:16:39 +0200303
304 if (!nb_blink)
305 return;
306
Patrick Delaunay0c952952020-04-22 14:29:12 +0200307 if (CONFIG_IS_ENABLED(LED)) {
308 ret = get_led(&led, "u-boot,error-led");
309 if (!ret) {
310 /* make u-boot,error-led blinking */
311 /* if U32_MAX and 125ms interval, for 17.02 years */
312 for (i = 0; i < 2 * nb_blink; i++) {
313 led_set_state(led, LEDST_TOGGLE);
314 mdelay(125);
315 WATCHDOG_RESET();
316 }
317 led_set_state(led, LEDST_ON);
Patrick Delaunaydd281082019-07-30 19:16:39 +0200318 }
319 }
Patrick Delaunaydd281082019-07-30 19:16:39 +0200320
321 /* infinite: the boot process must be stopped */
322 if (nb_blink == U32_MAX)
323 hang();
324}
Patrice Chotard395f1292019-02-12 16:50:40 +0100325
Patrick Delaunay41542472019-07-30 19:16:43 +0200326#ifdef CONFIG_ADC
Patrice Chotard395f1292019-02-12 16:50:40 +0100327static int board_check_usb_power(void)
328{
329 struct ofnode_phandle_args adc_args;
330 struct udevice *adc;
Patrice Chotard395f1292019-02-12 16:50:40 +0100331 ofnode node;
332 unsigned int raw;
333 int max_uV = 0;
Patrice Chotard28c064e2019-04-30 18:09:38 +0200334 int min_uV = USB_START_HIGH_THRESHOLD_UV;
Patrice Chotard395f1292019-02-12 16:50:40 +0100335 int ret, uV, adc_count;
Patrice Chotard28c064e2019-04-30 18:09:38 +0200336 u32 nb_blink;
337 u8 i;
Patrice Chotard395f1292019-02-12 16:50:40 +0100338 node = ofnode_path("/config");
339 if (!ofnode_valid(node)) {
340 debug("%s: no /config node?\n", __func__);
341 return -ENOENT;
342 }
343
344 /*
345 * Retrieve the ADC channels devices and get measurement
346 * for each of them
347 */
348 adc_count = ofnode_count_phandle_with_args(node, "st,adc_usb_pd",
349 "#io-channel-cells");
350 if (adc_count < 0) {
351 if (adc_count == -ENOENT)
352 return 0;
353
354 pr_err("%s: can't find adc channel (%d)\n", __func__,
355 adc_count);
356
357 return adc_count;
358 }
359
360 for (i = 0; i < adc_count; i++) {
361 if (ofnode_parse_phandle_with_args(node, "st,adc_usb_pd",
362 "#io-channel-cells", 0, i,
363 &adc_args)) {
364 pr_debug("%s: can't find /config/st,adc_usb_pd\n",
365 __func__);
366 return 0;
367 }
368
369 ret = uclass_get_device_by_ofnode(UCLASS_ADC, adc_args.node,
370 &adc);
371
372 if (ret) {
373 pr_err("%s: Can't get adc device(%d)\n", __func__,
374 ret);
375 return ret;
376 }
377
378 ret = adc_channel_single_shot(adc->name, adc_args.args[0],
379 &raw);
380 if (ret) {
381 pr_err("%s: single shot failed for %s[%d]!\n",
382 __func__, adc->name, adc_args.args[0]);
383 return ret;
384 }
385 /* Convert to uV */
386 if (!adc_raw_to_uV(adc, raw, &uV)) {
387 if (uV > max_uV)
388 max_uV = uV;
Patrice Chotard28c064e2019-04-30 18:09:38 +0200389 if (uV < min_uV)
390 min_uV = uV;
Patrice Chotard395f1292019-02-12 16:50:40 +0100391 pr_debug("%s: %s[%02d] = %u, %d uV\n", __func__,
392 adc->name, adc_args.args[0], raw, uV);
393 } else {
394 pr_err("%s: Can't get uV value for %s[%d]\n",
395 __func__, adc->name, adc_args.args[0]);
396 }
397 }
398
399 /*
400 * If highest value is inside 1.23 Volts and 2.10 Volts, that means
401 * board is plugged on an USB-C 3A power supply and boot process can
402 * continue.
403 */
404 if (max_uV > USB_START_LOW_THRESHOLD_UV &&
Patrice Chotard28c064e2019-04-30 18:09:38 +0200405 max_uV <= USB_START_HIGH_THRESHOLD_UV &&
406 min_uV <= USB_LOW_THRESHOLD_UV)
Patrice Chotard395f1292019-02-12 16:50:40 +0100407 return 0;
408
Patrice Chotard28c064e2019-04-30 18:09:38 +0200409 pr_err("****************************************************\n");
Patrice Chotard395f1292019-02-12 16:50:40 +0100410
Patrice Chotard28c064e2019-04-30 18:09:38 +0200411 /*
412 * If highest and lowest value are either both below
413 * USB_LOW_THRESHOLD_UV or both above USB_LOW_THRESHOLD_UV, that
414 * means USB TYPE-C is in unattached mode, this is an issue, make
415 * u-boot,error-led blinking and stop boot process.
416 */
417 if ((max_uV > USB_LOW_THRESHOLD_UV &&
418 min_uV > USB_LOW_THRESHOLD_UV) ||
419 (max_uV <= USB_LOW_THRESHOLD_UV &&
420 min_uV <= USB_LOW_THRESHOLD_UV)) {
421 pr_err("* ERROR USB TYPE-C connection in unattached mode *\n");
422 pr_err("* Check that USB TYPE-C cable is correctly plugged *\n");
423 /* with 125ms interval, led will blink for 17.02 years ....*/
424 nb_blink = U32_MAX;
425 }
426
427 if (max_uV > USB_LOW_THRESHOLD_UV &&
428 max_uV <= USB_WARNING_LOW_THRESHOLD_UV &&
429 min_uV <= USB_LOW_THRESHOLD_UV) {
430 pr_err("* WARNING 500mA power supply detected *\n");
Patrice Chotard395f1292019-02-12 16:50:40 +0100431 nb_blink = 2;
Patrice Chotard28c064e2019-04-30 18:09:38 +0200432 }
433
434 if (max_uV > USB_WARNING_LOW_THRESHOLD_UV &&
435 max_uV <= USB_START_LOW_THRESHOLD_UV &&
436 min_uV <= USB_LOW_THRESHOLD_UV) {
Patrice Chotard5eff1682020-04-30 18:41:05 +0200437 pr_err("* WARNING 1.5A power supply detected *\n");
Patrice Chotard395f1292019-02-12 16:50:40 +0100438 nb_blink = 3;
439 }
440
Patrice Chotard28c064e2019-04-30 18:09:38 +0200441 /*
442 * If highest value is above 2.15 Volts that means that the USB TypeC
443 * supplies more than 3 Amp, this is not compliant with TypeC specification
444 */
445 if (max_uV > USB_START_HIGH_THRESHOLD_UV) {
446 pr_err("* USB TYPE-C charger not compliant with *\n");
447 pr_err("* specification *\n");
448 pr_err("****************************************************\n\n");
449 /* with 125ms interval, led will blink for 17.02 years ....*/
450 nb_blink = U32_MAX;
451 } else {
452 pr_err("* Current too low, use a 3A power supply! *\n");
453 pr_err("****************************************************\n\n");
454 }
Patrice Chotard395f1292019-02-12 16:50:40 +0100455
Patrick Delaunaydd281082019-07-30 19:16:39 +0200456 led_error_blink(nb_blink);
Patrice Chotard395f1292019-02-12 16:50:40 +0100457
458 return 0;
459}
Patrick Delaunay41542472019-07-30 19:16:43 +0200460#endif /* CONFIG_ADC */
Patrice Chotard395f1292019-02-12 16:50:40 +0100461
Patrick Delaunay45459742019-02-27 17:01:24 +0100462static void sysconf_init(void)
463{
Patrick Delaunay654706b2020-04-01 09:07:33 +0200464#ifndef CONFIG_TFABOOT
Patrick Delaunay45459742019-02-27 17:01:24 +0100465 u8 *syscfg;
466#ifdef CONFIG_DM_REGULATOR
467 struct udevice *pwr_dev;
468 struct udevice *pwr_reg;
469 struct udevice *dev;
Patrick Delaunay45459742019-02-27 17:01:24 +0100470 u32 otp = 0;
471#endif
Patrick Delaunay5ef642c2020-04-22 14:29:16 +0200472 int ret;
473 u32 bootr, val;
Patrick Delaunay45459742019-02-27 17:01:24 +0100474
475 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
476
477 /* interconnect update : select master using the port 1 */
478 /* LTDC = AXI_M9 */
479 /* GPU = AXI_M8 */
480 /* today information is hardcoded in U-Boot */
481 writel(BIT(9), syscfg + SYSCFG_ICNR);
482
483 /* disable Pull-Down for boot pin connected to VDD */
484 bootr = readl(syscfg + SYSCFG_BOOTR);
485 bootr &= ~(SYSCFG_BOOTR_BOOT_MASK << SYSCFG_BOOTR_BOOTPD_SHIFT);
486 bootr |= (bootr & SYSCFG_BOOTR_BOOT_MASK) << SYSCFG_BOOTR_BOOTPD_SHIFT;
487 writel(bootr, syscfg + SYSCFG_BOOTR);
488
489#ifdef CONFIG_DM_REGULATOR
490 /* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI
491 * and TRACE. Needed above ~50MHz and conditioned by AFMUX selection.
492 * The customer will have to disable this for low frequencies
493 * or if AFMUX is selected but the function not used, typically for
494 * TRACE. Otherwise, impact on power consumption.
495 *
496 * WARNING:
497 * enabling High Speed mode while VDD>2.7V
498 * with the OTP product_below_2v5 (OTP 18, BIT 13)
499 * erroneously set to 1 can damage the IC!
500 * => U-Boot set the register only if VDD < 2.7V (in DT)
501 * but this value need to be consistent with board design
502 */
Patrick Delaunay5e959ab2019-07-30 19:16:42 +0200503 ret = uclass_get_device_by_driver(UCLASS_PMIC,
504 DM_GET_DRIVER(stm32mp_pwr_pmic),
505 &pwr_dev);
Patrick Delaunay45459742019-02-27 17:01:24 +0100506 if (!ret) {
507 ret = uclass_get_device_by_driver(UCLASS_MISC,
508 DM_GET_DRIVER(stm32mp_bsec),
509 &dev);
510 if (ret) {
511 pr_err("Can't find stm32mp_bsec driver\n");
512 return;
513 }
514
515 ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4);
Patrick Delaunayff6618e2019-08-02 13:08:06 +0200516 if (ret > 0)
Patrick Delaunay45459742019-02-27 17:01:24 +0100517 otp = otp & BIT(13);
518
Patrick Delaunay5e959ab2019-07-30 19:16:42 +0200519 /* get VDD = vdd-supply */
520 ret = device_get_supply_regulator(pwr_dev, "vdd-supply",
Patrick Delaunay45459742019-02-27 17:01:24 +0100521 &pwr_reg);
522
523 /* check if VDD is Low Voltage */
524 if (!ret) {
525 if (regulator_get_value(pwr_reg) < 2700000) {
526 writel(SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
527 SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
528 SYSCFG_IOCTRLSETR_HSLVEN_ETH |
529 SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
530 SYSCFG_IOCTRLSETR_HSLVEN_SPI,
531 syscfg + SYSCFG_IOCTRLSETR);
532
533 if (!otp)
534 pr_err("product_below_2v5=0: HSLVEN protected by HW\n");
535 } else {
536 if (otp)
537 pr_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n");
538 }
539 } else {
540 debug("VDD unknown");
541 }
542 }
543#endif
544
545 /* activate automatic I/O compensation
546 * warning: need to ensure CSI enabled and ready in clock driver
547 */
548 writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR);
549
Patrick Delaunay5ef642c2020-04-22 14:29:16 +0200550 /* poll until ready (1s timeout) */
551 ret = readl_poll_timeout(syscfg + SYSCFG_CMPCR, val,
552 val & SYSCFG_CMPCR_READY,
553 1000000);
554 if (ret) {
555 pr_err("SYSCFG: I/O compensation failed, timeout.\n");
556 led_error_blink(10);
557 }
558
Patrick Delaunay45459742019-02-27 17:01:24 +0100559 clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
560#endif
561}
562
Patrick Delaunayd573e462019-07-30 19:16:38 +0200563#ifdef CONFIG_DM_REGULATOR
564/* Fix to make I2C1 usable on DK2 for touchscreen usage in kernel */
565static int dk2_i2c1_fix(void)
566{
567 ofnode node;
568 struct gpio_desc hdmi, audio;
569 int ret = 0;
570
571 node = ofnode_path("/soc/i2c@40012000/hdmi-transmitter@39");
572 if (!ofnode_valid(node)) {
573 pr_debug("%s: no hdmi-transmitter@39 ?\n", __func__);
574 return -ENOENT;
575 }
576
577 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
578 &hdmi, GPIOD_IS_OUT)) {
579 pr_debug("%s: could not find reset-gpios\n",
580 __func__);
581 return -ENOENT;
582 }
583
584 node = ofnode_path("/soc/i2c@40012000/cs42l51@4a");
585 if (!ofnode_valid(node)) {
586 pr_debug("%s: no cs42l51@4a ?\n", __func__);
587 return -ENOENT;
588 }
589
590 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
591 &audio, GPIOD_IS_OUT)) {
592 pr_debug("%s: could not find reset-gpios\n",
593 __func__);
594 return -ENOENT;
595 }
596
597 /* before power up, insure that HDMI and AUDIO IC is under reset */
598 ret = dm_gpio_set_value(&hdmi, 1);
599 if (ret) {
600 pr_err("%s: can't set_value for hdmi_nrst gpio", __func__);
601 goto error;
602 }
603 ret = dm_gpio_set_value(&audio, 1);
604 if (ret) {
605 pr_err("%s: can't set_value for audio_nrst gpio", __func__);
606 goto error;
607 }
608
609 /* power-up audio IC */
610 regulator_autoset_by_name("v1v8_audio", NULL);
611
612 /* power-up HDMI IC */
613 regulator_autoset_by_name("v1v2_hdmi", NULL);
614 regulator_autoset_by_name("v3v3_hdmi", NULL);
615
616error:
617 return ret;
618}
619
620static bool board_is_dk2(void)
621{
Patrick Delaunay84625482020-01-13 15:17:42 +0100622 if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
Patrick Delaunayd573e462019-07-30 19:16:38 +0200623 of_machine_is_compatible("st,stm32mp157c-dk2"))
624 return true;
625
626 return false;
627}
628#endif
629
Patrick Delaunay055065a2020-04-22 14:29:13 +0200630static bool board_is_ev1(void)
631{
632 if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
633 (of_machine_is_compatible("st,stm32mp157a-ev1") ||
634 of_machine_is_compatible("st,stm32mp157c-ev1") ||
635 of_machine_is_compatible("st,stm32mp157d-ev1") ||
636 of_machine_is_compatible("st,stm32mp157f-ev1")))
637 return true;
638
639 return false;
640}
641
642/* touchscreen driver: only used for pincontrol configuration */
643static const struct udevice_id goodix_ids[] = {
644 { .compatible = "goodix,gt9147", },
645 { }
646};
647
648U_BOOT_DRIVER(goodix) = {
649 .name = "goodix",
650 .id = UCLASS_NOP,
651 .of_match = goodix_ids,
652};
653
654static void board_ev1_init(void)
655{
656 struct udevice *dev;
657
658 /* configure IRQ line on EV1 for touchscreen before LCD reset */
659 uclass_get_device_by_driver(UCLASS_NOP, DM_GET_DRIVER(goodix), &dev);
660}
661
Patrick Delaunayf8598d92018-03-12 10:46:18 +0100662/* board dependent setup after realloc */
663int board_init(void)
664{
Patrice Chotard8b4afe82019-03-11 11:13:17 +0100665 struct udevice *dev;
666
Patrick Delaunayf8598d92018-03-12 10:46:18 +0100667 /* address of boot parameters */
668 gd->bd->bi_boot_params = STM32_DDR_BASE + 0x100;
669
Patrice Chotard8b4afe82019-03-11 11:13:17 +0100670 /* probe all PINCTRL for hog */
671 for (uclass_first_device(UCLASS_PINCTRL, &dev);
672 dev;
673 uclass_next_device(&dev)) {
674 pr_debug("probe pincontrol = %s\n", dev->name);
675 }
676
Patrick Delaunay9a2ba282019-02-27 17:01:20 +0100677 board_key_check();
678
Patrick Delaunay055065a2020-04-22 14:29:13 +0200679 if (board_is_ev1())
680 board_ev1_init();
681
Patrick Delaunayf59ad452019-07-05 17:20:09 +0200682#ifdef CONFIG_DM_REGULATOR
Patrick Delaunayd573e462019-07-30 19:16:38 +0200683 if (board_is_dk2())
684 dk2_i2c1_fix();
685
Patrick Delaunayf59ad452019-07-05 17:20:09 +0200686 regulators_enable_boot_on(_DEBUG);
687#endif
688
Patrick Delaunay45459742019-02-27 17:01:24 +0100689 sysconf_init();
690
Patrick Delaunay71ba2cb2020-04-10 19:14:01 +0200691 if (CONFIG_IS_ENABLED(LED))
Patrick Delaunay1f5118b2018-07-27 16:37:08 +0200692 led_default_state();
693
Patrick Delaunay0c952952020-04-22 14:29:12 +0200694 setup_led(LEDST_ON);
695
Patrick Delaunayf8598d92018-03-12 10:46:18 +0100696 return 0;
697}
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100698
699int board_late_init(void)
700{
701#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
702 const void *fdt_compat;
703 int fdt_compat_len;
Patrick Delaunay8b8b3d62019-07-30 19:16:37 +0200704 int ret;
705 u32 otp;
706 struct udevice *dev;
707 char buf[10];
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100708
709 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
710 &fdt_compat_len);
711 if (fdt_compat && fdt_compat_len) {
Patrick Delaunay99f67432020-04-22 14:29:14 +0200712 if (strncmp(fdt_compat, "st,", 3) != 0) {
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100713 env_set("board_name", fdt_compat);
Patrick Delaunay99f67432020-04-22 14:29:14 +0200714 } else {
715 char dtb_name[256];
716 int buf_len = sizeof(dtb_name);
717
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100718 env_set("board_name", fdt_compat + 3);
Patrick Delaunay99f67432020-04-22 14:29:14 +0200719
720 strncpy(dtb_name, fdt_compat + 3, buf_len);
721 buf_len -= strlen(fdt_compat + 3);
722 strncat(dtb_name, ".dtb", buf_len);
723 env_set("fdtfile", dtb_name);
724 }
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100725 }
Patrick Delaunay8b8b3d62019-07-30 19:16:37 +0200726 ret = uclass_get_device_by_driver(UCLASS_MISC,
727 DM_GET_DRIVER(stm32mp_bsec),
728 &dev);
729
730 if (!ret)
731 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
732 &otp, sizeof(otp));
733 if (!ret && otp) {
734 snprintf(buf, sizeof(buf), "0x%04x", otp >> 16);
735 env_set("board_id", buf);
736
737 snprintf(buf, sizeof(buf), "0x%04x",
738 ((otp >> 8) & 0xF) - 1 + 0xA);
739 env_set("board_rev", buf);
740 }
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100741#endif
742
Patrick Delaunay41542472019-07-30 19:16:43 +0200743#ifdef CONFIG_ADC
Patrice Chotard395f1292019-02-12 16:50:40 +0100744 /* for DK1/DK2 boards */
745 board_check_usb_power();
Patrick Delaunay41542472019-07-30 19:16:43 +0200746#endif /* CONFIG_ADC */
Patrice Chotard395f1292019-02-12 16:50:40 +0100747
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100748 return 0;
749}
Patrice Chotard395f1292019-02-12 16:50:40 +0100750
751void board_quiesce_devices(void)
752{
753 setup_led(LEDST_OFF);
754}
Patrice Chotard87471642019-05-02 18:07:14 +0200755
Patrick Delaunay53e3d522019-08-01 11:29:03 +0200756/* eth init function : weak called in eqos driver */
757int board_interface_eth_init(struct udevice *dev,
758 phy_interface_t interface_type)
Christophe Roullieredacf262019-05-17 15:08:43 +0200759{
760 u8 *syscfg;
761 u32 value;
Patrick Delaunay53e3d522019-08-01 11:29:03 +0200762 bool eth_clk_sel_reg = false;
763 bool eth_ref_clk_sel_reg = false;
764
765 /* Gigabit Ethernet 125MHz clock selection. */
766 eth_clk_sel_reg = dev_read_bool(dev, "st,eth_clk_sel");
767
768 /* Ethernet 50Mhz RMII clock selection */
769 eth_ref_clk_sel_reg =
770 dev_read_bool(dev, "st,eth_ref_clk_sel");
Christophe Roullieredacf262019-05-17 15:08:43 +0200771
772 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
773
774 if (!syscfg)
775 return -ENODEV;
776
777 switch (interface_type) {
778 case PHY_INTERFACE_MODE_MII:
779 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
780 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
781 debug("%s: PHY_INTERFACE_MODE_MII\n", __func__);
782 break;
783 case PHY_INTERFACE_MODE_GMII:
784 if (eth_clk_sel_reg)
785 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
786 SYSCFG_PMCSETR_ETH_CLK_SEL;
787 else
788 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
789 debug("%s: PHY_INTERFACE_MODE_GMII\n", __func__);
790 break;
791 case PHY_INTERFACE_MODE_RMII:
792 if (eth_ref_clk_sel_reg)
793 value = SYSCFG_PMCSETR_ETH_SEL_RMII |
794 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
795 else
796 value = SYSCFG_PMCSETR_ETH_SEL_RMII;
797 debug("%s: PHY_INTERFACE_MODE_RMII\n", __func__);
798 break;
799 case PHY_INTERFACE_MODE_RGMII:
800 case PHY_INTERFACE_MODE_RGMII_ID:
801 case PHY_INTERFACE_MODE_RGMII_RXID:
802 case PHY_INTERFACE_MODE_RGMII_TXID:
803 if (eth_clk_sel_reg)
804 value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
805 SYSCFG_PMCSETR_ETH_CLK_SEL;
806 else
807 value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
808 debug("%s: PHY_INTERFACE_MODE_RGMII\n", __func__);
809 break;
810 default:
811 debug("%s: Do not manage %d interface\n",
812 __func__, interface_type);
813 /* Do not manage others interfaces */
814 return -EINVAL;
815 }
816
817 /* clear and set ETH configuration bits */
818 writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
819 SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
820 syscfg + SYSCFG_PMCCLRR);
821 writel(value, syscfg + SYSCFG_PMCSETR);
822
823 return 0;
824}
825
Patrice Chotard8f24b1a2019-05-02 18:28:05 +0200826enum env_location env_get_location(enum env_operation op, int prio)
827{
828 u32 bootmode = get_bootmode();
829
830 if (prio)
831 return ENVL_UNKNOWN;
832
833 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
834#ifdef CONFIG_ENV_IS_IN_EXT4
835 case BOOT_FLASH_SD:
836 case BOOT_FLASH_EMMC:
837 return ENVL_EXT4;
838#endif
839#ifdef CONFIG_ENV_IS_IN_UBI
840 case BOOT_FLASH_NAND:
Patrick Delaunayb664a742020-03-18 09:22:52 +0100841 case BOOT_FLASH_SPINAND:
Patrice Chotard8f24b1a2019-05-02 18:28:05 +0200842 return ENVL_UBI;
843#endif
Patrice Chotarde5c38fd2019-05-09 14:25:36 +0200844#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
845 case BOOT_FLASH_NOR:
846 return ENVL_SPI_FLASH;
847#endif
Patrice Chotard8f24b1a2019-05-02 18:28:05 +0200848 default:
849 return ENVL_NOWHERE;
850 }
851}
852
Patrice Chotard7f90cd62019-05-02 18:36:01 +0200853#if defined(CONFIG_ENV_IS_IN_EXT4)
854const char *env_ext4_get_intf(void)
855{
856 u32 bootmode = get_bootmode();
857
858 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
859 case BOOT_FLASH_SD:
860 case BOOT_FLASH_EMMC:
861 return "mmc";
862 default:
863 return "";
864 }
865}
866
867const char *env_ext4_get_dev_part(void)
868{
869 static char *const dev_part[] = {"0:auto", "1:auto", "2:auto"};
870 u32 bootmode = get_bootmode();
871
872 return dev_part[(bootmode & TAMP_BOOT_INSTANCE_MASK) - 1];
873}
874#endif
875
Patrick Delaunaye81f8d12019-07-02 13:26:07 +0200876#if defined(CONFIG_OF_BOARD_SETUP)
877int ft_board_setup(void *blob, bd_t *bd)
878{
879#ifdef CONFIG_FDT_FIXUP_PARTITIONS
880 struct node_info nodes[] = {
881 { "st,stm32f469-qspi", MTD_DEV_TYPE_NOR, },
Patrick Delaunayb664a742020-03-18 09:22:52 +0100882 { "st,stm32f469-qspi", MTD_DEV_TYPE_SPINAND},
Patrick Delaunaye81f8d12019-07-02 13:26:07 +0200883 { "st,stm32mp15-fmc2", MTD_DEV_TYPE_NAND, },
884 };
885 fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
886#endif
887
888 return 0;
889}
890#endif
Patrick Delaunaya68ae8d2019-08-02 15:07:20 +0200891
892static void board_copro_image_process(ulong fw_image, size_t fw_size)
893{
894 int ret, id = 0; /* Copro id fixed to 0 as only one coproc on mp1 */
895
896 if (!rproc_is_initialized())
897 if (rproc_init()) {
898 printf("Remote Processor %d initialization failed\n",
899 id);
900 return;
901 }
902
903 ret = rproc_load(id, fw_image, fw_size);
904 printf("Load Remote Processor %d with data@addr=0x%08lx %u bytes:%s\n",
905 id, fw_image, fw_size, ret ? " Failed!" : " Success!");
906
Fabien Dessenne790d5b32019-10-30 14:38:32 +0100907 if (!ret)
Patrick Delaunaya68ae8d2019-08-02 15:07:20 +0200908 rproc_start(id);
Patrick Delaunaya68ae8d2019-08-02 15:07:20 +0200909}
910
911U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_COPRO, board_copro_image_process);