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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Marcel Ziswilerf38f5f42017-04-01 15:43:16 -07002/*
Marcel Ziswiler4c63a602019-08-09 13:21:46 +03003 * Copyright (c) 2016-2019, Toradex, Inc.
Marcel Ziswilerf38f5f42017-04-01 15:43:16 -07004 */
5
6#ifndef _PINMUX_CONFIG_APALIS_TK1_H_
7#define _PINMUX_CONFIG_APALIS_TK1_H_
8
9#define GPIO_INIT(_port, _gpio, _init) \
10 { \
11 .gpio = TEGRA_GPIO(_port, _gpio), \
12 .init = TEGRA_GPIO_INIT_##_init, \
13 }
14
15static const struct tegra_gpio_config apalis_tk1_gpio_inits[] = {
16 /* port, pin, init_val */
17 GPIO_INIT(A, 1, IN),
18 GPIO_INIT(B, 1, IN),
19 GPIO_INIT(C, 0, OUT0),
20 GPIO_INIT(I, 5, IN),
21 GPIO_INIT(I, 6, IN),
22 GPIO_INIT(J, 0, IN),
23 GPIO_INIT(J, 2, IN),
24 GPIO_INIT(K, 2, IN),
25 GPIO_INIT(K, 7, IN),
26 GPIO_INIT(N, 2, OUT1),
Marcel Ziswilerf38f5f42017-04-01 15:43:16 -070027 GPIO_INIT(N, 7, IN),
28 GPIO_INIT(O, 5, IN),
29 GPIO_INIT(Q, 0, OUT0), /* Shift_CTRL_OE[0] */
30 GPIO_INIT(Q, 1, OUT0), /* Shift_CTRL_OE[1] */
31 GPIO_INIT(Q, 2, OUT0), /* Shift_CTRL_OE[2] */
32 GPIO_INIT(Q, 4, OUT0), /* Shift_CTRL_OE[4] */
33 GPIO_INIT(Q, 5, OUT1), /* Shift_CTRL_Dir_Out[0] */
34 GPIO_INIT(Q, 6, OUT1), /* Shift_CTRL_Dir_Out[1] */
35 GPIO_INIT(Q, 7, OUT1), /* Shift_CTRL_Dir_Out[2] */
36 GPIO_INIT(R, 0, OUT0), /* Shift_CTRL_Dir_In[0] */
37 GPIO_INIT(R, 1, OUT0), /* Shift_CTRL_Dir_In[1] */
38 GPIO_INIT(R, 2, OUT0), /* Shift_CTRL_OE[3] */
39 GPIO_INIT(S, 3, OUT0), /* Shift_CTRL_Dir_In[2] */
Marcel Ziswiler5b5de782019-08-01 11:06:31 +030040 GPIO_INIT(U, 4, OUT0), /* RESET_MOCI_CTRL */
Marcel Ziswiler4c63a602019-08-09 13:21:46 +030041 GPIO_INIT(V, 0, IN),
Marcel Ziswilerf38f5f42017-04-01 15:43:16 -070042 GPIO_INIT(W, 3, IN),
43 GPIO_INIT(W, 5, IN),
44 GPIO_INIT(BB, 0, IN),
45 GPIO_INIT(BB, 3, OUT0),
46 GPIO_INIT(BB, 4, IN),
47 GPIO_INIT(BB, 5, OUT1),
48 GPIO_INIT(BB, 6, OUT0),
49 GPIO_INIT(CC, 5, IN),
50 GPIO_INIT(DD, 3, IN),
51 GPIO_INIT(EE, 3, IN),
52 GPIO_INIT(EE, 5, IN),
53 GPIO_INIT(FF, 1, IN),
54};
55
56#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _rcv_sel) \
57 { \
58 .pingrp = PMUX_PINGRP_##_pingrp, \
59 .func = PMUX_FUNC_##_mux, \
60 .pull = PMUX_PULL_##_pull, \
61 .tristate = PMUX_TRI_##_tri, \
62 .io = PMUX_PIN_##_io, \
63 .od = PMUX_PIN_OD_##_od, \
64 .rcv_sel = PMUX_PIN_RCV_SEL_##_rcv_sel, \
65 .lock = PMUX_PIN_LOCK_DEFAULT, \
66 .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \
67 }
68
69static const struct pmux_pingrp_config apalis_tk1_pingrps[] = {
70 /* pingrp, mux, pull, tri, e_input, od, rcv_sel */
71 PINCFG(CLK_32K_OUT_PA0, SOC, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT),
72 PINCFG(UART3_CTS_N_PA1, GMI, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT),
73 PINCFG(DAP2_FS_PA2, HDA, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
74 PINCFG(DAP2_SCLK_PA3, HDA, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
75 PINCFG(DAP2_DIN_PA4, HDA, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT),
76 PINCFG(DAP2_DOUT_PA5, HDA, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
77 PINCFG(SDMMC3_CLK_PA6, SDMMC3, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
78 PINCFG(SDMMC3_CMD_PA7, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
79 PINCFG(PB0, UARTD, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT),
80 PINCFG(PB1, RSVD2, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT),
81 PINCFG(SDMMC3_DAT3_PB4, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
82 PINCFG(SDMMC3_DAT2_PB5, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
83 PINCFG(SDMMC3_DAT1_PB6, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
84 PINCFG(SDMMC3_DAT0_PB7, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
85 PINCFG(UART3_RTS_N_PC0, GMI, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
86 PINCFG(UART2_TXD_PC2, IRDA, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
87 PINCFG(UART2_RXD_PC3, IRDA, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT),
88 PINCFG(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
89 PINCFG(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
90 PINCFG(PC7, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
91 PINCFG(PG0, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
92 PINCFG(PG1, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
93 PINCFG(PG2, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
94 PINCFG(PG3, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
95 PINCFG(PG4, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
96 PINCFG(PG5, SPI4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
97 PINCFG(PG6, SPI4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
98 PINCFG(PG7, SPI4, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT),
99 PINCFG(PH0, PWM0, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
100 PINCFG(PH1, PWM1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
101 PINCFG(PH2, PWM2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
102 PINCFG(PH3, PWM3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
103 PINCFG(PH4, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
104 PINCFG(PH5, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
105 PINCFG(PH6, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
106 PINCFG(PH7, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
107 PINCFG(PI0, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
108 PINCFG(PI1, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
109 PINCFG(PI2, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
110 PINCFG(PI3, SPI4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
111 PINCFG(PI4, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
112 PINCFG(PI5, RSVD2, UP, TRISTATE, INPUT, ENABLE, DEFAULT),
113 PINCFG(PI6, RSVD1, UP, TRISTATE, INPUT, DEFAULT, DEFAULT),
114 PINCFG(PI7, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
115 PINCFG(PJ0, RSVD1, UP, TRISTATE, INPUT, ENABLE, DEFAULT),
116 PINCFG(PJ2, RSVD1, UP, TRISTATE, INPUT, ENABLE, DEFAULT),
117 PINCFG(UART2_CTS_N_PJ5, UARTB, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT),
118 PINCFG(UART2_RTS_N_PJ6, UARTB, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
119 PINCFG(PJ7, UARTD, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
120 PINCFG(PK0, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
121 PINCFG(PK1, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
122 PINCFG(PK2, RSVD1, UP, TRISTATE, INPUT, ENABLE, DEFAULT),
123 PINCFG(PK3, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
124 PINCFG(PK4, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
125 PINCFG(SPDIF_OUT_PK5, SPDIF, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
126 PINCFG(SPDIF_IN_PK6, SPDIF, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT),
127 PINCFG(PK7, RSVD2, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT),
128 PINCFG(DAP1_FS_PN0, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
129 PINCFG(DAP1_DIN_PN1, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
130 PINCFG(DAP1_DOUT_PN2, SATA, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
131 PINCFG(DAP1_SCLK_PN3, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
Marcel Ziswiler4c63a602019-08-09 13:21:46 +0300132 PINCFG(USB_VBUS_EN0_PN4, RSVD2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
133 PINCFG(USB_VBUS_EN1_PN5, RSVD2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
Marcel Ziswilerf38f5f42017-04-01 15:43:16 -0700134 PINCFG(HDMI_INT_PN7, RSVD1, DOWN, TRISTATE, INPUT, DEFAULT, NORMAL),
135 PINCFG(ULPI_DATA7_PO0, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
136 PINCFG(ULPI_DATA0_PO1, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
137 PINCFG(ULPI_DATA1_PO2, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
138 PINCFG(ULPI_DATA2_PO3, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
139 PINCFG(ULPI_DATA3_PO4, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
140 PINCFG(ULPI_DATA4_PO5, ULPI, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT),
141 PINCFG(ULPI_DATA5_PO6, ULPI, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
142 PINCFG(ULPI_DATA6_PO7, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
143 PINCFG(DAP3_FS_PP0, I2S2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
144 PINCFG(DAP3_DIN_PP1, I2S2, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT),
145 PINCFG(DAP3_DOUT_PP2, I2S2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
146 PINCFG(DAP3_SCLK_PP3, I2S2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
147 PINCFG(DAP4_FS_PP4, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
148 PINCFG(DAP4_DIN_PP5, RSVD3, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
149 PINCFG(DAP4_DOUT_PP6, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
150 PINCFG(DAP4_SCLK_PP7, RSVD3, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
151 PINCFG(KB_COL0_PQ0, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
152 PINCFG(KB_COL1_PQ1, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
153 PINCFG(KB_COL2_PQ2, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
154 PINCFG(KB_COL3_PQ3, KBC, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
155 PINCFG(KB_COL4_PQ4, KBC, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
156 PINCFG(KB_COL5_PQ5, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
157 PINCFG(KB_COL6_PQ6, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
158 PINCFG(KB_COL7_PQ7, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
159 PINCFG(KB_ROW0_PR0, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
160 PINCFG(KB_ROW1_PR1, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
161 PINCFG(KB_ROW2_PR2, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
162 PINCFG(KB_ROW3_PR3, KBC, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
163 PINCFG(KB_ROW4_PR4, RSVD3, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
164 PINCFG(KB_ROW5_PR5, RSVD3, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
165 PINCFG(KB_ROW6_PR6, KBC, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
166 PINCFG(KB_ROW7_PR7, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
167 PINCFG(KB_ROW8_PS0, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
168 PINCFG(KB_ROW9_PS1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
169 PINCFG(KB_ROW10_PS2, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
170 PINCFG(KB_ROW11_PS3, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
171 PINCFG(KB_ROW12_PS4, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
172 PINCFG(KB_ROW13_PS5, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
173 PINCFG(KB_ROW14_PS6, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
174 PINCFG(KB_ROW15_PS7, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
175 PINCFG(KB_ROW16_PT0, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
176 PINCFG(KB_ROW17_PT1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
Marcel Ziswiler4c63a602019-08-09 13:21:46 +0300177 PINCFG(GEN2_I2C_SCL_PT5, RSVD2, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
178 PINCFG(GEN2_I2C_SDA_PT6, RSVD2, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
Marcel Ziswilerf38f5f42017-04-01 15:43:16 -0700179 PINCFG(SDMMC4_CMD_PT7, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
180 PINCFG(PU0, UARTA, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
181 PINCFG(PU1, UARTA, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT),
182 PINCFG(PU2, UARTA, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT),
183 PINCFG(PU3, UARTA, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
184 PINCFG(PU4, GMI, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
185 PINCFG(PU5, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
186 PINCFG(PU6, PWM3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
Marcel Ziswiler4c63a602019-08-09 13:21:46 +0300187 PINCFG(PV0, RSVD1, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
Marcel Ziswilerf38f5f42017-04-01 15:43:16 -0700188 PINCFG(PV1, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
189 PINCFG(SDMMC3_CD_N_PV2, RSVD3, UP, TRISTATE, INPUT, DEFAULT, DEFAULT),
190 PINCFG(SDMMC1_WP_N_PV3, SDMMC1, UP, TRISTATE, INPUT, DEFAULT, DEFAULT),
Marcel Ziswiler4c63a602019-08-09 13:21:46 +0300191 PINCFG(DDC_SCL_PV4, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, NORMAL),
192 PINCFG(DDC_SDA_PV5, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, NORMAL),
Marcel Ziswilerf38f5f42017-04-01 15:43:16 -0700193 PINCFG(GPIO_W2_AUD_PW2, SPI2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
194 PINCFG(GPIO_W3_AUD_PW3, SPI6, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT),
195 PINCFG(DAP_MCLK1_PW4, EXTPERIPH1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
196 PINCFG(CLK2_OUT_PW5, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
197 PINCFG(UART3_TXD_PW6, UARTC, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
198 PINCFG(UART3_RXD_PW7, UARTC, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT),
199 PINCFG(DVFS_PWM_PX0, CLDVFS, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
200 PINCFG(GPIO_X1_AUD_PX1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
201 PINCFG(DVFS_CLK_PX2, CLDVFS, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
202 PINCFG(GPIO_X3_AUD_PX3, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
203 PINCFG(GPIO_X4_AUD_PX4, SPI2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
204 PINCFG(GPIO_X5_AUD_PX5, SPI2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
205 PINCFG(GPIO_X6_AUD_PX6, SPI2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
206 PINCFG(GPIO_X7_AUD_PX7, SPI2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
207 PINCFG(ULPI_CLK_PY0, SPI1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
208 PINCFG(ULPI_DIR_PY1, SPI1, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT),
209 PINCFG(ULPI_NXT_PY2, SPI1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
210 PINCFG(ULPI_STP_PY3, SPI1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
211 PINCFG(SDMMC1_DAT3_PY4, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
212 PINCFG(SDMMC1_DAT2_PY5, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
213 PINCFG(SDMMC1_DAT1_PY6, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
214 PINCFG(SDMMC1_DAT0_PY7, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
215 PINCFG(SDMMC1_CLK_PZ0, SDMMC1, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
216 PINCFG(SDMMC1_CMD_PZ1, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
217 PINCFG(PWR_I2C_SCL_PZ6, I2CPWR, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
218 PINCFG(PWR_I2C_SDA_PZ7, I2CPWR, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
219 PINCFG(SDMMC4_DAT0_PAA0, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
220 PINCFG(SDMMC4_DAT1_PAA1, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
221 PINCFG(SDMMC4_DAT2_PAA2, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
222 PINCFG(SDMMC4_DAT3_PAA3, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
223 PINCFG(SDMMC4_DAT4_PAA4, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
224 PINCFG(SDMMC4_DAT5_PAA5, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
225 PINCFG(SDMMC4_DAT6_PAA6, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
226 PINCFG(SDMMC4_DAT7_PAA7, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
227 PINCFG(PBB0, VGP6, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT),
228 PINCFG(CAM_I2C_SCL_PBB1, I2C3, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
229 PINCFG(CAM_I2C_SDA_PBB2, I2C3, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
230 PINCFG(PBB3, VGP3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
231 PINCFG(PBB4, VGP4, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT),
232 PINCFG(PBB5, VGP5, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
233 PINCFG(PBB6, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
234 PINCFG(PBB7, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
235 PINCFG(CAM_MCLK_PCC0, VI_ALT3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
236 PINCFG(PCC1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
237 PINCFG(PCC2, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
238 PINCFG(SDMMC4_CLK_PCC4, SDMMC4, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
239 PINCFG(CLK2_REQ_PCC5, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
240 PINCFG(PEX_L0_RST_N_PDD1, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
241 PINCFG(PEX_L0_CLKREQ_N_PDD2, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
242 PINCFG(PEX_WAKE_N_PDD3, RSVD2, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT),
243 PINCFG(PEX_L1_RST_N_PDD5, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
244 PINCFG(PEX_L1_CLKREQ_N_PDD6, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
245 PINCFG(CLK3_OUT_PEE0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
246 PINCFG(CLK3_REQ_PEE1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
247 PINCFG(DAP_MCLK1_REQ_PEE2, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
248 PINCFG(HDMI_CEC_PEE3, CEC, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
249 /*
250 * Leave SDMMC3_CLK_LB_OUT muxed as SDMMC3 with output driver enabled aka not
251 * tristated and input driver enabled as well as it features some magic
252 * properties even though the external loopback is disabled and the internal
253 * loopback used as per SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1 bits
254 * being set to 0xfffd according to the TRM!
255 */
256 PINCFG(SDMMC3_CLK_LB_OUT_PEE4, SDMMC3, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
257 PINCFG(SDMMC3_CLK_LB_IN_PEE5, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
258 PINCFG(DP_HPD_PFF0, DP, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
259 PINCFG(USB_VBUS_EN2_PFF1, RSVD2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
260 PINCFG(PFF2, RSVD2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
261 PINCFG(CORE_PWR_REQ, PWRON, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
262 PINCFG(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
263 PINCFG(PWR_INT_N, PMI, UP, TRISTATE, INPUT, DEFAULT, DEFAULT),
264 PINCFG(RESET_OUT_N, RESET_OUT_N, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
265 PINCFG(OWR, RSVD2, NORMAL, TRISTATE, OUTPUT, DEFAULT, NORMAL),
266 PINCFG(CLK_32K_IN, CLK, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT),
267 PINCFG(JTAG_RTCK, RTCK, UP, NORMAL, OUTPUT, DEFAULT, DEFAULT),
268};
269
270#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
271 { \
272 .drvgrp = PMUX_DRVGRP_##_drvgrp, \
273 .slwf = _slwf, \
274 .slwr = _slwr, \
275 .drvup = _drvup, \
276 .drvdn = _drvdn, \
277 .lpmd = PMUX_LPMD_##_lpmd, \
278 .schmt = PMUX_SCHMT_##_schmt, \
279 .hsm = PMUX_HSM_##_hsm, \
280 }
281
282static const struct pmux_drvgrp_config apalis_tk1_drvgrps[] = {
283};
284
285#endif /* PINMUX_CONFIG_APALIS_TK1_H */