| Oleh Kravchenko | 1180bae | 2021-05-15 00:18:33 +0300 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | // Copyright (C) 2021 Oleh Kravchenko <oleg@kaa.org.ua> |
| 3 | |
| 4 | /dts-v1/; |
| 5 | |
| 6 | #include "o4-imx6ull-nano.dtsi" |
| 7 | |
| 8 | / { |
| 9 | model = "EV-iMX280-NANO-X-MB"; |
| 10 | compatible = "evodbg,ev-imx280-nano-x-mb", |
| 11 | "out4,o4-imx6ull-nano", |
| 12 | "fsl,imx6ull"; |
| 13 | |
| 14 | aliases { |
| 15 | mmc1 = &usdhc1; |
| 16 | }; |
| 17 | |
| 18 | chosen { |
| 19 | stdout-path = &uart1; |
| 20 | }; |
| 21 | }; |
| 22 | |
| 23 | &iomuxc { |
| 24 | pinctrl_uart1: uart1grp { |
| 25 | fsl,pins = < |
| 26 | MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 |
| 27 | MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 |
| 28 | >; |
| 29 | }; |
| 30 | |
| 31 | pinctrl_usdhc1: usdhc1grp { |
| 32 | fsl,pins = < |
| 33 | MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10069 |
| 34 | MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 |
| 35 | MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 |
| 36 | MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 |
| 37 | MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 |
| 38 | MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 |
| 39 | MX6UL_PAD_UART1_RTS_B__USDHC1_CD_B 0x03029 |
| 40 | >; |
| 41 | }; |
| 42 | |
| 43 | pinctrl_mdio: mdiogrp { |
| 44 | fsl,pins = < |
| 45 | MX6UL_PAD_GPIO1_IO06__ENET1_MDIO 0x1b0b0 |
| 46 | MX6UL_PAD_GPIO1_IO07__ENET1_MDC 0x1b0b0 |
| 47 | MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0xb0b0 /* RST */ |
| 48 | >; |
| 49 | }; |
| 50 | |
| 51 | pinctrl_usb_otg1_id: usbotg1idgrp { |
| 52 | fsl,pins = < |
| 53 | MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059 |
| 54 | >; |
| 55 | }; |
| 56 | }; |
| 57 | |
| 58 | &uart1 { |
| 59 | pinctrl-0 = <&pinctrl_uart1>; |
| 60 | pinctrl-names = "default"; |
| 61 | status = "okay"; |
| 62 | }; |
| 63 | |
| 64 | &usdhc1 { |
| 65 | bus-width = <4>; |
| 66 | no-1-8-v; |
| 67 | pinctrl-0 = <&pinctrl_usdhc1>; |
| 68 | pinctrl-names = "default"; |
| 69 | status = "okay"; |
| 70 | wakeup-source; |
| 71 | }; |
| 72 | |
| 73 | &fec1 { |
| 74 | phy-handle = <&phy0>; |
| 75 | phy-mode = "rmii"; |
| 76 | phy-reset-duration = <250>; |
| 77 | phy-reset-post-delay = <100>; |
| 78 | phy-reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; |
| 79 | pinctrl-0 = <&pinctrl_fec1 &pinctrl_mdio>; |
| 80 | pinctrl-names = "default"; |
| 81 | status = "okay"; |
| 82 | |
| 83 | mdio { |
| 84 | #address-cells = <1>; |
| 85 | #size-cells = <0>; |
| 86 | |
| 87 | phy0: ethernet-phy@0 { |
| 88 | clocks = <&clks IMX6UL_CLK_ENET_REF>; |
| 89 | clock-names = "rmii-ref"; |
| 90 | interrupt-parent = <&gpio5>; |
| 91 | interrupts = <7 IRQ_TYPE_EDGE_FALLING>; |
| 92 | pinctrl-0 = <&pinctrl_phy0_irq>; |
| 93 | pinctrl-names = "default"; |
| 94 | reg = <0>; |
| 95 | }; |
| 96 | }; |
| 97 | }; |
| 98 | |
| 99 | &usbotg1 { |
| 100 | dr_mode = "otg"; |
| 101 | pinctrl-0 = <&pinctrl_usb_otg1_id>; |
| 102 | pinctrl-names = "default"; |
| 103 | status = "okay"; |
| 104 | }; |
| 105 | |
| 106 | &usbotg2 { |
| 107 | dr_mode = "host"; |
| 108 | status = "okay"; |
| 109 | }; |