Dirk Behme | 5ed3e86 | 2008-12-14 09:47:14 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2008 |
| 3 | * Texas Instruments, <www.ti.com> |
| 4 | * |
| 5 | * Richard Woodruff <r-woodruff2@ti.com> |
| 6 | * Syed Mohammed Khasim <khasim@ti.com> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | #include <common.h> |
| 25 | #include <asm/io.h> |
Dirk Behme | 5ed3e86 | 2008-12-14 09:47:14 +0100 | [diff] [blame] | 26 | |
| 27 | /************************************************************ |
| 28 | * sdelay() - simple spin loop. Will be constant time as |
| 29 | * its generally used in bypass conditions only. This |
| 30 | * is necessary until timers are accessible. |
| 31 | * |
| 32 | * not inline to increase chances its in cache when called |
| 33 | *************************************************************/ |
| 34 | void sdelay(unsigned long loops) |
| 35 | { |
| 36 | __asm__ volatile ("1:\n" "subs %0, %1, #1\n" |
| 37 | "bne 1b":"=r" (loops):"0"(loops)); |
| 38 | } |
| 39 | |
| 40 | /***************************************************************** |
| 41 | * sr32 - clear & set a value in a bit range for a 32 bit address |
| 42 | *****************************************************************/ |
| 43 | void sr32(void *addr, u32 start_bit, u32 num_bits, u32 value) |
| 44 | { |
| 45 | u32 tmp, msk = 0; |
| 46 | msk = 1 << num_bits; |
| 47 | --msk; |
| 48 | tmp = readl((u32)addr) & ~(msk << start_bit); |
| 49 | tmp |= value << start_bit; |
| 50 | writel(tmp, (u32)addr); |
| 51 | } |
| 52 | |
| 53 | /********************************************************************* |
| 54 | * wait_on_value() - common routine to allow waiting for changes in |
| 55 | * volatile regs. |
| 56 | *********************************************************************/ |
| 57 | u32 wait_on_value(u32 read_bit_mask, u32 match_value, void *read_addr, |
| 58 | u32 bound) |
| 59 | { |
| 60 | u32 i = 0, val; |
| 61 | do { |
| 62 | ++i; |
| 63 | val = readl((u32)read_addr) & read_bit_mask; |
| 64 | if (val == match_value) |
| 65 | return 1; |
| 66 | if (i == bound) |
| 67 | return 0; |
| 68 | } while (1); |
| 69 | } |