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wdenkc6097192002-11-03 00:24:07 +00001
2/******************************************************************************/
3/* */
4/* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2000 Broadcom */
5/* Corporation. */
6/* All rights reserved. */
7/* */
8/* This program is free software; you can redistribute it and/or modify */
9/* it under the terms of the GNU General Public License as published by */
10/* the Free Software Foundation, located in the file LICENSE. */
11/* */
12/******************************************************************************/
13
14#ifndef MM_H
15#define MM_H
16
17#define __raw_readl readl
18#define __raw_writel writel
19
20#define BIG_ENDIAN_HOST 1
21#define readl(addr) (*(volatile unsigned int*)(addr))
22#define writel(b,addr) ((*(volatile unsigned int *) (addr)) = (b))
23
24/* Define memory barrier function here if needed */
25#define wmb()
26#define membar()
27#include <common.h>
28#include <asm/types.h>
29#include "bcm570x_lm.h"
30#include "bcm570x_queue.h"
31#include "tigon3.h"
32#include <pci.h>
33
34#define FALSE 0
35#define TRUE 1
36#define ERROR -1
37
38#if DBG
39#define STATIC
40#else
41#define STATIC static
42#endif
43
44extern int MM_Packet_Desc_Size;
45
46#define MM_PACKET_DESC_SIZE MM_Packet_Desc_Size
47
48DECLARE_QUEUE_TYPE(UM_RX_PACKET_Q, MAX_RX_PACKET_DESC_COUNT+1);
49
50#define MAX_MEM 16
51
52/* Synch */
53typedef int mutex_t;
54typedef int spinlock_t;
55
56/* Embedded device control */
57typedef struct _UM_DEVICE_BLOCK {
58 LM_DEVICE_BLOCK lm_dev;
wdenk8bde7f72003-06-27 21:31:46 +000059 pci_dev_t pdev;
wdenkc6097192002-11-03 00:24:07 +000060 char *name;
61 void *mem_list[MAX_MEM];
62 dma_addr_t dma_list[MAX_MEM];
63 int mem_size_list[MAX_MEM];
64 int mem_list_num;
wdenk8bde7f72003-06-27 21:31:46 +000065 int mtu;
66 int index;
wdenkc6097192002-11-03 00:24:07 +000067 int opened;
68 int delayed_link_ind; /* Delay link status during initial load */
69 int adapter_just_inited; /* the first few seconds after init. */
70 int spurious_int; /* new -- unsupported */
71 int timer_interval;
72 int adaptive_expiry;
73 int crc_counter_expiry; /* new -- unsupported */
74 int poll_tib_expiry; /* new -- unsupported */
wdenk8bde7f72003-06-27 21:31:46 +000075 int tx_full;
wdenkc6097192002-11-03 00:24:07 +000076 int tx_queued;
77 int line_speed; /* in Mbps, 0 if link is down */
78 UM_RX_PACKET_Q rx_out_of_buf_q;
79 int rx_out_of_buf;
80 int rx_low_buf_thresh; /* changed to rx_buf_repl_thresh */
81 int rx_buf_repl_panic_thresh;
82 int rx_buf_align; /* new -- unsupported */
83 int do_global_lock;
wdenk8bde7f72003-06-27 21:31:46 +000084 mutex_t global_lock;
85 mutex_t undi_lock;
wdenkc6097192002-11-03 00:24:07 +000086 long undi_flags;
87 volatile int interrupt;
88 int tasklet_pending;
89 int tasklet_busy; /* new -- unsupported */
wdenk8bde7f72003-06-27 21:31:46 +000090 int rx_pkt;
91 int tx_pkt;
wdenkc6097192002-11-03 00:24:07 +000092#ifdef NICE_SUPPORT /* unsupported, this is a linux ioctl */
93 void (*nice_rx)(void*, void* );
94 void* nice_ctx;
95#endif /* NICE_SUPPORT */
96 int rx_adaptive_coalesce;
97 unsigned int rx_last_cnt;
98 unsigned int tx_last_cnt;
99 unsigned int rx_curr_coalesce_frames;
100 unsigned int rx_curr_coalesce_ticks;
101 unsigned int tx_curr_coalesce_frames; /* new -- unsupported */
102#if TIGON3_DEBUG /* new -- unsupported */
wdenk8bde7f72003-06-27 21:31:46 +0000103 uint tx_zc_count;
104 uint tx_chksum_count;
105 uint tx_himem_count;
106 uint rx_good_chksum_count;
wdenkc6097192002-11-03 00:24:07 +0000107#endif
wdenk8bde7f72003-06-27 21:31:46 +0000108 unsigned int rx_bad_chksum_count; /* new -- unsupported */
109 unsigned int rx_misc_errors; /* new -- unsupported */
wdenkc6097192002-11-03 00:24:07 +0000110} UM_DEVICE_BLOCK, *PUM_DEVICE_BLOCK;
111
112
113/* Physical/PCI DMA address */
114typedef union {
wdenk8bde7f72003-06-27 21:31:46 +0000115 dma_addr_t dma_map;
wdenkc6097192002-11-03 00:24:07 +0000116} dma_map_t;
117
118/* Packet */
119typedef struct
120_UM_PACKET {
121 LM_PACKET lm_packet;
122 void* skbuff; /* Address of packet buffer */
123} UM_PACKET, *PUM_PACKET;
124
125#define MM_ACQUIRE_UNDI_LOCK(_pDevice)
126#define MM_RELEASE_UNDI_LOCK(_pDevice)
127#define MM_ACQUIRE_INT_LOCK(_pDevice)
128#define MM_RELEASE_INT_LOCK(_pDevice)
129#define MM_UINT_PTR(_ptr) ((unsigned long) (_ptr))
130
131/* Macro for setting 64bit address struct */
132#define set_64bit_addr(paddr, low, high) \
wdenk8bde7f72003-06-27 21:31:46 +0000133 (paddr)->Low = low; \
134 (paddr)->High = high;
wdenkc6097192002-11-03 00:24:07 +0000135
136/* Assume that PCI controller's view of host memory is same as host */
137
138#define MEM_TO_PCI_PHYS(addr) (addr)
139
140extern void MM_SetAddr (LM_PHYSICAL_ADDRESS *paddr, dma_addr_t addr);
141extern void MM_SetT3Addr(T3_64BIT_HOST_ADDR *paddr, dma_addr_t addr);
142extern void MM_MapTxDma (PLM_DEVICE_BLOCK pDevice,
143 struct _LM_PACKET *pPacket, T3_64BIT_HOST_ADDR *paddr,
144 LM_UINT32 *len, int frag);
145extern void MM_MapRxDma ( PLM_DEVICE_BLOCK pDevice,
146 struct _LM_PACKET *pPacket,
147 T3_64BIT_HOST_ADDR *paddr);
148
149
150/* BSP needs to provide sysUsecDelay and sysSerialPrintString */
151extern void sysSerialPrintString (char *s);
152#define MM_Wait(usec) udelay(usec)
153
154/* Define memory barrier function here if needed */
155#define wmb()
156
157#if 0
158#define cpu_to_le32(val) LONGSWAP(val)
159#endif
160#endif /* MM_H */