| Sumit Garg | e555d4c | 2022-08-04 19:57:17 +0530 | [diff] [blame] | 1 | Qualcomm SPMI PMICs multi-function device bindings |
| 2 | |
| 3 | The Qualcomm SPMI series presently includes PM8941, PM8841 and PMA8084 |
| 4 | PMICs. These PMICs use a QPNP scheme through SPMI interface. |
| 5 | QPNP is effectively a partitioning scheme for dividing the SPMI extended |
| 6 | register space up into logical pieces, and set of fixed register |
| 7 | locations/definitions within these regions, with some of these regions |
| 8 | specifically used for interrupt handling. |
| 9 | |
| 10 | The QPNP PMICs are used with the Qualcomm Snapdragon series SoCs, and are |
| 11 | interfaced to the chip via the SPMI (System Power Management Interface) bus. |
| 12 | Support for multiple independent functions are implemented by splitting the |
| 13 | 16-bit SPMI slave address space into 256 smaller fixed-size regions, 256 bytes |
| 14 | each. A function can consume one or more of these fixed-size register regions. |
| 15 | |
| 16 | Required properties: |
| 17 | - compatible: Should contain one of: |
| 18 | "qcom,pm660", |
| 19 | "qcom,pm660l", |
| 20 | "qcom,pm7325", |
| 21 | "qcom,pm8004", |
| 22 | "qcom,pm8005", |
| 23 | "qcom,pm8019", |
| 24 | "qcom,pm8028", |
| 25 | "qcom,pm8110", |
| 26 | "qcom,pm8150", |
| 27 | "qcom,pm8150b", |
| 28 | "qcom,pm8150c", |
| 29 | "qcom,pm8150l", |
| 30 | "qcom,pm8226", |
| 31 | "qcom,pm8350c", |
| 32 | "qcom,pm8841", |
| 33 | "qcom,pm8901", |
| 34 | "qcom,pm8909", |
| 35 | "qcom,pm8916", |
| 36 | "qcom,pm8941", |
| 37 | "qcom,pm8950", |
| 38 | "qcom,pm8953", |
| 39 | "qcom,pm8994", |
| 40 | "qcom,pm8998", |
| 41 | "qcom,pma8084", |
| 42 | "qcom,pmd9635", |
| 43 | "qcom,pmi8950", |
| 44 | "qcom,pmi8962", |
| 45 | "qcom,pmi8994", |
| 46 | "qcom,pmi8998", |
| 47 | "qcom,pmk8002", |
| 48 | "qcom,pmk8350", |
| 49 | "qcom,pmr735a", |
| 50 | "qcom,smb2351", |
| 51 | or generalized "qcom,spmi-pmic". |
| 52 | - reg: Specifies the SPMI USID slave address for this device. |
| 53 | For more information see: |
| 54 | Documentation/devicetree/bindings/spmi/spmi.yaml |
| 55 | |
| 56 | Required properties for peripheral child nodes: |
| 57 | - compatible: Should contain "qcom,xxx", where "xxx" is a peripheral name. |
| 58 | |
| 59 | Optional properties for peripheral child nodes: |
| 60 | - interrupts: Interrupts are specified as a 4-tuple. For more information |
| 61 | see: |
| 62 | Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.yaml |
| 63 | - interrupt-names: Corresponding interrupt name to the interrupts property |
| 64 | |
| 65 | Each child node of SPMI slave id represents a function of the PMIC. In the |
| 66 | example below the rtc device node represents a peripheral of pm8941 |
| 67 | SID = 0. The regulator device node represents a peripheral of pm8941 SID = 1. |
| 68 | |
| 69 | Example: |
| 70 | |
| 71 | spmi { |
| 72 | compatible = "qcom,spmi-pmic-arb"; |
| 73 | |
| 74 | pm8941@0 { |
| 75 | compatible = "qcom,pm8941", "qcom,spmi-pmic"; |
| 76 | reg = <0x0 SPMI_USID>; |
| 77 | |
| 78 | rtc { |
| 79 | compatible = "qcom,rtc"; |
| 80 | interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>; |
| 81 | interrupt-names = "alarm"; |
| 82 | }; |
| 83 | }; |
| 84 | |
| 85 | pm8941@1 { |
| 86 | compatible = "qcom,pm8941", "qcom,spmi-pmic"; |
| 87 | reg = <0x1 SPMI_USID>; |
| 88 | |
| 89 | regulator { |
| 90 | compatible = "qcom,regulator"; |
| 91 | regulator-name = "8941_boost"; |
| 92 | }; |
| 93 | }; |
| 94 | }; |