Mike Frysinger | e82d8a1 | 2008-10-12 21:36:22 -0400 | [diff] [blame] | 1 | /* |
Bin Meng | a187559 | 2016-02-05 19:30:11 -0800 | [diff] [blame] | 2 | * U-Boot - Configuration file for CM-BF533 board |
Mike Frysinger | e82d8a1 | 2008-10-12 21:36:22 -0400 | [diff] [blame] | 3 | */ |
| 4 | |
| 5 | #ifndef __CONFIG_CM_BF533_H__ |
| 6 | #define __CONFIG_CM_BF533_H__ |
| 7 | |
Mike Frysinger | f348ab8 | 2009-04-24 17:22:40 -0400 | [diff] [blame] | 8 | #include <asm/config-pre.h> |
Mike Frysinger | e82d8a1 | 2008-10-12 21:36:22 -0400 | [diff] [blame] | 9 | |
Mike Frysinger | e82d8a1 | 2008-10-12 21:36:22 -0400 | [diff] [blame] | 10 | /* |
| 11 | * Processor Settings |
| 12 | */ |
Mike Frysinger | fbcf8e8 | 2010-12-23 14:58:37 -0500 | [diff] [blame] | 13 | #define CONFIG_BFIN_CPU bf533-0.3 |
Mike Frysinger | e82d8a1 | 2008-10-12 21:36:22 -0400 | [diff] [blame] | 14 | #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS |
| 15 | |
Mike Frysinger | e82d8a1 | 2008-10-12 21:36:22 -0400 | [diff] [blame] | 16 | /* |
| 17 | * Clock Settings |
| 18 | * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV |
| 19 | * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV |
| 20 | */ |
| 21 | /* CONFIG_CLKIN_HZ is any value in Hz */ |
| 22 | #define CONFIG_CLKIN_HZ 25000000 |
| 23 | /* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ |
| 24 | /* 1 = CLKIN / 2 */ |
| 25 | #define CONFIG_CLKIN_HALF 0 |
| 26 | /* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ |
| 27 | /* 1 = bypass PLL */ |
| 28 | #define CONFIG_PLL_BYPASS 0 |
| 29 | /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ |
| 30 | /* Values can range from 0-63 (where 0 means 64) */ |
| 31 | #define CONFIG_VCO_MULT 22 |
| 32 | /* CCLK_DIV controls the core clock divider */ |
| 33 | /* Values can be 1, 2, 4, or 8 ONLY */ |
| 34 | #define CONFIG_CCLK_DIV 1 |
| 35 | /* SCLK_DIV controls the system clock divider */ |
| 36 | /* Values can range from 1-15 */ |
| 37 | #define CONFIG_SCLK_DIV 5 |
| 38 | |
Harald Krapfenbauer | fd04a05 | 2009-10-14 08:37:32 -0400 | [diff] [blame] | 39 | /* Decrease core voltage */ |
| 40 | #define CONFIG_VR_CTL_VAL (VLEV_115 | GAIN_20 | FREQ_1000) |
| 41 | |
Mike Frysinger | e82d8a1 | 2008-10-12 21:36:22 -0400 | [diff] [blame] | 42 | /* |
| 43 | * Memory Settings |
| 44 | */ |
| 45 | #define CONFIG_MEM_ADD_WDTH 9 |
| 46 | #define CONFIG_MEM_SIZE 32 |
| 47 | |
| 48 | #define CONFIG_EBIU_SDRRC_VAL ((((CONFIG_SCLK_HZ / 1000) * 64) / 8192) - (7 + 2)) |
| 49 | #define CONFIG_EBIU_SDGCTL_VAL (SCTLE | PSS | TWR_2 | TRCD_2 | TRP_2 | TRAS_7 | PASR_ALL | CL_3) |
| 50 | |
| 51 | #define CONFIG_EBIU_AMGCTL_VAL (AMBEN_ALL) |
| 52 | #define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3) |
| 53 | #define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3) |
| 54 | |
| 55 | #define CONFIG_SYS_MONITOR_LEN (256 * 1024) |
| 56 | #define CONFIG_SYS_MALLOC_LEN (128 * 1024) |
| 57 | |
Mike Frysinger | e82d8a1 | 2008-10-12 21:36:22 -0400 | [diff] [blame] | 58 | /* |
| 59 | * Network Settings |
| 60 | */ |
| 61 | #define ADI_CMDS_NETWORK 1 |
Ben Warren | 7194ab8 | 2009-10-04 22:37:03 -0700 | [diff] [blame] | 62 | #define CONFIG_SMC91111 1 |
Mike Frysinger | e82d8a1 | 2008-10-12 21:36:22 -0400 | [diff] [blame] | 63 | #define CONFIG_SMC91111_BASE 0x20200300 |
| 64 | #define CONFIG_HOSTNAME cm-bf533 |
Mike Frysinger | e82d8a1 | 2008-10-12 21:36:22 -0400 | [diff] [blame] | 65 | |
Mike Frysinger | e82d8a1 | 2008-10-12 21:36:22 -0400 | [diff] [blame] | 66 | /* |
| 67 | * Flash Settings |
| 68 | */ |
| 69 | #define CONFIG_FLASH_CFI_DRIVER |
| 70 | #define CONFIG_SYS_FLASH_BASE 0x20000000 |
| 71 | #define CONFIG_SYS_FLASH_CFI |
| 72 | #define CONFIG_SYS_FLASH_PROTECTION |
| 73 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
| 74 | #define CONFIG_SYS_MAX_FLASH_SECT 16 |
| 75 | |
Mike Frysinger | e82d8a1 | 2008-10-12 21:36:22 -0400 | [diff] [blame] | 76 | /* |
| 77 | * Env Storage Settings |
| 78 | */ |
| 79 | #define CONFIG_ENV_IS_IN_FLASH 1 |
| 80 | #define CONFIG_ENV_OFFSET 0x20000 |
| 81 | #define CONFIG_ENV_SECT_SIZE 0x20000 |
| 82 | #define CONFIG_ENV_SIZE 0x10000 |
| 83 | |
Mike Frysinger | e82d8a1 | 2008-10-12 21:36:22 -0400 | [diff] [blame] | 84 | /* |
| 85 | * Misc Settings |
| 86 | */ |
| 87 | #define CONFIG_BAUDRATE 115200 |
| 88 | #define CONFIG_UART_CONSOLE 0 |
Harald Krapfenbauer | fd04a05 | 2009-10-14 08:37:32 -0400 | [diff] [blame] | 89 | #define CONFIG_BOOTCOMMAND "run flashboot" |
| 90 | #define FLASHBOOT_ENV_SETTINGS "flashboot=bootm 0x20040000\0" |
Mike Frysinger | e82d8a1 | 2008-10-12 21:36:22 -0400 | [diff] [blame] | 91 | |
| 92 | /* |
| 93 | * Pull in common ADI header for remaining command/environment setup |
| 94 | */ |
| 95 | #include <configs/bfin_adi_common.h> |
| 96 | |
Mike Frysinger | e82d8a1 | 2008-10-12 21:36:22 -0400 | [diff] [blame] | 97 | #endif |