| Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| Stefan Agner | c571d68 | 2016-10-05 15:27:09 -0700 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2016 Toradex AG |
| 4 | * Stefan Agner <stefan.agner@toradex.com> |
| Stefan Agner | c571d68 | 2016-10-05 15:27:09 -0700 | [diff] [blame] | 5 | */ |
| 6 | #ifndef __RN5T567_PMIC_H_ |
| 7 | #define __RN5T567_PMIC_H_ |
| 8 | |
| 9 | /* RN5T567 registers */ |
| 10 | enum { |
| 11 | RN5T567_LSIVER = 0x00, |
| 12 | RN5T567_OTPVER = 0x01, |
| 13 | RN5T567_IODAC = 0x02, |
| 14 | RN5T567_VINDAC = 0x03, |
| 15 | RN5T567_OUT32KEN = 0x05, |
| 16 | |
| 17 | RN5T567_CPUCNT = 0x06, |
| 18 | |
| 19 | RN5T567_PSWR = 0x07, |
| 20 | RN5T567_PONHIS = 0x09, |
| 21 | RN5T567_POFFHIS = 0x0A, |
| 22 | RN5T567_WATCHDOG = 0x0B, |
| 23 | RN5T567_WATCHDOGCNT = 0x0C, |
| 24 | RN5T567_PWRFUNC = 0x0D, |
| 25 | RN5T567_SLPCNT = 0x0E, |
| 26 | RN5T567_REPCNT = 0x0F, |
| 27 | RN5T567_PWRONTIMSET = 0x10, |
| 28 | RN5T567_NOETIMSETCNT = 0x11, |
| 29 | RN5T567_PWRIREN = 0x12, |
| 30 | RN5T567_PWRIRQ = 0x13, |
| 31 | RN5T567_PWRMON = 0x14, |
| 32 | RN5T567_PWRIRSEL = 0x15, |
| 33 | |
| 34 | RN5T567_DC1_SLOT = 0x16, |
| 35 | RN5T567_DC2_SLOT = 0x17, |
| 36 | RN5T567_DC3_SLOT = 0x18, |
| 37 | RN5T567_DC4_SLOT = 0x19, |
| 38 | |
| 39 | RN5T567_LDO1_SLOT = 0x1B, |
| 40 | RN5T567_LDO2_SLOT = 0x1C, |
| 41 | RN5T567_LDO3_SLOT = 0x1D, |
| 42 | RN5T567_LDO4_SLOT = 0x1E, |
| 43 | RN5T567_LDO5_SLOT = 0x1F, |
| 44 | |
| 45 | RN5T567_PSO0_SLOT = 0x25, |
| 46 | RN5T567_PSO1_SLOT = 0x26, |
| 47 | RN5T567_PSO2_SLOT = 0x27, |
| 48 | RN5T567_PSO3_SLOT = 0x28, |
| 49 | |
| 50 | RN5T567_LDORTC1_SLOT = 0x2A, |
| 51 | |
| 52 | RN5T567_DC1CTL = 0x2C, |
| 53 | RN5T567_DC1CTL2 = 0x2D, |
| 54 | RN5T567_DC2CTL = 0x2E, |
| 55 | RN5T567_DC2CTL2 = 0x2F, |
| 56 | RN5T567_DC3CTL = 0x30, |
| 57 | RN5T567_DC3CTL2 = 0x31, |
| 58 | RN5T567_DC4CTL = 0x32, |
| 59 | RN5T567_DC4CTL2 = 0x33, |
| 60 | |
| 61 | RN5T567_DC1DAC = 0x36, |
| 62 | RN5T567_DC2DAC = 0x37, |
| 63 | RN5T567_DC3DAC = 0x38, |
| 64 | RN5T567_DC4DAC = 0x39, |
| 65 | |
| 66 | RN5T567_DC1DAC_SLP = 0x3B, |
| 67 | RN5T567_DC2DAC_SLP = 0x3C, |
| 68 | RN5T567_DC3DAC_SLP = 0x3D, |
| 69 | RN5T567_DC4DAC_SLP = 0x3E, |
| 70 | |
| 71 | RN5T567_DCIREN = 0x40, |
| 72 | RN5T567_DCIRQ = 0x41, |
| 73 | RN5T567_DCIRMON = 0x42, |
| 74 | |
| 75 | RN5T567_LDOEN1 = 0x44, |
| 76 | RN5T567_LDOEN2 = 0x45, |
| 77 | RN5T567_LDODIS1 = 0x46, |
| 78 | |
| 79 | RN5T567_LDO1DAC = 0x4C, |
| 80 | RN5T567_LDO2DAC = 0x4D, |
| 81 | RN5T567_LDO3DAC = 0x4E, |
| 82 | RN5T567_LDO4DAC = 0x4F, |
| 83 | RN5T567_LDO5DAC = 0x50, |
| 84 | |
| 85 | RN5T567_LDORTC1DAC = 0x56, |
| 86 | RN5T567_LDORTC2DAC = 0x57, |
| 87 | |
| 88 | RN5T567_LDO1DAC_SLP = 0x58, |
| 89 | RN5T567_LDO2DAC_SLP = 0x59, |
| 90 | RN5T567_LDO3DAC_SLP = 0x5A, |
| 91 | RN5T567_LDO4DAC_SLP = 0x5B, |
| 92 | RN5T567_LDO5DAC_SLP = 0x5C, |
| 93 | |
| 94 | RN5T567_IOSEL = 0x90, |
| 95 | RN5T567_IOOUT = 0x91, |
| 96 | RN5T567_GPEDGE1 = 0x92, |
| 97 | RN5T567_EN_GPIR = 0x94, |
| 98 | RN5T567_IR_GPR = 0x95, |
| 99 | RN5T567_IR_GPF = 0x96, |
| 100 | RN5T567_MON_IOIN = 0x97, |
| 101 | RN5T567_GPLED_FUNC = 0x98, |
| 102 | RN5T567_INTPOL = 0x9C, |
| 103 | RN5T567_INTEN = 0x9D, |
| 104 | RN5T567_INTMON = 0x9E, |
| 105 | |
| 106 | RN5T567_PREVINDAC = 0xB0, |
| 107 | RN5T567_OVTEMP = 0xBC, |
| 108 | |
| 109 | RN5T567_NUM_OF_REGS = 0xBF, |
| 110 | }; |
| 111 | |
| 112 | #endif |