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Lokesh Vutla2d0eba32018-11-02 19:51:08 +05301// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for AM6 SoC Family Wakeup Domain peripherals
4 *
Lokesh Vutlae4978762021-02-01 11:26:39 +05305 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
Lokesh Vutla2d0eba32018-11-02 19:51:08 +05306 */
7
8&cbass_wakeup {
Tom Rinifa09b122021-09-10 17:37:43 -04009 dmsc: system-controller@44083000 {
Grygorii Strashkofd6b40b2019-02-05 17:31:21 +053010 compatible = "ti,am654-sci";
Lokesh Vutla2d0eba32018-11-02 19:51:08 +053011 ti,host-id = <12>;
Lokesh Vutla2d0eba32018-11-02 19:51:08 +053012
13 mbox-names = "rx", "tx";
14
15 mboxes= <&secure_proxy_main 11>,
16 <&secure_proxy_main 13>;
17
Tom Rinifa09b122021-09-10 17:37:43 -040018 reg-names = "debug_messages";
19 reg = <0x44083000 0x1000>;
20
Lokesh Vutla2d0eba32018-11-02 19:51:08 +053021 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
Lokesh Vutla355be912019-06-07 19:24:47 +053023 #power-domain-cells = <2>;
Lokesh Vutla2d0eba32018-11-02 19:51:08 +053024 };
25
Tom Rinifa09b122021-09-10 17:37:43 -040026 k3_clks: clock-controller {
Lokesh Vutla2d0eba32018-11-02 19:51:08 +053027 compatible = "ti,k2g-sci-clk";
28 #clock-cells = <2>;
29 };
30
31 k3_reset: reset-controller {
32 compatible = "ti,sci-reset";
33 #reset-cells = <2>;
34 };
35 };
36
Lokesh Vutlae4978762021-02-01 11:26:39 +053037 chipid@43000014 {
38 compatible = "ti,am654-chipid";
39 reg = <0x43000014 0x4>;
40 };
41
42 wkup_pmx0: pinctrl@4301c000 {
Andreas Dannenberg9bbdfdf2019-06-04 18:08:13 -050043 compatible = "pinctrl-single";
44 reg = <0x4301c000 0x118>;
45 #pinctrl-cells = <1>;
46 pinctrl-single,register-width = <32>;
47 pinctrl-single,function-mask = <0xffffffff>;
48 };
49
Lokesh Vutla2d0eba32018-11-02 19:51:08 +053050 wkup_uart0: serial@42300000 {
51 compatible = "ti,am654-uart";
52 reg = <0x42300000 0x100>;
Lokesh Vutla2d0eba32018-11-02 19:51:08 +053053 interrupts = <GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>;
54 clock-frequency = <48000000>;
55 current-speed = <115200>;
Lokesh Vutlae4978762021-02-01 11:26:39 +053056 power-domains = <&k3_pds 150 TI_SCI_PD_EXCLUSIVE>;
Lokesh Vutla2d0eba32018-11-02 19:51:08 +053057 };
Andreas Dannenbergbbe59162019-06-04 18:08:14 -050058
59 wkup_i2c0: i2c@42120000 {
60 compatible = "ti,am654-i2c", "ti,omap4-i2c";
61 reg = <0x42120000 0x100>;
62 interrupts = <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>;
63 #address-cells = <1>;
64 #size-cells = <0>;
65 clock-names = "fck";
66 clocks = <&k3_clks 115 1>;
Lokesh Vutla355be912019-06-07 19:24:47 +053067 power-domains = <&k3_pds 115 TI_SCI_PD_EXCLUSIVE>;
Andreas Dannenbergbbe59162019-06-04 18:08:14 -050068 };
Dave Gerlachbec8b942020-07-15 23:40:00 -050069
Tom Rinifa09b122021-09-10 17:37:43 -040070 intr_wkup_gpio: interrupt-controller@42200000 {
Lokesh Vutlae4978762021-02-01 11:26:39 +053071 compatible = "ti,sci-intr";
Tom Rinifa09b122021-09-10 17:37:43 -040072 reg = <0x42200000 0x200>;
Lokesh Vutlae4978762021-02-01 11:26:39 +053073 ti,intr-trigger-type = <1>;
74 interrupt-controller;
75 interrupt-parent = <&gic500>;
76 #interrupt-cells = <1>;
77 ti,sci = <&dmsc>;
78 ti,sci-dev-id = <156>;
79 ti,interrupt-ranges = <0 712 16>;
80 };
81
82 wkup_gpio0: gpio@42110000 {
83 compatible = "ti,am654-gpio", "ti,keystone-gpio";
84 reg = <0x42110000 0x100>;
85 gpio-controller;
86 #gpio-cells = <2>;
87 interrupt-parent = <&intr_wkup_gpio>;
88 interrupts = <60>, <61>, <62>, <63>;
89 interrupt-controller;
90 #interrupt-cells = <2>;
91 ti,ngpio = <56>;
92 ti,davinci-gpio-unbanked = <0>;
93 clocks = <&k3_clks 59 0>;
94 clock-names = "gpio";
95 };
96
97 wkup_vtm0: temperature-sensor@42050000 {
98 compatible = "ti,am654-vtm";
99 reg = <0x42050000 0x25c>;
100 power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>;
101 #thermal-sensor-cells = <1>;
102 };
103
104 thermal_zones: thermal-zones {
105 #include "k3-am654-industrial-thermal.dtsi"
Dave Gerlachbec8b942020-07-15 23:40:00 -0500106 };
Lokesh Vutla2d0eba32018-11-02 19:51:08 +0530107};