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Lokesh Vutlaea8ad1d2018-08-27 15:59:08 +05301// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for AM6 SoC Family
4 *
Lokesh Vutlae4978762021-02-01 11:26:39 +05305 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
Lokesh Vutlaea8ad1d2018-08-27 15:59:08 +05306 */
7
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/interrupt-controller/irq.h>
10#include <dt-bindings/interrupt-controller/arm-gic.h>
Andreas Dannenberg7e0363b2019-06-04 18:08:15 -050011#include <dt-bindings/pinctrl/k3.h>
Lokesh Vutla355be912019-06-07 19:24:47 +053012#include <dt-bindings/soc/ti,sci_pm_domain.h>
Lokesh Vutlaea8ad1d2018-08-27 15:59:08 +053013
14/ {
15 model = "Texas Instruments K3 AM654 SoC";
16 compatible = "ti,am654";
17 interrupt-parent = <&gic500>;
18 #address-cells = <2>;
19 #size-cells = <2>;
20
Lokesh Vutla2d0eba32018-11-02 19:51:08 +053021 aliases {
22 serial0 = &wkup_uart0;
23 serial1 = &mcu_uart0;
24 serial2 = &main_uart0;
25 serial3 = &main_uart1;
26 serial4 = &main_uart2;
Andreas Dannenbergbbe59162019-06-04 18:08:14 -050027 i2c0 = &wkup_i2c0;
28 i2c1 = &mcu_i2c0;
29 i2c2 = &main_i2c0;
30 i2c3 = &main_i2c1;
31 i2c4 = &main_i2c2;
32 i2c5 = &main_i2c3;
Lokesh Vutlae4978762021-02-01 11:26:39 +053033 ethernet0 = &cpsw_port1;
Lokesh Vutla2d0eba32018-11-02 19:51:08 +053034 };
35
Lokesh Vutlaea8ad1d2018-08-27 15:59:08 +053036 chosen { };
37
38 firmware {
39 optee {
40 compatible = "linaro,optee-tz";
41 method = "smc";
42 };
43
44 psci: psci {
45 compatible = "arm,psci-1.0";
46 method = "smc";
47 };
48 };
49
50 a53_timer0: timer-cl0-cpu0 {
51 compatible = "arm,armv8-timer";
52 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, /* cntpsirq */
53 <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, /* cntpnsirq */
54 <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, /* cntvirq */
55 <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; /* cnthpirq */
56 };
57
58 pmu: pmu {
Tom Rinifa09b122021-09-10 17:37:43 -040059 compatible = "arm,cortex-a53-pmu";
Lokesh Vutlaea8ad1d2018-08-27 15:59:08 +053060 /* Recommendation from GIC500 TRM Table A.3 */
61 interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
62 };
63
Suman Anna58edc6f2020-07-24 17:51:39 -050064 cbass_main: bus@100000 {
Lokesh Vutlaea8ad1d2018-08-27 15:59:08 +053065 compatible = "simple-bus";
Lokesh Vutla2d0eba32018-11-02 19:51:08 +053066 #address-cells = <2>;
67 #size-cells = <2>;
68 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
69 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
70 <0x00 0x00900000 0x00 0x00900000 0x00 0x00012000>, /* serdes */
71 <0x00 0x01000000 0x00 0x01000000 0x00 0x0af02400>, /* Most peripherals */
72 <0x00 0x30800000 0x00 0x30800000 0x00 0x0bc00000>, /* MAIN NAVSS */
Lokesh Vutlae4978762021-02-01 11:26:39 +053073 <0x00 0x70000000 0x00 0x70000000 0x00 0x00200000>, /* MSMC SRAM */
Sekhar Nori476e9912019-08-01 19:13:00 +053074 <0x00 0x10000000 0x00 0x10000000 0x00 0x10000000>, /* PCIe DAT */
Lokesh Vutlaea8ad1d2018-08-27 15:59:08 +053075 /* MCUSS Range */
Lokesh Vutla2d0eba32018-11-02 19:51:08 +053076 <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>,
77 <0x00 0x40200000 0x00 0x40200000 0x00 0x00900100>,
Lokesh Vutlae4978762021-02-01 11:26:39 +053078 <0x00 0x40f00000 0x00 0x40f00000 0x00 0x00020000>, /* CTRL_MMR0 */
Suman Annad0e134b2019-10-17 09:03:08 +053079 <0x00 0x41000000 0x00 0x41000000 0x00 0x00020000>,
80 <0x00 0x41400000 0x00 0x41400000 0x00 0x00020000>,
Lokesh Vutlae4978762021-02-01 11:26:39 +053081 <0x00 0x41c00000 0x00 0x41c00000 0x00 0x00080000>,
Lokesh Vutla2d0eba32018-11-02 19:51:08 +053082 <0x00 0x42040000 0x00 0x42040000 0x00 0x03ac2400>,
83 <0x00 0x45100000 0x00 0x45100000 0x00 0x00c24000>,
84 <0x00 0x46000000 0x00 0x46000000 0x00 0x00200000>,
Vignesh Raghavendra9e9dfc12020-02-04 11:09:51 +053085 <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>,
86 <0x00 0x50000000 0x00 0x50000000 0x00 0x8000000>,
87 <0x00 0x70000000 0x00 0x70000000 0x00 0x200000>,
88 <0x05 0x00000000 0x05 0x00000000 0x01 0x0000000>,
89 <0x07 0x00000000 0x07 0x00000000 0x01 0x0000000>;
Lokesh Vutlaea8ad1d2018-08-27 15:59:08 +053090
Suman Anna58edc6f2020-07-24 17:51:39 -050091 cbass_mcu: bus@28380000 {
Lokesh Vutlaea8ad1d2018-08-27 15:59:08 +053092 compatible = "simple-bus";
Lokesh Vutla2d0eba32018-11-02 19:51:08 +053093 #address-cells = <2>;
94 #size-cells = <2>;
95 ranges = <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>, /* MCU NAVSS*/
96 <0x00 0x40200000 0x00 0x40200000 0x00 0x00900100>, /* First peripheral window */
Grygorii Strashko5195c102019-07-09 10:30:35 +053097 <0x00 0x40f00000 0x00 0x40f00000 0x00 0x00020000>, /* CTRL_MMR0 */
Suman Annad0e134b2019-10-17 09:03:08 +053098 <0x00 0x41000000 0x00 0x41000000 0x00 0x00020000>, /* MCU R5F Core0 */
99 <0x00 0x41400000 0x00 0x41400000 0x00 0x00020000>, /* MCU R5F Core1 */
Lokesh Vutlae4978762021-02-01 11:26:39 +0530100 <0x00 0x41c00000 0x00 0x41c00000 0x00 0x00080000>, /* MCU SRAM */
Lokesh Vutla2d0eba32018-11-02 19:51:08 +0530101 <0x00 0x42040000 0x00 0x42040000 0x00 0x03ac2400>, /* WKUP */
102 <0x00 0x45100000 0x00 0x45100000 0x00 0x00c24000>, /* MMRs, remaining NAVSS */
103 <0x00 0x46000000 0x00 0x46000000 0x00 0x00200000>, /* CPSW */
Vignesh Raghavendra9e9dfc12020-02-04 11:09:51 +0530104 <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>, /* OSPI space 1 */
105 <0x00 0x50000000 0x00 0x50000000 0x00 0x8000000>, /* FSS OSPI0 data region 1 */
106 <0x05 0x00000000 0x05 0x00000000 0x01 0x0000000>, /* FSS OSPI0 data region 3*/
107 <0x07 0x00000000 0x07 0x00000000 0x01 0x0000000>; /* FSS OSPI1 data region 3*/
Lokesh Vutlaea8ad1d2018-08-27 15:59:08 +0530108
Suman Anna58edc6f2020-07-24 17:51:39 -0500109 cbass_wakeup: bus@42040000 {
Lokesh Vutlaea8ad1d2018-08-27 15:59:08 +0530110 compatible = "simple-bus";
111 #address-cells = <1>;
112 #size-cells = <1>;
113 /* WKUP Basic peripherals */
Lokesh Vutla2d0eba32018-11-02 19:51:08 +0530114 ranges = <0x42040000 0x00 0x42040000 0x03ac2400>;
Lokesh Vutlaea8ad1d2018-08-27 15:59:08 +0530115 };
116 };
117 };
118};
119
120/* Now include the peripherals for each bus segments */
121#include "k3-am65-main.dtsi"
Lokesh Vutla2d0eba32018-11-02 19:51:08 +0530122#include "k3-am65-mcu.dtsi"
123#include "k3-am65-wakeup.dtsi"