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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / fa09b12dc5f67b5935fd40142e321bc13ed62b35 / . / arch / arm / mach-imx / speed.c
blob: b729187ec8178dc7d7d30f3e688b71fac769171b [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
Stefano Babicc67bee12010-02-05 15:11:27 +0100[diff] [blame]2/*
3 * (C) Copyright 2000-2003
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
6 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
7 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
Stefano Babicc67bee12010-02-05 15:11:27 +0100[diff] [blame]8 */
9
10#include <common.h>
Simon Glassd96c2602019-12-28 10:44:58 -0700[diff] [blame]11#include <clock_legacy.h>
Stefano Babicc67bee12010-02-05 15:11:27 +0100[diff] [blame]12#include <asm/arch/imx-regs.h>
Stefano Babice4d34492010-03-05 17:54:37 +0100[diff] [blame]13#include <asm/arch/clock.h>
Simon Glass401d1c42020-10-30 21:38:53 -0600[diff] [blame]14#include <asm/global_data.h>
Stefano Babicc67bee12010-02-05 15:11:27 +0100[diff] [blame]15
Yangbo Lue37ac712019-06-21 11:42:28 +0800[diff] [blame]16#ifdef CONFIG_FSL_ESDHC_IMX
John Rigby29565322010-12-20 18:27:51 -0700[diff] [blame]17DECLARE_GLOBAL_DATA_PTR;
18#endif
19
Stefano Babicc67bee12010-02-05 15:11:27 +0100[diff] [blame]20int get_clocks(void)
21{
Yangbo Lue37ac712019-06-21 11:42:28 +0800[diff] [blame]22#ifdef CONFIG_FSL_ESDHC_IMX
Michael Langer5c237122012-06-14 03:44:33 +0000[diff] [blame]23#ifdef CONFIG_FSL_USDHC
Benoît Thébaudeau32384652012-09-27 10:24:37 +0000[diff] [blame]24#if CONFIG_SYS_FSL_ESDHC_ADDR == USDHC2_BASE_ADDR
Simon Glasse9adeca2012-12-13 20:49:05 +0000[diff] [blame]25 gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
Benoît Thébaudeau32384652012-09-27 10:24:37 +0000[diff] [blame]26#elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC3_BASE_ADDR
Simon Glasse9adeca2012-12-13 20:49:05 +0000[diff] [blame]27 gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
Benoît Thébaudeau32384652012-09-27 10:24:37 +0000[diff] [blame]28#elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC4_BASE_ADDR
Simon Glasse9adeca2012-12-13 20:49:05 +0000[diff] [blame]29 gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
Michael Langer5c237122012-06-14 03:44:33 +0000[diff] [blame]30#else
Simon Glasse9adeca2012-12-13 20:49:05 +0000[diff] [blame]31 gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
Benoît Thébaudeau32384652012-09-27 10:24:37 +0000[diff] [blame]32#endif
33#else
34#if CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC2_BASE_ADDR
Simon Glasse9adeca2012-12-13 20:49:05 +0000[diff] [blame]35 gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
Benoît Thébaudeau32384652012-09-27 10:24:37 +0000[diff] [blame]36#elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC3_BASE_ADDR
Simon Glasse9adeca2012-12-13 20:49:05 +0000[diff] [blame]37 gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
Benoît Thébaudeau32384652012-09-27 10:24:37 +0000[diff] [blame]38#elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC4_BASE_ADDR
Simon Glasse9adeca2012-12-13 20:49:05 +0000[diff] [blame]39 gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
Benoît Thébaudeau32384652012-09-27 10:24:37 +0000[diff] [blame]40#else
Simon Glasse9adeca2012-12-13 20:49:05 +0000[diff] [blame]41 gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
Benoît Thébaudeau32384652012-09-27 10:24:37 +0000[diff] [blame]42#endif
Stefano Babicc67bee12010-02-05 15:11:27 +0100[diff] [blame]43#endif
Michael Langer5c237122012-06-14 03:44:33 +0000[diff] [blame]44#endif
Stefano Babicc67bee12010-02-05 15:11:27 +0100[diff] [blame]45 return 0;
46}