blob: e3cbb6f5965af7fa89eff870caac14a020092d6c [file] [log] [blame]
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +01001/* Configuration header file for Gaisler GR-XC3S-1500
2 * spartan board.
3 *
4 * (C) Copyright 2003-2005
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * (C) Copyright 2007
8 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
9 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +020010 * SPDX-License-Identifier: GPL-2.0+
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +010011 */
12
13#ifndef __CONFIG_H__
14#define __CONFIG_H__
15
16/*
17 * High Level Configuration Options
18 * (easy to change)
19 */
20
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +010021#define CONFIG_GRXC3S1500 1 /* ... on GR-XC3S-1500 board */
22
23/* CPU / AMBA BUS configuration */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020024#define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +010025
26/* Number of SPARC register windows */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020027#define CONFIG_SYS_SPARC_NWINDOWS 8
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +010028
29/*
30 * Serial console configuration
31 */
32#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020033#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +010034
35/* Partitions */
36#define CONFIG_DOS_PARTITION
37#define CONFIG_MAC_PARTITION
38#define CONFIG_ISO_PARTITION
39
40/*
41 * Supported commands
42 */
43#include <config_cmd_default.h>
44
45#define CONFIG_CMD_REGINFO
46#define CONFIG_CMD_AMBAPP
47#define CONFIG_CMD_PING
48#define CONFIG_CMD_DIAG
49#define CONFIG_CMD_IRQ
50
51/*
52 * Autobooting
53 */
54#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
55
56#define CONFIG_PREBOOT "echo;" \
57 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
58 "echo"
59
60#undef CONFIG_BOOTARGS
61
62#define CONFIG_EXTRA_ENV_SETTINGS \
63 "netdev=eth0\0" \
64 "nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw " \
65 "nfsroot=${serverip}:${rootpath}\0" \
66 "ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0" \
67 "addip=setenv bootargs ${bootargs} " \
68 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
69 ":${hostname}:${netdev}:off panic=1\0" \
70 "flash_nfs=run nfsargs addip;" \
71 "bootm ${kernel_addr}\0" \
72 "flash_self=run ramargs addip;" \
73 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
74 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
75 "scratch=40200000\0" \
Mike Frysinger3a2b9f22011-10-12 19:47:51 +000076 "getkernel=tftpboot $(scratch) $(bootfile)\0" \
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +010077 "bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.206:192.168.0.20:192.168.0.1:255.255.255.0:grxc3s1500_daniel:eth0\0" \
78 ""
79
80#define CONFIG_NETMASK 255.255.255.0
81#define CONFIG_GATEWAYIP 192.168.0.1
82#define CONFIG_SERVERIP 192.168.0.20
83#define CONFIG_IPADDR 192.168.0.206
Joe Hershberger8b3637c2011-10-13 13:03:47 +000084#define CONFIG_ROOTPATH "/export/rootfs"
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +010085#define CONFIG_HOSTNAME grxc3s1500
Joe Hershbergerb3f44c22011-10-13 13:03:48 +000086#define CONFIG_BOOTFILE "/uImage"
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +010087
88#define CONFIG_BOOTCOMMAND "run flash_self"
89
90/* Memory MAP
91 *
92 * Flash:
93 * |--------------------------------|
94 * | 0x00000000 Text & Data & BSS | *
95 * | for Monitor | *
96 * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
97 * | UNUSED / Growth | * 256kb
98 * |--------------------------------|
99 * | 0x00050000 Base custom area | *
100 * | kernel / FS | *
101 * | | * Rest of Flash
102 * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
103 * | END-0x00008000 Environment | * 32kb
104 * |--------------------------------|
105 *
106 *
107 *
108 * Main Memory:
109 * |--------------------------------|
110 * | UNUSED / scratch area |
111 * | |
112 * | |
113 * | |
114 * | |
115 * |--------------------------------|
116 * | Monitor .Text / .DATA / .BSS | * 256kb
117 * | Relocated! | *
118 * |--------------------------------|
119 * | Monitor Malloc | * 128kb (contains relocated environment)
120 * |--------------------------------|
121 * | Monitor/kernel STACK | * 64kb
122 * |--------------------------------|
123 * | Page Table for MMU systems | * 2k
124 * |--------------------------------|
125 * | PROM Code accessed from Linux | * 6kb-128b
126 * |--------------------------------|
127 * | Global data (avail from kernel)| * 128b
128 * |--------------------------------|
129 *
130 */
131
132/*
133 * Flash configuration (8,16 or 32 MB)
134 * TEXT base always at 0xFFF00000
135 * ENV_ADDR always at 0xFFF40000
136 * FLASH_BASE at 0xFC000000 for 64 MB
137 * 0xFE000000 for 32 MB
138 * 0xFF000000 for 16 MB
139 * 0xFF800000 for 8 MB
140 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200141/*#define CONFIG_SYS_NO_FLASH 1*/
142#define CONFIG_SYS_FLASH_BASE 0x00000000
143#define CONFIG_SYS_FLASH_SIZE 0x00800000
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100144
145#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200146#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */
147#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100148
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200149#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
150#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
151#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
152#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
153#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100154
155/*** CFI CONFIG ***/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200156#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200157#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200158#define CONFIG_SYS_FLASH_CFI
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100159/* Bypass cache when reading regs from flash memory */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200160#define CONFIG_SYS_FLASH_CFI_BYPASS_READ
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100161/* Buffered writes (32byte/go) instead of single accesses */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200162#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100163
164/*
165 * Environment settings
166 */
Jean-Christophe PLAGNIOL-VILLARD93f6d722008-09-10 22:48:00 +0200167/*#define CONFIG_ENV_IS_NOWHERE 1*/
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200168#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200169/* CONFIG_ENV_ADDR need to be at sector boundary */
170#define CONFIG_ENV_SIZE 0x8000
171#define CONFIG_ENV_SECT_SIZE 0x20000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200172#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SECT_SIZE)
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100173#define CONFIG_ENV_OVERWRITE 1
174
175/*
176 * Memory map
177 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200178#define CONFIG_SYS_SDRAM_BASE 0x40000000
179#define CONFIG_SYS_SDRAM_SIZE 0x4000000
180#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100181
182/* no SRAM available */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200183#undef CONFIG_SYS_SRAM_BASE
184#undef CONFIG_SYS_SRAM_SIZE
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100185
186/* Always Run U-Boot from SDRAM */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200187#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
188#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
189#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100190
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200191#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100192
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200193#define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200194#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100195
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200196#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
197#define CONFIG_SYS_STACK_SIZE (0x10000-32)
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100198
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200199#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200200#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
201# define CONFIG_SYS_RAMBOOT 1
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100202#endif
203
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200204#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
205#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
206#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100207
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200208#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
209#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100210
211/* relocated monitor area */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200212#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
213#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100214
215/* make un relocated address from relocated address */
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200216#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100217
218/*
219 * Ethernet configuration
220 */
221#define CONFIG_GRETH 1
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100222
223/* Default GRETH Ethernet HARDWARE address */
224#define GRETH_HWADDR_0 0x00
225#define GRETH_HWADDR_1 0x00
226#define GRETH_HWADDR_2 0x7a
227#define GRETH_HWADDR_3 0xcc
228#define GRETH_HWADDR_4 0x00
229#define GRETH_HWADDR_5 0x12
230
231#define CONFIG_ETHADDR 00:00:7a:cc:00:12
232#define CONFIG_PHY_ADDR 0x00
233
234/*
235 * Miscellaneous configurable options
236 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200237#define CONFIG_SYS_LONGHELP /* undef to save memory */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100238#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200239#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100240#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200241#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100242#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200243#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
244#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
245#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100246
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200247#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
248#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100249
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200250#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100251
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100252/*
253 * Various low-level settings
254 */
255
256/*-----------------------------------------------------------------------
257 * USB stuff
258 *-----------------------------------------------------------------------
259 */
260#define CONFIG_USB_CLOCK 0x0001BBBB
261#define CONFIG_USB_CONFIG 0x00005000
262
263/***** Gaisler GRLIB IP-Cores Config ********/
264
265/* AMBA Plug & Play info display on startup */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200266/*#define CONFIG_SYS_AMBAPP_PRINT_ON_STARTUP*/
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100267
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200268#define CONFIG_SYS_GRLIB_SDRAM 0
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100269
270/* See, GRLIB Docs (grip.pdf) on how to set up
271 * These the memory controller registers.
272 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200273#define CONFIG_SYS_GRLIB_MEMCFG1 (0x000000ff | (1<<11))
274#define CONFIG_SYS_GRLIB_MEMCFG2 0x82206000
275#define CONFIG_SYS_GRLIB_MEMCFG3 0x00136000
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100276
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200277#define CONFIG_SYS_GRLIB_FT_MEMCFG1 (0x000000ff | (1<<11))
278#define CONFIG_SYS_GRLIB_FT_MEMCFG2 0x82206000
279#define CONFIG_SYS_GRLIB_FT_MEMCFG3 0x00136000
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100280
281/* no DDR controller */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200282#define CONFIG_SYS_GRLIB_DDR_CFG 0x00000000
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100283
284/* no DDR2 Controller */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200285#define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000
286#define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100287
288/* Calculate scaler register value from default baudrate */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200289#define CONFIG_SYS_GRLIB_APBUART_SCALER \
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100290 ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)
291
292/* Identification string */
293#define CONFIG_IDENT_STRING "GAISLER LEON3 GR-XC3S-1500"
294
295/* default kernel command line */
296#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
297
298#endif /* __CONFIG_H */