Bo Shen | f196044 | 2014-11-10 15:46:22 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Configuration settings for the SAMA5D4 Xplained ultra board. |
| 3 | * |
| 4 | * Copyright (C) 2014 Atmel |
| 5 | * Bo Shen <voice.shen@atmel.com> |
| 6 | * |
| 7 | * SPDX-License-Identifier: GPL-2.0+ |
| 8 | */ |
| 9 | |
| 10 | #ifndef __CONFIG_H |
| 11 | #define __CONFIG_H |
| 12 | |
Wu, Josh | b2d387b | 2015-03-30 14:51:19 +0800 | [diff] [blame] | 13 | #include "at91-sama5_common.h" |
Bo Shen | f196044 | 2014-11-10 15:46:22 +0800 | [diff] [blame] | 14 | |
Wenyou Yang | fafa440 | 2017-09-01 16:26:18 +0800 | [diff] [blame^] | 15 | #define CONFIG_MISC_INIT_R |
| 16 | |
Bo Shen | f196044 | 2014-11-10 15:46:22 +0800 | [diff] [blame] | 17 | /* SDRAM */ |
| 18 | #define CONFIG_NR_DRAM_BANKS 1 |
| 19 | #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS |
| 20 | #define CONFIG_SYS_SDRAM_SIZE 0x20000000 |
| 21 | |
Bo Shen | 0b2a982 | 2014-12-15 13:24:39 +0800 | [diff] [blame] | 22 | #ifdef CONFIG_SPL_BUILD |
Wenyou Yang | 6dbadb4 | 2017-04-13 10:31:16 +0800 | [diff] [blame] | 23 | #define CONFIG_SYS_INIT_SP_ADDR 0x218000 |
Bo Shen | 0b2a982 | 2014-12-15 13:24:39 +0800 | [diff] [blame] | 24 | #else |
Bo Shen | f196044 | 2014-11-10 15:46:22 +0800 | [diff] [blame] | 25 | #define CONFIG_SYS_INIT_SP_ADDR \ |
Wenyou Yang | 6dbadb4 | 2017-04-13 10:31:16 +0800 | [diff] [blame] | 26 | (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) |
Bo Shen | 0b2a982 | 2014-12-15 13:24:39 +0800 | [diff] [blame] | 27 | #endif |
Bo Shen | f196044 | 2014-11-10 15:46:22 +0800 | [diff] [blame] | 28 | |
| 29 | #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ |
| 30 | |
Bo Shen | f196044 | 2014-11-10 15:46:22 +0800 | [diff] [blame] | 31 | #ifdef CONFIG_CMD_SF |
Bo Shen | f196044 | 2014-11-10 15:46:22 +0800 | [diff] [blame] | 32 | #define CONFIG_SF_DEFAULT_SPEED 30000000 |
| 33 | #endif |
| 34 | |
| 35 | /* NAND flash */ |
Bo Shen | f196044 | 2014-11-10 15:46:22 +0800 | [diff] [blame] | 36 | #ifdef CONFIG_CMD_NAND |
| 37 | #define CONFIG_NAND_ATMEL |
| 38 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 39 | #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 |
| 40 | /* our ALE is AD21 */ |
| 41 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) |
| 42 | /* our CLE is AD22 */ |
| 43 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) |
| 44 | #define CONFIG_SYS_NAND_ONFI_DETECTION |
| 45 | /* PMECC & PMERRLOC */ |
| 46 | #define CONFIG_ATMEL_NAND_HWECC |
| 47 | #define CONFIG_ATMEL_NAND_HW_PMECC |
| 48 | #endif |
| 49 | |
Bo Shen | f196044 | 2014-11-10 15:46:22 +0800 | [diff] [blame] | 50 | /* LCD */ |
Bo Shen | f196044 | 2014-11-10 15:46:22 +0800 | [diff] [blame] | 51 | #ifdef CONFIG_LCD |
| 52 | #define LCD_BPP LCD_COLOR16 |
| 53 | #define LCD_OUTPUT_BPP 24 |
| 54 | #define CONFIG_LCD_LOGO |
| 55 | #define CONFIG_LCD_INFO |
| 56 | #define CONFIG_LCD_INFO_BELOW_LOGO |
Bo Shen | f196044 | 2014-11-10 15:46:22 +0800 | [diff] [blame] | 57 | #define CONFIG_ATMEL_HLCD |
| 58 | #define CONFIG_ATMEL_LCD_RGB565 |
Bo Shen | f196044 | 2014-11-10 15:46:22 +0800 | [diff] [blame] | 59 | #endif |
| 60 | |
| 61 | #ifdef CONFIG_SYS_USE_SERIALFLASH |
Wu, Josh | 7a53b95 | 2015-08-19 19:11:21 +0800 | [diff] [blame] | 62 | /* override the bootcmd, bootargs and other configuration for spi flash env */ |
Bo Shen | f196044 | 2014-11-10 15:46:22 +0800 | [diff] [blame] | 63 | #elif CONFIG_SYS_USE_NANDFLASH |
Wu, Josh | dc018fe | 2015-08-19 19:11:20 +0800 | [diff] [blame] | 64 | /* override the bootcmd, bootargs and other configuration for nandflash env */ |
Bo Shen | f196044 | 2014-11-10 15:46:22 +0800 | [diff] [blame] | 65 | #elif CONFIG_SYS_USE_MMC |
Wu, Josh | 372ca03 | 2015-08-19 19:11:18 +0800 | [diff] [blame] | 66 | /* override the bootcmd, bootargs and other configuration for sd/mmc env */ |
Bo Shen | f196044 | 2014-11-10 15:46:22 +0800 | [diff] [blame] | 67 | #endif |
| 68 | |
Bo Shen | 0b2a982 | 2014-12-15 13:24:39 +0800 | [diff] [blame] | 69 | /* SPL */ |
| 70 | #define CONFIG_SPL_FRAMEWORK |
| 71 | #define CONFIG_SPL_TEXT_BASE 0x200000 |
Wenyou Yang | 6dbadb4 | 2017-04-13 10:31:16 +0800 | [diff] [blame] | 72 | #define CONFIG_SPL_MAX_SIZE 0x18000 |
Bo Shen | 0b2a982 | 2014-12-15 13:24:39 +0800 | [diff] [blame] | 73 | #define CONFIG_SPL_BSS_START_ADDR 0x20000000 |
| 74 | #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 |
| 75 | #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 |
| 76 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 |
| 77 | |
Bo Shen | 0b2a982 | 2014-12-15 13:24:39 +0800 | [diff] [blame] | 78 | #define CONFIG_SYS_MONITOR_LEN (512 << 10) |
| 79 | |
| 80 | #ifdef CONFIG_SYS_USE_MMC |
Bo Shen | 0b2a982 | 2014-12-15 13:24:39 +0800 | [diff] [blame] | 81 | #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 |
| 82 | #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" |
Bo Shen | 0b2a982 | 2014-12-15 13:24:39 +0800 | [diff] [blame] | 83 | |
| 84 | #elif CONFIG_SYS_USE_NANDFLASH |
Bo Shen | 0b2a982 | 2014-12-15 13:24:39 +0800 | [diff] [blame] | 85 | #define CONFIG_SPL_NAND_DRIVERS |
| 86 | #define CONFIG_SPL_NAND_BASE |
| 87 | #define CONFIG_PMECC_CAP 8 |
| 88 | #define CONFIG_PMECC_SECTOR_SIZE 512 |
| 89 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 |
| 90 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE |
| 91 | #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000 |
| 92 | #define CONFIG_SYS_NAND_PAGE_COUNT 64 |
| 93 | #define CONFIG_SYS_NAND_OOBSIZE 224 |
| 94 | #define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000 |
| 95 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 |
| 96 | #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER |
| 97 | |
| 98 | #elif CONFIG_SYS_USE_SERIALFLASH |
Bo Shen | 0b2a982 | 2014-12-15 13:24:39 +0800 | [diff] [blame] | 99 | #define CONFIG_SPL_SPI_LOAD |
Wenyou Yang | 6dbadb4 | 2017-04-13 10:31:16 +0800 | [diff] [blame] | 100 | #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x10000 |
Bo Shen | 0b2a982 | 2014-12-15 13:24:39 +0800 | [diff] [blame] | 101 | |
| 102 | #endif |
Bo Shen | f196044 | 2014-11-10 15:46:22 +0800 | [diff] [blame] | 103 | #endif |