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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Ilya Ledvich69632042017-09-24 09:00:25 +03002/*
3 * Copyright (C) 2015 CompuLab, Ltd.
4 *
5 * Configuration settings for the CompuLab CL-SOM-iMX7 System-on-Module.
Ilya Ledvich69632042017-09-24 09:00:25 +03006 */
7
8#ifndef __CL_SOM_IMX7_CONFIG_H
9#define __CL_SOM_IMX7_CONFIG_H
10
11#include "mx7_common.h"
12
Ilya Ledvich69632042017-09-24 09:00:25 +030013#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
14
Ilya Ledvich69632042017-09-24 09:00:25 +030015/* Network */
Ilya Ledvich69632042017-09-24 09:00:25 +030016#define CONFIG_FEC_MXC_PHYADDR 0
17
Ilya Ledvich69632042017-09-24 09:00:25 +030018/* ENET1 */
19#define IMX_FEC_BASE ENET_IPS_BASE_ADDR
20
21/* PMIC */
Ilya Ledvich69632042017-09-24 09:00:25 +030022#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
23
Tom Rini65cc0e22022-11-16 13:10:41 -050024#define CFG_SYS_I2C_PCA953X_ADDR 0x20
25#define CFG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} }
Ilya Ledvich69632042017-09-24 09:00:25 +030026
Ilya Ledvich69632042017-09-24 09:00:25 +030027#undef CONFIG_EXTRA_ENV_SETTINGS
Ilya Ledvich69632042017-09-24 09:00:25 +030028
Ilya Ledvich69632042017-09-24 09:00:25 +030029#define CONFIG_EXTRA_ENV_SETTINGS \
Ilya Ledvich69632042017-09-24 09:00:25 +030030 "script=boot.scr\0" \
31 "loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0" \
32 "loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0" \
33 "loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${fdtfile};\0" \
34 "bootscript=echo Running bootscript from ${storagetype} ...; source ${loadaddr};\0" \
35 "storagebootcmd=echo Booting from ${storagetype} ...; run ${storagetype}args; run doboot;\0" \
36 "kernel=zImage\0" \
37 "console=ttymxc0\0" \
38 "fdt_high=0xffffffff\0" \
39 "initrd_high=0xffffffff\0" \
40 "fdtfile=imx7d-sbc-imx7.dtb\0" \
41 "fdtaddr=0x83000000\0" \
42 "mmcdev_def="__stringify(CONFIG_SYS_MMC_DEV)"\0" \
43 "usbdev_def="__stringify(CONFIG_SYS_USB_DEV)"\0" \
Tom Rinide35b8f2021-12-11 14:55:52 -050044 "mmcpart=1\0" \
Ilya Ledvich69632042017-09-24 09:00:25 +030045 "usbpart=" __stringify(CONFIG_SYS_USB_IMG_LOAD_PART) "\0" \
46 "doboot=bootz ${loadaddr} - ${fdtaddr}\0" \
47 "mmc_config=mmc dev ${mmcdev}; mmc rescan\0" \
48 "mmcargs=setenv bootargs console=${console},${baudrate} " \
49 "root=/dev/mmcblk${mmcblk}p2 rootwait rw\0" \
50 "mmcbootscript=" \
51 "if run mmc_config; then " \
52 "setenv storagetype mmc;" \
53 "setenv storagedev ${mmcdev}:${mmcpart};" \
54 "if run loadscript; then " \
55 "run bootscript; " \
56 "fi; " \
57 "fi;\0" \
58 "mmcboot=" \
59 "if run mmc_config; then " \
60 "setenv storagetype mmc;" \
61 "setenv storagedev ${mmcdev}:${mmcpart};" \
62 "if run loadkernel; then " \
63 "if run loadfdt; then " \
64 "run storagebootcmd;" \
65 "fi; " \
66 "fi; " \
67 "fi;\0" \
68 "sdbootscript=setenv mmcdev ${mmcdev_def}; setenv mmcblk 0; " \
69 "run mmcbootscript\0" \
70 "usbbootscript=setenv usbdev ${usbdev_def}; " \
71 "setenv storagetype usb;" \
72 "setenv storagedev ${usbdev}:${usbpart};" \
73 "if run loadscript; then " \
74 "run bootscript; " \
75 "fi; " \
76 "sdboot=setenv mmcdev ${mmcdev_def}; setenv mmcblk 0; run mmcboot\0" \
77 "emmcbootscript=setenv mmcdev 1; setenv mmcblk 2; run mmcbootscript\0" \
78 "emmcboot=setenv mmcdev 1; setenv mmcblk 2; run mmcboot\0" \
79
Ilya Ledvich69632042017-09-24 09:00:25 +030080/* Physical Memory Map */
Ilya Ledvich69632042017-09-24 09:00:25 +030081#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
82
Tom Riniaa6e94d2022-11-16 13:10:37 -050083#define CFG_SYS_SDRAM_BASE PHYS_SDRAM
Tom Rini65cc0e22022-11-16 13:10:41 -050084#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
85#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE
Ilya Ledvich69632042017-09-24 09:00:25 +030086
Ilya Ledvich69632042017-09-24 09:00:25 +030087/* SPI Flash support */
Ilya Ledvich69632042017-09-24 09:00:25 +030088
89/* FLASH and environment organization */
Ilya Ledvich69632042017-09-24 09:00:25 +030090
91/* MMC Config*/
Ilya Ledvich69632042017-09-24 09:00:25 +030092#ifdef CONFIG_FSL_USDHC
Tom Rini6cc04542022-10-28 20:27:13 -040093#define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR
Ilya Ledvich69632042017-09-24 09:00:25 +030094
Tom Rini6cc04542022-10-28 20:27:13 -040095#define CFG_SYS_FSL_USDHC_NUM 2
Ilya Ledvich69632042017-09-24 09:00:25 +030096#endif
97
98/* USB Configs */
Ilya Ledvich69632042017-09-24 09:00:25 +030099#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
100#define CONFIG_MXC_USB_FLAGS 0
Ilya Ledvich69632042017-09-24 09:00:25 +0300101
Ilya Ledvich69632042017-09-24 09:00:25 +0300102#endif /* __CONFIG_H */