blob: e17514cd49b6ff243005ed7e3a30184aca2601ae [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Andrej Rosano3bf801a2015-04-08 18:56:30 +02002/*
3 * USB armory MkI board configuration settings
4 * http://inversepath.com/usbarmory
5 *
6 * Copyright (C) 2015, Inverse Path
7 * Andrej Rosano <andrej@inversepath.com>
Andrej Rosano3bf801a2015-04-08 18:56:30 +02008 */
9
10#ifndef __CONFIG_H
11#define __CONFIG_H
12
Gong Qianyu18fb0e32015-10-26 19:47:42 +080013#define CONFIG_SYS_FSL_CLK
Andrej Rosano3bf801a2015-04-08 18:56:30 +020014
15#include <asm/arch/imx-regs.h>
Andrej Rosano3bf801a2015-04-08 18:56:30 +020016
Andrej Rosano3bf801a2015-04-08 18:56:30 +020017/* U-Boot environment */
Andrej Rosano3bf801a2015-04-08 18:56:30 +020018#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
19#define CONFIG_ENV_SIZE (8 * 1024)
Andrej Rosano3bf801a2015-04-08 18:56:30 +020020#define CONFIG_SYS_MMC_ENV_DEV 0
21
22/* U-Boot general configurations */
23#define CONFIG_SYS_CBSIZE 512
Andrej Rosano3bf801a2015-04-08 18:56:30 +020024
25/* UART */
26#define CONFIG_MXC_UART
27#define CONFIG_MXC_UART_BASE UART1_BASE
Andrej Rosano3bf801a2015-04-08 18:56:30 +020028
29/* SD/MMC */
Andrej Rosano3bf801a2015-04-08 18:56:30 +020030#define CONFIG_SYS_FSL_ESDHC_ADDR 0
31#define CONFIG_SYS_FSL_ESDHC_NUM 1
Andrej Rosano3bf801a2015-04-08 18:56:30 +020032
33/* USB */
Andrej Rosano3bf801a2015-04-08 18:56:30 +020034#define CONFIG_USB_EHCI_MX5
Andrej Rosano3bf801a2015-04-08 18:56:30 +020035#define CONFIG_MXC_USB_PORT 1
36#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
37#define CONFIG_MXC_USB_FLAGS 0
38
39/* I2C */
Andrej Rosano3bf801a2015-04-08 18:56:30 +020040#define CONFIG_SYS_I2C
41#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)03544c62015-09-21 22:43:38 +020042#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
43#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
Andrej Rosano3bf801a2015-04-08 18:56:30 +020044
45/* Fuse */
Andrej Rosano3bf801a2015-04-08 18:56:30 +020046#define CONFIG_FSL_IIM
47
Andrej Rosano9a45ec32016-06-20 17:21:48 +020048/* U-Boot memory offsets */
Andrej Rosano3bf801a2015-04-08 18:56:30 +020049#define CONFIG_LOADADDR 0x72000000
Andrej Rosano3bf801a2015-04-08 18:56:30 +020050#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
Andrej Rosano9a45ec32016-06-20 17:21:48 +020051
52/* Linux boot */
Mario Six5bc05432018-03-28 14:38:20 +020053#define CONFIG_HOSTNAME "usbarmory"
Andrej Rosano3bf801a2015-04-08 18:56:30 +020054#define CONFIG_BOOTCOMMAND \
55 "run distro_bootcmd; " \
56 "setenv bootargs console=${console} ${bootargs_default}; " \
Andrej Rosano9a45ec32016-06-20 17:21:48 +020057 "ext2load mmc 0:1 ${kernel_addr_r} /boot/zImage; " \
Andrej Rosano3bf801a2015-04-08 18:56:30 +020058 "ext2load mmc 0:1 ${fdt_addr_r} /boot/${fdtfile}; " \
Andrej Rosano9a45ec32016-06-20 17:21:48 +020059 "bootz ${kernel_addr_r} - ${fdt_addr_r}"
Andrej Rosano3bf801a2015-04-08 18:56:30 +020060
61#define BOOT_TARGET_DEVICES(func) func(MMC, mmc, 0)
62
63#include <config_distro_bootcmd.h>
64
65#define MEM_LAYOUT_ENV_SETTINGS \
66 "kernel_addr_r=0x70800000\0" \
67 "fdt_addr_r=0x71000000\0" \
68 "scriptaddr=0x70800000\0" \
69 "pxefile_addr_r=0x70800000\0" \
70 "ramdisk_addr_r=0x73000000\0"
71
72#define CONFIG_EXTRA_ENV_SETTINGS \
73 MEM_LAYOUT_ENV_SETTINGS \
74 "bootargs_default=root=/dev/mmcblk0p1 rootwait rw\0" \
75 "fdtfile=imx53-usbarmory.dtb\0" \
76 "console=ttymxc0,115200\0" \
77 BOOTENV
78
Andrej Rosanoa02ab5e2016-06-20 17:21:49 +020079#ifndef CONFIG_CMDLINE
Andrej Rosanoa02ab5e2016-06-20 17:21:49 +020080#define USBARMORY_FIT_PATH "/boot/usbarmory.itb"
81#define USBARMORY_FIT_ADDR "0x70800000"
82#endif
83
Andrej Rosano3bf801a2015-04-08 18:56:30 +020084/* Physical Memory Map */
85#define CONFIG_NR_DRAM_BANKS 1
86#define PHYS_SDRAM CSD0_BASE_ADDR
87#define PHYS_SDRAM_SIZE (gd->ram_size)
88
89#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
90#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
91#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
92
93#define CONFIG_SYS_INIT_SP_OFFSET \
94 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
95#define CONFIG_SYS_INIT_SP_ADDR \
96 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
97
98#define CONFIG_SYS_MEMTEST_START 0x70000000
99#define CONFIG_SYS_MEMTEST_END 0x90000000
100
101#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
102
103#endif /* __CONFIG_H */