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Vaibhav Hiremathed01e452010-06-07 15:20:43 -04001/*
2 * am3517_evm.h - Default configuration for AM3517 EVM board.
3 *
4 * Author: Vaibhav Hiremath <hvaibhav@ti.com>
5 *
6 * Based on omap3_evm_config.h
7 *
8 * Copyright (C) 2010 Texas Instruments Incorporated
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
25#ifndef __CONFIG_H
26#define __CONFIG_H
27
28/*
29 * High Level Configuration Options
30 */
Vaibhav Hiremathed01e452010-06-07 15:20:43 -040031#define CONFIG_OMAP 1 /* in a TI OMAP core */
32#define CONFIG_OMAP34XX 1 /* which is a 34XX */
33#define CONFIG_OMAP3_AM3517EVM 1 /* working with AM3517EVM */
34
Vaibhav Hiremath1a5038c2010-06-07 15:20:53 -040035#define CONFIG_EMIF4 /* The chip has EMIF4 controller */
Vaibhav Hiremathed01e452010-06-07 15:20:43 -040036
37#include <asm/arch/cpu.h> /* get chip and board defs */
38#include <asm/arch/omap3.h>
39
40/*
41 * Display CPU and Board information
42 */
43#define CONFIG_DISPLAY_CPUINFO 1
44#define CONFIG_DISPLAY_BOARDINFO 1
45
46/* Clock Defines */
47#define V_OSCK 26000000 /* Clock output from T2 */
48#define V_SCLK (V_OSCK >> 1)
49
50#undef CONFIG_USE_IRQ /* no support for IRQs */
51#define CONFIG_MISC_INIT_R
52
53#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
54#define CONFIG_SETUP_MEMORY_TAGS 1
55#define CONFIG_INITRD_TAG 1
56#define CONFIG_REVISION_TAG 1
57
58/*
59 * Size of malloc() pool
60 */
61#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
62#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
Vaibhav Hiremathed01e452010-06-07 15:20:43 -040063/*
64 * DDR related
65 */
Vaibhav Hiremathed01e452010-06-07 15:20:43 -040066#define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
67
68/*
69 * Hardware drivers
70 */
71
72/*
73 * NS16550 Configuration
74 */
75#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
76
77#define CONFIG_SYS_NS16550
78#define CONFIG_SYS_NS16550_SERIAL
79#define CONFIG_SYS_NS16550_REG_SIZE (-4)
80#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
81
82/*
83 * select serial console configuration
84 */
85#define CONFIG_CONS_INDEX 3
86#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
87#define CONFIG_SERIAL3 3 /* UART3 on AM3517 EVM */
88
89/* allow to overwrite serial and ethaddr */
90#define CONFIG_ENV_OVERWRITE
91#define CONFIG_BAUDRATE 115200
92#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
93 115200}
94#define CONFIG_MMC 1
Vaibhav Hiremath122e6e02011-09-03 21:47:44 -040095#define CONFIG_GENERIC_MMC 1
96#define CONFIG_OMAP_HSMMC 1
Vaibhav Hiremathed01e452010-06-07 15:20:43 -040097#define CONFIG_DOS_PARTITION 1
98
Ajay Kumar Gupta7dc27b02010-07-09 11:43:50 +053099/*
100 * USB configuration
101 * Enable CONFIG_MUSB_HCD for Host functionalities MSC, keyboard
102 * Enable CONFIG_MUSB_UDC for Device functionalities.
103 */
104#define CONFIG_USB_AM35X 1
105#define CONFIG_MUSB_HCD 1
106
107#ifdef CONFIG_USB_AM35X
108
109#ifdef CONFIG_MUSB_HCD
110#define CONFIG_CMD_USB
111
112#define CONFIG_USB_STORAGE
113#define CONGIG_CMD_STORAGE
114#define CONFIG_CMD_FAT
115
116#ifdef CONFIG_USB_KEYBOARD
117#define CONFIG_SYS_USB_EVENT_POLL
118#define CONFIG_PREBOOT "usb start"
119#endif /* CONFIG_USB_KEYBOARD */
120
121#endif /* CONFIG_MUSB_HCD */
122
123#ifdef CONFIG_MUSB_UDC
124/* USB device configuration */
125#define CONFIG_USB_DEVICE 1
126#define CONFIG_USB_TTY 1
127#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
128/* Change these to suit your needs */
129#define CONFIG_USBD_VENDORID 0x0451
130#define CONFIG_USBD_PRODUCTID 0x5678
131#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
132#define CONFIG_USBD_PRODUCT_NAME "AM3517EVM"
133#endif /* CONFIG_MUSB_UDC */
134
135#endif /* CONFIG_USB_AM35X */
136
Vaibhav Hiremathed01e452010-06-07 15:20:43 -0400137/* commands to include */
138#include <config_cmd_default.h>
139
140#define CONFIG_CMD_EXT2 /* EXT2 Support */
141#define CONFIG_CMD_FAT /* FAT support */
142#define CONFIG_CMD_JFFS2 /* JFFS2 Support */
143
144#define CONFIG_CMD_I2C /* I2C serial bus support */
145#define CONFIG_CMD_MMC /* MMC support */
146#define CONFIG_CMD_NAND /* NAND support */
147#define CONFIG_CMD_DHCP
Joe Hershberger80615002012-05-23 07:57:57 +0000148#undef CONFIG_CMD_PING
Vaibhav Hiremathed01e452010-06-07 15:20:43 -0400149
150#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
151#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
152#undef CONFIG_CMD_IMI /* iminfo */
153#undef CONFIG_CMD_IMLS /* List all found images */
154
155#define CONFIG_SYS_NO_FLASH
156#define CONFIG_HARD_I2C 1
157#define CONFIG_SYS_I2C_SPEED 100000
158#define CONFIG_SYS_I2C_SLAVE 1
159#define CONFIG_SYS_I2C_BUS 0
160#define CONFIG_SYS_I2C_BUS_SELECT 1
161#define CONFIG_DRIVER_OMAP34XX_I2C 1
162
163#undef CONFIG_CMD_NET
Vaibhav Hiremathaa82d5f2010-11-29 16:36:07 -0500164#undef CONFIG_CMD_NFS
Vaibhav Hiremathed01e452010-06-07 15:20:43 -0400165/*
166 * Board NAND Info.
167 */
168#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
169 /* to access nand */
170#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
171 /* to access */
172 /* nand at CS0 */
173
174#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
175 /* NAND devices */
Vaibhav Hiremathed01e452010-06-07 15:20:43 -0400176#define CONFIG_JFFS2_NAND
177/* nand device jffs2 lives on */
178#define CONFIG_JFFS2_DEV "nand0"
179/* start of jffs2 partition */
180#define CONFIG_JFFS2_PART_OFFSET 0x680000
181#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */
182
183/* Environment information */
184#define CONFIG_BOOTDELAY 10
185
Joe Hershbergerb3f44c22011-10-13 13:03:48 +0000186#define CONFIG_BOOTFILE "uImage"
Vaibhav Hiremathed01e452010-06-07 15:20:43 -0400187
188#define CONFIG_EXTRA_ENV_SETTINGS \
189 "loadaddr=0x82000000\0" \
Yegor Yefremov49473ad2011-07-18 10:37:35 +0200190 "console=ttyO2,115200n8\0" \
Vaibhav Hiremath122e6e02011-09-03 21:47:44 -0400191 "mmcdev=0\0" \
Vaibhav Hiremathed01e452010-06-07 15:20:43 -0400192 "mmcargs=setenv bootargs console=${console} " \
Yegor Yefremov10f3bdd2011-07-18 15:44:42 +0200193 "root=/dev/mmcblk0p2 rw rootwait\0" \
Vaibhav Hiremathed01e452010-06-07 15:20:43 -0400194 "nandargs=setenv bootargs console=${console} " \
195 "root=/dev/mtdblock4 rw " \
196 "rootfstype=jffs2\0" \
Vaibhav Hiremath122e6e02011-09-03 21:47:44 -0400197 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
Vaibhav Hiremathed01e452010-06-07 15:20:43 -0400198 "bootscript=echo Running bootscript from mmc ...; " \
199 "source ${loadaddr}\0" \
Vaibhav Hiremath122e6e02011-09-03 21:47:44 -0400200 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
Vaibhav Hiremathed01e452010-06-07 15:20:43 -0400201 "mmcboot=echo Booting from mmc ...; " \
202 "run mmcargs; " \
203 "bootm ${loadaddr}\0" \
204 "nandboot=echo Booting from nand ...; " \
205 "run nandargs; " \
206 "nand read ${loadaddr} 280000 400000; " \
207 "bootm ${loadaddr}\0" \
208
209#define CONFIG_BOOTCOMMAND \
Vaibhav Hiremath122e6e02011-09-03 21:47:44 -0400210 "if mmc rescan ${mmcdev}; then " \
Vaibhav Hiremathed01e452010-06-07 15:20:43 -0400211 "if run loadbootscript; then " \
212 "run bootscript; " \
213 "else " \
214 "if run loaduimage; then " \
215 "run mmcboot; " \
216 "else run nandboot; " \
217 "fi; " \
218 "fi; " \
219 "else run nandboot; fi"
220
221#define CONFIG_AUTO_COMPLETE 1
222/*
223 * Miscellaneous configurable options
224 */
225#define V_PROMPT "AM3517_EVM # "
226
227#define CONFIG_SYS_LONGHELP /* undef to save memory */
228#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
Vaibhav Hiremathed01e452010-06-07 15:20:43 -0400229#define CONFIG_SYS_PROMPT V_PROMPT
230#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
231/* Print Buffer Size */
232#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
233 sizeof(CONFIG_SYS_PROMPT) + 16)
234#define CONFIG_SYS_MAXARGS 32 /* max number of command */
235 /* args */
236/* Boot Argument Buffer Size */
237#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
238/* memtest works on */
239#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
240#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
241 0x01F00000) /* 31MB */
242
243#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
244 /* address */
245
246/*
247 * AM3517 has 12 GP timers, they can be driven by the system clock
248 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
249 * This rate is divided by a local divisor.
250 */
251#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
252#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
253#define CONFIG_SYS_HZ 1000
254
255/*-----------------------------------------------------------------------
256 * Stack sizes
257 *
258 * The stack sizes are set up in start.S using the settings below
259 */
260#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
Vaibhav Hiremathed01e452010-06-07 15:20:43 -0400261
262/*-----------------------------------------------------------------------
263 * Physical Memory Map
264 */
265#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
266#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
Vaibhav Hiremathed01e452010-06-07 15:20:43 -0400267#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
268
Vaibhav Hiremathed01e452010-06-07 15:20:43 -0400269/*-----------------------------------------------------------------------
270 * FLASH and environment organization
271 */
272
273/* **** PISMO SUPPORT *** */
274
275/* Configure the PISMO */
276#define PISMO1_NAND_SIZE GPMC_SIZE_128M
277#define PISMO1_ONEN_SIZE GPMC_SIZE_128M
278
279#define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors */
280 /* on one chip */
281#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */
282#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
283
Luca Ceresoli6cbec7b2011-04-20 11:02:05 -0400284#if defined(CONFIG_CMD_NAND)
285#define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE
286#endif
Vaibhav Hiremathed01e452010-06-07 15:20:43 -0400287
288/* Monitor at start of flash */
289#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
290
291#define CONFIG_NAND_OMAP_GPMC
292#define GPMC_NAND_ECC_LP_x16_LAYOUT 1
293#define CONFIG_ENV_IS_IN_NAND 1
294#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
295
Luca Ceresoli6cbec7b2011-04-20 11:02:05 -0400296#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
297#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
298#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
Vaibhav Hiremathed01e452010-06-07 15:20:43 -0400299
300/*-----------------------------------------------------------------------
301 * CFI FLASH driver setup
302 */
303/* timeout values are in ticks */
304#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
305#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
306
307/* Flash banks JFFS2 should use */
308#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
309 CONFIG_SYS_MAX_NAND_DEVICE)
310#define CONFIG_SYS_JFFS2_MEM_NAND
311/* use flash_info[2] */
312#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
313#define CONFIG_SYS_JFFS2_NUM_BANKS 1
314
Vaibhav Hiremath13acfc62010-11-29 16:36:04 -0500315#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
316#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
317#define CONFIG_SYS_INIT_RAM_SIZE 0x800
318#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
319 CONFIG_SYS_INIT_RAM_SIZE - \
320 GENERATED_GBL_DATA_SIZE)
Tom Rini5059a2a2011-11-18 12:48:10 +0000321
322/* Defines for SPL */
323#define CONFIG_SPL
324#define CONFIG_SPL_NAND_SIMPLE
325#define CONFIG_SPL_TEXT_BASE 0x40200800
Tom Rinie0820cc2012-05-08 07:29:31 +0000326#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */
Tom Rini5059a2a2011-11-18 12:48:10 +0000327#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
328
329#define CONFIG_SPL_BSS_START_ADDR 0x80000000
330#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
331
332#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
333#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
334#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
335#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
336
337#define CONFIG_SPL_LIBCOMMON_SUPPORT
338#define CONFIG_SPL_LIBDISK_SUPPORT
339#define CONFIG_SPL_I2C_SUPPORT
340#define CONFIG_SPL_LIBGENERIC_SUPPORT
341#define CONFIG_SPL_MMC_SUPPORT
342#define CONFIG_SPL_FAT_SUPPORT
343#define CONFIG_SPL_SERIAL_SUPPORT
344#define CONFIG_SPL_NAND_SUPPORT
345#define CONFIG_SPL_POWER_SUPPORT
346#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
347
348/* NAND boot config */
349#define CONFIG_SYS_NAND_5_ADDR_CYCLE
350#define CONFIG_SYS_NAND_PAGE_COUNT 64
351#define CONFIG_SYS_NAND_PAGE_SIZE 2048
352#define CONFIG_SYS_NAND_OOBSIZE 64
353#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
354#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
355#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
356 10, 11, 12, 13}
357#define CONFIG_SYS_NAND_ECCSIZE 512
358#define CONFIG_SYS_NAND_ECCBYTES 3
Tom Rini5059a2a2011-11-18 12:48:10 +0000359#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
360#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
361
362/*
363 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
364 * 64 bytes before this address should be set aside for u-boot.img's
365 * header. That is 0x800FFFC0--0x80100000 should not be used for any
366 * other needs.
367 */
368#define CONFIG_SYS_TEXT_BASE 0x80100000
369#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
370#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
371
Vaibhav Hiremathed01e452010-06-07 15:20:43 -0400372#endif /* __CONFIG_H */