Thomas Chou | 96fa1e4 | 2015-10-22 15:29:11 +0800 | [diff] [blame] | 1 | * Altera Triple-Speed Ethernet MAC driver (TSE) |
| 2 | |
| 3 | Required properties: |
| 4 | - compatible: Should be "altr,tse-1.0" for legacy SGDMA based TSE, and should |
| 5 | be "altr,tse-msgdma-1.0" for the preferred MSGDMA based TSE. |
| 6 | - reg: Address and length of the register set for the device. It contains |
| 7 | the information of registers in the same order as described by reg-names |
| 8 | - reg-names: Should contain the reg names |
| 9 | "control_port": MAC configuration space region |
| 10 | "tx_csr": xDMA Tx dispatcher control and status space region |
| 11 | "tx_desc": MSGDMA Tx dispatcher descriptor space region |
| 12 | "rx_csr" : xDMA Rx dispatcher control and status space region |
| 13 | "rx_desc": MSGDMA Rx dispatcher descriptor space region |
| 14 | "rx_resp": MSGDMA Rx dispatcher response space region |
| 15 | "s1": SGDMA descriptor memory |
| 16 | - interrupts: Should contain the TSE interrupts and it's mode. |
| 17 | - interrupt-names: Should contain the interrupt names |
| 18 | "rx_irq": xDMA Rx dispatcher interrupt |
| 19 | "tx_irq": xDMA Tx dispatcher interrupt |
| 20 | - rx-fifo-depth: MAC receive FIFO buffer depth in bytes |
| 21 | - tx-fifo-depth: MAC transmit FIFO buffer depth in bytes |
| 22 | - phy-mode: See ethernet.txt in the same directory. |
| 23 | - phy-handle: See ethernet.txt in the same directory. |
| 24 | - phy-addr: See ethernet.txt in the same directory. A configuration should |
| 25 | include phy-handle or phy-addr. |
| 26 | - altr,has-supplementary-unicast: |
| 27 | If present, TSE supports additional unicast addresses. |
| 28 | Otherwise additional unicast addresses are not supported. |
| 29 | - altr,has-hash-multicast-filter: |
| 30 | If present, TSE supports a hash based multicast filter. |
| 31 | Otherwise, hash-based multicast filtering is not supported. |
| 32 | |
| 33 | - mdio device tree subnode: When the TSE has a phy connected to its local |
| 34 | mdio, there must be device tree subnode with the following |
| 35 | required properties: |
| 36 | |
| 37 | - compatible: Must be "altr,tse-mdio". |
| 38 | - #address-cells: Must be <1>. |
| 39 | - #size-cells: Must be <0>. |
| 40 | |
| 41 | For each phy on the mdio bus, there must be a node with the following |
| 42 | fields: |
| 43 | |
| 44 | - reg: phy id used to communicate to phy. |
| 45 | - device_type: Must be "ethernet-phy". |
| 46 | |
| 47 | Optional properties: |
| 48 | - local-mac-address: See ethernet.txt in the same directory. |
| 49 | - max-frame-size: See ethernet.txt in the same directory. |
| 50 | |
| 51 | Example: |
| 52 | |
| 53 | tse_sub_0_eth_tse_0: ethernet@0x1,00000000 { |
| 54 | compatible = "altr,tse-msgdma-1.0"; |
| 55 | reg = <0x00000001 0x00000000 0x00000400>, |
| 56 | <0x00000001 0x00000460 0x00000020>, |
| 57 | <0x00000001 0x00000480 0x00000020>, |
| 58 | <0x00000001 0x000004A0 0x00000008>, |
| 59 | <0x00000001 0x00000400 0x00000020>, |
| 60 | <0x00000001 0x00000420 0x00000020>; |
| 61 | reg-names = "control_port", "rx_csr", "rx_desc", "rx_resp", "tx_csr", "tx_desc"; |
| 62 | interrupt-parent = <&hps_0_arm_gic_0>; |
| 63 | interrupts = <0 41 4>, <0 40 4>; |
| 64 | interrupt-names = "rx_irq", "tx_irq"; |
| 65 | rx-fifo-depth = <2048>; |
| 66 | tx-fifo-depth = <2048>; |
| 67 | address-bits = <48>; |
| 68 | max-frame-size = <1500>; |
| 69 | local-mac-address = [ 00 00 00 00 00 00 ]; |
| 70 | phy-mode = "gmii"; |
| 71 | altr,has-supplementary-unicast; |
| 72 | altr,has-hash-multicast-filter; |
| 73 | phy-handle = <&phy0>; |
| 74 | mdio { |
| 75 | compatible = "altr,tse-mdio"; |
| 76 | #address-cells = <1>; |
| 77 | #size-cells = <0>; |
| 78 | phy0: ethernet-phy@0 { |
| 79 | reg = <0x0>; |
| 80 | device_type = "ethernet-phy"; |
| 81 | }; |
| 82 | |
| 83 | phy1: ethernet-phy@1 { |
| 84 | reg = <0x1>; |
| 85 | device_type = "ethernet-phy"; |
| 86 | }; |
| 87 | |
| 88 | }; |
| 89 | }; |
| 90 | |
| 91 | tse_sub_1_eth_tse_0: ethernet@0x1,00001000 { |
| 92 | compatible = "altr,tse-msgdma-1.0"; |
| 93 | reg = <0x00000001 0x00001000 0x00000400>, |
| 94 | <0x00000001 0x00001460 0x00000020>, |
| 95 | <0x00000001 0x00001480 0x00000020>, |
| 96 | <0x00000001 0x000014A0 0x00000008>, |
| 97 | <0x00000001 0x00001400 0x00000020>, |
| 98 | <0x00000001 0x00001420 0x00000020>; |
| 99 | reg-names = "control_port", "rx_csr", "rx_desc", "rx_resp", "tx_csr", "tx_desc"; |
| 100 | interrupt-parent = <&hps_0_arm_gic_0>; |
| 101 | interrupts = <0 43 4>, <0 42 4>; |
| 102 | interrupt-names = "rx_irq", "tx_irq"; |
| 103 | rx-fifo-depth = <2048>; |
| 104 | tx-fifo-depth = <2048>; |
| 105 | address-bits = <48>; |
| 106 | max-frame-size = <1500>; |
| 107 | local-mac-address = [ 00 00 00 00 00 00 ]; |
| 108 | phy-mode = "gmii"; |
| 109 | altr,has-supplementary-unicast; |
| 110 | altr,has-hash-multicast-filter; |
| 111 | phy-handle = <&phy1>; |
| 112 | }; |