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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Lokesh Vutla3ef5ebe2013-02-17 23:34:35 +00002/*
3 * (C) Copyright 2013
4 * Texas Instruments Incorporated.
5 * Lokesh Vutla <lokeshvutla@ti.com>
6 *
7 * Configuration settings for the TI DRA7XX board.
Enric Balletbò i Serra3d657a02013-12-06 21:30:19 +01008 * See ti_omap5_common.h for omap5 common settings.
Lokesh Vutla3ef5ebe2013-02-17 23:34:35 +00009 */
10
11#ifndef __CONFIG_DRA7XX_EVM_H
12#define __CONFIG_DRA7XX_EVM_H
13
Simon Glass5e541a02023-07-30 21:01:45 -060014#include <env/ti/dfu.h>
Sekhar Norif8437702016-11-25 14:25:54 +053015
Tom Rini1d457db2022-12-04 10:04:50 -050016#define CFG_MAX_MEM_MAPPED 0x80000000
Lokesh Vutla212425b2016-03-08 09:18:07 +053017
Tom Rini79b079f2014-04-03 07:52:56 -040018#ifndef CONFIG_QSPI_BOOT
Lokesh Vutlad3d33da2013-08-23 17:27:04 +053019/* MMC ENV related defines */
Tom Rini79b079f2014-04-03 07:52:56 -040020#endif
Tom Rini9552ee32013-04-05 06:21:45 +000021
Minal Shaha13cbf52013-10-04 14:52:02 -040022#if (CONFIG_CONS_INDEX == 1)
Sam Protsenkoadc097e2019-07-12 20:38:12 +030023#define CONSOLEDEV "ttyS0"
Minal Shaha13cbf52013-10-04 14:52:02 -040024#elif (CONFIG_CONS_INDEX == 3)
Sam Protsenkoadc097e2019-07-12 20:38:12 +030025#define CONSOLEDEV "ttyS2"
Minal Shaha13cbf52013-10-04 14:52:02 -040026#endif
Tom Rini91092132022-11-16 13:10:28 -050027#define CFG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */
28#define CFG_SYS_NS16550_COM2 UART2_BASE /* UART2 */
29#define CFG_SYS_NS16550_COM3 UART3_BASE /* UART3 */
Lokesh Vutla97405d82013-05-30 03:19:38 +000030
Tom Rini08520bf2015-06-12 20:52:29 -040031#ifndef CONFIG_SPL_BUILD
Kishon Vijay Abraham I7a5a3e32015-02-23 18:40:20 +053032#define DFUARGS \
33 "dfu_bufsiz=0x10000\0" \
34 DFU_ALT_INFO_MMC \
35 DFU_ALT_INFO_EMMC \
Vignesh R5486d062015-10-20 15:22:01 +053036 DFU_ALT_INFO_RAM \
37 DFU_ALT_INFO_QSPI
Tom Rini08520bf2015-06-12 20:52:29 -040038#endif
Dileep Kattabe17d392015-03-25 04:04:50 +053039
B, Ravicdb18082016-07-28 17:39:18 +053040#ifdef CONFIG_SPL_BUILD
Andrew F. Davis6536ca42019-01-17 13:43:02 -060041#ifdef CONFIG_SPL_DFU
B, Ravicdb18082016-07-28 17:39:18 +053042#define DFUARGS \
43 "dfu_bufsiz=0x10000\0" \
44 DFU_ALT_INFO_RAM
45#endif
46#endif
47
Enric Balletbò i Serra3d657a02013-12-06 21:30:19 +010048#include <configs/ti_omap5_common.h>
Dan Murphy45dbbf22013-06-11 11:22:30 -050049
Tom Rini79b079f2014-04-03 07:52:56 -040050/*
51 * Default to using SPI for environment, etc.
B, Ravi279dcd82016-09-26 18:21:13 +053052 * 0x000000 - 0x040000 : QSPI.SPL (256KiB)
Tom Rini79b079f2014-04-03 07:52:56 -040053 * 0x040000 - 0x140000 : QSPI.u-boot (1MiB)
54 * 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB)
55 * 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB)
56 * 0x1D0000 - 0x1E0000 : QSPI.u-boot-env.backup1 (64KiB)
57 * 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB)
58 * 0x9E0000 - 0x2000000 : USERLAND
59 */
Tom Rini65cc0e22022-11-16 13:10:41 -050060#define CFG_SYS_SPI_KERNEL_OFFS 0x1E0000
61#define CFG_SYS_SPI_ARGS_OFFS 0x140000
62#define CFG_SYS_SPI_ARGS_SIZE 0x80000
Tom Rini79b079f2014-04-03 07:52:56 -040063
Matt Porter247cdf02013-10-07 15:53:03 +053064/* SPI SPL */
Matt Porter247cdf02013-10-07 15:53:03 +053065
pekon gupta54a97d22014-07-22 16:03:23 +053066/* NAND support */
Miquel Raynal88718be2019-10-03 19:50:03 +020067#ifdef CONFIG_MTD_RAW_NAND
pekon gupta54a97d22014-07-22 16:03:23 +053068/* NAND: device related configs */
pekon gupta54a97d22014-07-22 16:03:23 +053069/* NAND: driver related configs */
Tom Rini4e590942022-11-12 17:36:51 -050070#define CFG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
pekon gupta54a97d22014-07-22 16:03:23 +053071 10, 11, 12, 13, 14, 15, 16, 17, \
72 18, 19, 20, 21, 22, 23, 24, 25, \
73 26, 27, 28, 29, 30, 31, 32, 33, \
74 34, 35, 36, 37, 38, 39, 40, 41, \
75 42, 43, 44, 45, 46, 47, 48, 49, \
76 50, 51, 52, 53, 54, 55, 56, 57, }
Tom Rini4e590942022-11-12 17:36:51 -050077#define CFG_SYS_NAND_ECCSIZE 512
78#define CFG_SYS_NAND_ECCBYTES 14
Miquel Raynal88718be2019-10-03 19:50:03 +020079#endif /* !CONFIG_MTD_RAW_NAND */
pekon gupta54a97d22014-07-22 16:03:23 +053080
pekon gupta93526972014-07-22 16:03:24 +053081/* Parallel NOR Support */
82#if defined(CONFIG_NOR)
83/* NOR: device related configs */
Tom Rini65cc0e22022-11-16 13:10:41 -050084#define CFG_SYS_FLASH_SIZE (64 * 1024 * 1024) /* 64 MB */
85#define CFG_SYS_FLASH_BASE (0x08000000)
pekon gupta93526972014-07-22 16:03:24 +053086/* Reduce SPL size by removing unlikey targets */
pekon gupta93526972014-07-22 16:03:24 +053087#endif /* NOR support */
88
Lokesh Vutla3ef5ebe2013-02-17 23:34:35 +000089#endif /* __CONFIG_DRA7XX_EVM_H */