Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Lokesh Vutla | 3ef5ebe | 2013-02-17 23:34:35 +0000 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2013 |
| 4 | * Texas Instruments Incorporated. |
| 5 | * Lokesh Vutla <lokeshvutla@ti.com> |
| 6 | * |
| 7 | * Configuration settings for the TI DRA7XX board. |
Enric Balletbò i Serra | 3d657a0 | 2013-12-06 21:30:19 +0100 | [diff] [blame] | 8 | * See ti_omap5_common.h for omap5 common settings. |
Lokesh Vutla | 3ef5ebe | 2013-02-17 23:34:35 +0000 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | #ifndef __CONFIG_DRA7XX_EVM_H |
| 12 | #define __CONFIG_DRA7XX_EVM_H |
| 13 | |
Simon Glass | 5e541a0 | 2023-07-30 21:01:45 -0600 | [diff] [blame] | 14 | #include <env/ti/dfu.h> |
Sekhar Nori | f843770 | 2016-11-25 14:25:54 +0530 | [diff] [blame] | 15 | |
Tom Rini | 1d457db | 2022-12-04 10:04:50 -0500 | [diff] [blame] | 16 | #define CFG_MAX_MEM_MAPPED 0x80000000 |
Lokesh Vutla | 212425b | 2016-03-08 09:18:07 +0530 | [diff] [blame] | 17 | |
Tom Rini | 79b079f | 2014-04-03 07:52:56 -0400 | [diff] [blame] | 18 | #ifndef CONFIG_QSPI_BOOT |
Lokesh Vutla | d3d33da | 2013-08-23 17:27:04 +0530 | [diff] [blame] | 19 | /* MMC ENV related defines */ |
Tom Rini | 79b079f | 2014-04-03 07:52:56 -0400 | [diff] [blame] | 20 | #endif |
Tom Rini | 9552ee3 | 2013-04-05 06:21:45 +0000 | [diff] [blame] | 21 | |
Minal Shah | a13cbf5 | 2013-10-04 14:52:02 -0400 | [diff] [blame] | 22 | #if (CONFIG_CONS_INDEX == 1) |
Sam Protsenko | adc097e | 2019-07-12 20:38:12 +0300 | [diff] [blame] | 23 | #define CONSOLEDEV "ttyS0" |
Minal Shah | a13cbf5 | 2013-10-04 14:52:02 -0400 | [diff] [blame] | 24 | #elif (CONFIG_CONS_INDEX == 3) |
Sam Protsenko | adc097e | 2019-07-12 20:38:12 +0300 | [diff] [blame] | 25 | #define CONSOLEDEV "ttyS2" |
Minal Shah | a13cbf5 | 2013-10-04 14:52:02 -0400 | [diff] [blame] | 26 | #endif |
Tom Rini | 9109213 | 2022-11-16 13:10:28 -0500 | [diff] [blame] | 27 | #define CFG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */ |
| 28 | #define CFG_SYS_NS16550_COM2 UART2_BASE /* UART2 */ |
| 29 | #define CFG_SYS_NS16550_COM3 UART3_BASE /* UART3 */ |
Lokesh Vutla | 97405d8 | 2013-05-30 03:19:38 +0000 | [diff] [blame] | 30 | |
Tom Rini | 08520bf | 2015-06-12 20:52:29 -0400 | [diff] [blame] | 31 | #ifndef CONFIG_SPL_BUILD |
Kishon Vijay Abraham I | 7a5a3e3 | 2015-02-23 18:40:20 +0530 | [diff] [blame] | 32 | #define DFUARGS \ |
| 33 | "dfu_bufsiz=0x10000\0" \ |
| 34 | DFU_ALT_INFO_MMC \ |
| 35 | DFU_ALT_INFO_EMMC \ |
Vignesh R | 5486d06 | 2015-10-20 15:22:01 +0530 | [diff] [blame] | 36 | DFU_ALT_INFO_RAM \ |
| 37 | DFU_ALT_INFO_QSPI |
Tom Rini | 08520bf | 2015-06-12 20:52:29 -0400 | [diff] [blame] | 38 | #endif |
Dileep Katta | be17d39 | 2015-03-25 04:04:50 +0530 | [diff] [blame] | 39 | |
B, Ravi | cdb1808 | 2016-07-28 17:39:18 +0530 | [diff] [blame] | 40 | #ifdef CONFIG_SPL_BUILD |
Andrew F. Davis | 6536ca4 | 2019-01-17 13:43:02 -0600 | [diff] [blame] | 41 | #ifdef CONFIG_SPL_DFU |
B, Ravi | cdb1808 | 2016-07-28 17:39:18 +0530 | [diff] [blame] | 42 | #define DFUARGS \ |
| 43 | "dfu_bufsiz=0x10000\0" \ |
| 44 | DFU_ALT_INFO_RAM |
| 45 | #endif |
| 46 | #endif |
| 47 | |
Enric Balletbò i Serra | 3d657a0 | 2013-12-06 21:30:19 +0100 | [diff] [blame] | 48 | #include <configs/ti_omap5_common.h> |
Dan Murphy | 45dbbf2 | 2013-06-11 11:22:30 -0500 | [diff] [blame] | 49 | |
Tom Rini | 79b079f | 2014-04-03 07:52:56 -0400 | [diff] [blame] | 50 | /* |
| 51 | * Default to using SPI for environment, etc. |
B, Ravi | 279dcd8 | 2016-09-26 18:21:13 +0530 | [diff] [blame] | 52 | * 0x000000 - 0x040000 : QSPI.SPL (256KiB) |
Tom Rini | 79b079f | 2014-04-03 07:52:56 -0400 | [diff] [blame] | 53 | * 0x040000 - 0x140000 : QSPI.u-boot (1MiB) |
| 54 | * 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB) |
| 55 | * 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB) |
| 56 | * 0x1D0000 - 0x1E0000 : QSPI.u-boot-env.backup1 (64KiB) |
| 57 | * 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB) |
| 58 | * 0x9E0000 - 0x2000000 : USERLAND |
| 59 | */ |
Tom Rini | 65cc0e2 | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 60 | #define CFG_SYS_SPI_KERNEL_OFFS 0x1E0000 |
| 61 | #define CFG_SYS_SPI_ARGS_OFFS 0x140000 |
| 62 | #define CFG_SYS_SPI_ARGS_SIZE 0x80000 |
Tom Rini | 79b079f | 2014-04-03 07:52:56 -0400 | [diff] [blame] | 63 | |
Matt Porter | 247cdf0 | 2013-10-07 15:53:03 +0530 | [diff] [blame] | 64 | /* SPI SPL */ |
Matt Porter | 247cdf0 | 2013-10-07 15:53:03 +0530 | [diff] [blame] | 65 | |
pekon gupta | 54a97d2 | 2014-07-22 16:03:23 +0530 | [diff] [blame] | 66 | /* NAND support */ |
Miquel Raynal | 88718be | 2019-10-03 19:50:03 +0200 | [diff] [blame] | 67 | #ifdef CONFIG_MTD_RAW_NAND |
pekon gupta | 54a97d2 | 2014-07-22 16:03:23 +0530 | [diff] [blame] | 68 | /* NAND: device related configs */ |
pekon gupta | 54a97d2 | 2014-07-22 16:03:23 +0530 | [diff] [blame] | 69 | /* NAND: driver related configs */ |
Tom Rini | 4e59094 | 2022-11-12 17:36:51 -0500 | [diff] [blame] | 70 | #define CFG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ |
pekon gupta | 54a97d2 | 2014-07-22 16:03:23 +0530 | [diff] [blame] | 71 | 10, 11, 12, 13, 14, 15, 16, 17, \ |
| 72 | 18, 19, 20, 21, 22, 23, 24, 25, \ |
| 73 | 26, 27, 28, 29, 30, 31, 32, 33, \ |
| 74 | 34, 35, 36, 37, 38, 39, 40, 41, \ |
| 75 | 42, 43, 44, 45, 46, 47, 48, 49, \ |
| 76 | 50, 51, 52, 53, 54, 55, 56, 57, } |
Tom Rini | 4e59094 | 2022-11-12 17:36:51 -0500 | [diff] [blame] | 77 | #define CFG_SYS_NAND_ECCSIZE 512 |
| 78 | #define CFG_SYS_NAND_ECCBYTES 14 |
Miquel Raynal | 88718be | 2019-10-03 19:50:03 +0200 | [diff] [blame] | 79 | #endif /* !CONFIG_MTD_RAW_NAND */ |
pekon gupta | 54a97d2 | 2014-07-22 16:03:23 +0530 | [diff] [blame] | 80 | |
pekon gupta | 9352697 | 2014-07-22 16:03:24 +0530 | [diff] [blame] | 81 | /* Parallel NOR Support */ |
| 82 | #if defined(CONFIG_NOR) |
| 83 | /* NOR: device related configs */ |
Tom Rini | 65cc0e2 | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 84 | #define CFG_SYS_FLASH_SIZE (64 * 1024 * 1024) /* 64 MB */ |
| 85 | #define CFG_SYS_FLASH_BASE (0x08000000) |
pekon gupta | 9352697 | 2014-07-22 16:03:24 +0530 | [diff] [blame] | 86 | /* Reduce SPL size by removing unlikey targets */ |
pekon gupta | 9352697 | 2014-07-22 16:03:24 +0530 | [diff] [blame] | 87 | #endif /* NOR support */ |
| 88 | |
Lokesh Vutla | 3ef5ebe | 2013-02-17 23:34:35 +0000 | [diff] [blame] | 89 | #endif /* __CONFIG_DRA7XX_EVM_H */ |