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Hans-Christian Egtvedt60445cb2008-05-16 11:10:32 +02001/*
2 * Register definitions for the Atmel AT32/AT91 SPI Controller
3 */
4
5/* Register offsets */
6#define ATMEL_SPI_CR 0x0000
7#define ATMEL_SPI_MR 0x0004
8#define ATMEL_SPI_RDR 0x0008
9#define ATMEL_SPI_TDR 0x000c
10#define ATMEL_SPI_SR 0x0010
11#define ATMEL_SPI_IER 0x0014
12#define ATMEL_SPI_IDR 0x0018
13#define ATMEL_SPI_IMR 0x001c
14#define ATMEL_SPI_CSR(x) (0x0030 + 4 * (x))
15#define ATMEL_SPI_VERSION 0x00fc
16
17/* Bits in CR */
18#define ATMEL_SPI_CR_SPIEN (1 << 0)
19#define ATMEL_SPI_CR_SPIDIS (1 << 1)
20#define ATMEL_SPI_CR_SWRST (1 << 7)
21#define ATMEL_SPI_CR_LASTXFER (1 << 24)
22
23/* Bits in MR */
24#define ATMEL_SPI_MR_MSTR (1 << 0)
25#define ATMEL_SPI_MR_PS (1 << 1)
26#define ATMEL_SPI_MR_PCSDEC (1 << 2)
27#define ATMEL_SPI_MR_FDIV (1 << 3)
28#define ATMEL_SPI_MR_MODFDIS (1 << 4)
Bo Shen65c57552012-08-19 20:32:22 +000029#define ATMEL_SPI_MR_WDRBT (1 << 5)
Hans-Christian Egtvedt60445cb2008-05-16 11:10:32 +020030#define ATMEL_SPI_MR_LLB (1 << 7)
31#define ATMEL_SPI_MR_PCS(x) (((x) & 15) << 16)
32#define ATMEL_SPI_MR_DLYBCS(x) ((x) << 24)
33
34/* Bits in RDR */
35#define ATMEL_SPI_RDR_RD(x) (x)
36#define ATMEL_SPI_RDR_PCS(x) ((x) << 16)
37
38/* Bits in TDR */
39#define ATMEL_SPI_TDR_TD(x) (x)
40#define ATMEL_SPI_TDR_PCS(x) ((x) << 16)
41#define ATMEL_SPI_TDR_LASTXFER (1 << 24)
42
43/* Bits in SR/IER/IDR/IMR */
44#define ATMEL_SPI_SR_RDRF (1 << 0)
45#define ATMEL_SPI_SR_TDRE (1 << 1)
46#define ATMEL_SPI_SR_MODF (1 << 2)
47#define ATMEL_SPI_SR_OVRES (1 << 3)
48#define ATMEL_SPI_SR_ENDRX (1 << 4)
49#define ATMEL_SPI_SR_ENDTX (1 << 5)
50#define ATMEL_SPI_SR_RXBUFF (1 << 6)
51#define ATMEL_SPI_SR_TXBUFE (1 << 7)
52#define ATMEL_SPI_SR_NSSR (1 << 8)
53#define ATMEL_SPI_SR_TXEMPTY (1 << 9)
54#define ATMEL_SPI_SR_SPIENS (1 << 16)
55
56/* Bits in CSRx */
57#define ATMEL_SPI_CSRx_CPOL (1 << 0)
58#define ATMEL_SPI_CSRx_NCPHA (1 << 1)
59#define ATMEL_SPI_CSRx_CSAAT (1 << 3)
60#define ATMEL_SPI_CSRx_BITS(x) ((x) << 4)
61#define ATMEL_SPI_CSRx_SCBR(x) ((x) << 8)
62#define ATMEL_SPI_CSRx_SCBR_MAX 0xff
63#define ATMEL_SPI_CSRx_DLYBS(x) ((x) << 16)
64#define ATMEL_SPI_CSRx_DLYBCT(x) ((x) << 24)
65
66/* Bits in VERSION */
Bo Shene0d2d3b2013-04-16 23:42:42 +000067#define ATMEL_SPI_VERSION_REV(x) ((x) & 0xfff)
Hans-Christian Egtvedt60445cb2008-05-16 11:10:32 +020068#define ATMEL_SPI_VERSION_MFN(x) ((x) << 16)
69
70/* Constants for CSRx:BITS */
71#define ATMEL_SPI_BITS_8 0
72#define ATMEL_SPI_BITS_9 1
73#define ATMEL_SPI_BITS_10 2
74#define ATMEL_SPI_BITS_11 3
75#define ATMEL_SPI_BITS_12 4
76#define ATMEL_SPI_BITS_13 5
77#define ATMEL_SPI_BITS_14 6
78#define ATMEL_SPI_BITS_15 7
79#define ATMEL_SPI_BITS_16 8
80
81struct atmel_spi_slave {
82 struct spi_slave slave;
83 void *regs;
84 u32 mr;
85};
86
87static inline struct atmel_spi_slave *to_atmel_spi(struct spi_slave *slave)
88{
89 return container_of(slave, struct atmel_spi_slave, slave);
90}
91
92/* Register access macros */
93#define spi_readl(as, reg) \
94 readl(as->regs + ATMEL_SPI_##reg)
95#define spi_writel(as, reg, value) \
96 writel(value, as->regs + ATMEL_SPI_##reg)
Heiko Schocherf11dea42014-10-31 08:30:55 +010097
98#if !defined(CONFIG_SYS_SPI_WRITE_TOUT)
99#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
100#endif