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Jon Loeliger7237c032006-10-19 11:02:16 -05001/*
2 * Copyright 2006 Freescale Semiconductor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * Version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
16 * MA 02111-1307 USA
17 */
18
Jon Loeliger7237c032006-10-19 11:02:16 -050019#include <common.h>
Jon Loeliger7237c032006-10-19 11:02:16 -050020
21#ifdef CONFIG_HARD_I2C
22
Jon Loeliger4d45f692006-10-19 12:02:24 -050023#include <command.h>
Jon Loeliger20476722006-10-20 15:50:15 -050024#include <i2c.h> /* Functional interface */
25
Jon Loeliger7237c032006-10-19 11:02:16 -050026#include <asm/io.h>
Jon Loeliger20476722006-10-20 15:50:15 -050027#include <asm/fsl_i2c.h> /* HW definitions */
Jon Loeliger7237c032006-10-19 11:02:16 -050028
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020029#define I2C_TIMEOUT (CONFIG_SYS_HZ / 4)
Jon Loeliger7237c032006-10-19 11:02:16 -050030
Joakim Tjernlund1939d962006-11-28 16:17:27 -060031#define I2C_READ_BIT 1
32#define I2C_WRITE_BIT 0
33
Timur Tabid8c82db2008-03-14 17:45:29 -050034DECLARE_GLOBAL_DATA_PTR;
35
Timur Tabibe5e6182006-11-03 19:15:00 -060036/* Initialize the bus pointer to whatever one the SPD EEPROM is on.
37 * Default is bus 0. This is necessary because the DDR initialization
38 * runs from ROM, and we can't switch buses because we can't modify
39 * the global variables.
40 */
Trent Piepho5e3ab682008-11-12 17:29:48 -080041#ifndef CONFIG_SYS_SPD_BUS_NUM
42#define CONFIG_SYS_SPD_BUS_NUM 0
Timur Tabibe5e6182006-11-03 19:15:00 -060043#endif
Trent Piepho5e3ab682008-11-12 17:29:48 -080044static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = CONFIG_SYS_SPD_BUS_NUM;
Heiko Schocherc1bce4f2009-02-24 11:30:37 +010045#if defined(CONFIG_I2C_MUX)
46static unsigned int i2c_bus_num_mux __attribute__ ((section ("data"))) = 0;
47#endif
Timur Tabibe5e6182006-11-03 19:15:00 -060048
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020049static unsigned int i2c_bus_speed[2] = {CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SPEED};
Timur Tabid8c82db2008-03-14 17:45:29 -050050
51static const struct fsl_i2c *i2c_dev[2] = {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020052 (struct fsl_i2c *) (CONFIG_SYS_IMMR + CONFIG_SYS_I2C_OFFSET),
53#ifdef CONFIG_SYS_I2C2_OFFSET
54 (struct fsl_i2c *) (CONFIG_SYS_IMMR + CONFIG_SYS_I2C2_OFFSET)
Timur Tabibe5e6182006-11-03 19:15:00 -060055#endif
56};
Jon Loeliger7237c032006-10-19 11:02:16 -050057
Timur Tabid8c82db2008-03-14 17:45:29 -050058/* I2C speed map for a DFSR value of 1 */
59
60/*
61 * Map I2C frequency dividers to FDR and DFSR values
62 *
63 * This structure is used to define the elements of a table that maps I2C
64 * frequency divider (I2C clock rate divided by I2C bus speed) to a value to be
65 * programmed into the Frequency Divider Ratio (FDR) and Digital Filter
66 * Sampling Rate (DFSR) registers.
67 *
68 * The actual table should be defined in the board file, and it must be called
69 * fsl_i2c_speed_map[].
70 *
71 * The last entry of the table must have a value of {-1, X}, where X is same
72 * FDR/DFSR values as the second-to-last entry. This guarantees that any
73 * search through the array will always find a match.
74 *
75 * The values of the divider must be in increasing numerical order, i.e.
76 * fsl_i2c_speed_map[x+1].divider > fsl_i2c_speed_map[x].divider.
77 *
78 * For this table, the values are based on a value of 1 for the DFSR
79 * register. See the application note AN2919 "Determining the I2C Frequency
80 * Divider Ratio for SCL"
TsiChung Liew5d9a5ef2008-08-19 00:56:46 +060081 *
82 * ColdFire I2C frequency dividers for FDR values are different from
83 * PowerPC. The protocol to use the I2C module is still the same.
84 * A different table is defined and are based on MCF5xxx user manual.
85 *
Timur Tabid8c82db2008-03-14 17:45:29 -050086 */
87static const struct {
88 unsigned short divider;
TsiChung Liew5d9a5ef2008-08-19 00:56:46 +060089#ifdef __PPC__
Timur Tabid8c82db2008-03-14 17:45:29 -050090 u8 dfsr;
TsiChung Liew5d9a5ef2008-08-19 00:56:46 +060091#endif
Timur Tabid8c82db2008-03-14 17:45:29 -050092 u8 fdr;
93} fsl_i2c_speed_map[] = {
TsiChung Liew5d9a5ef2008-08-19 00:56:46 +060094#ifdef __PPC__
Timur Tabid8c82db2008-03-14 17:45:29 -050095 {160, 1, 32}, {192, 1, 33}, {224, 1, 34}, {256, 1, 35},
96 {288, 1, 0}, {320, 1, 1}, {352, 6, 1}, {384, 1, 2}, {416, 6, 2},
97 {448, 1, 38}, {480, 1, 3}, {512, 1, 39}, {544, 11, 3}, {576, 1, 4},
98 {608, 22, 3}, {640, 1, 5}, {672, 32, 3}, {704, 11, 5}, {736, 43, 3},
99 {768, 1, 6}, {800, 54, 3}, {832, 11, 6}, {896, 1, 42}, {960, 1, 7},
100 {1024, 1, 43}, {1088, 22, 7}, {1152, 1, 8}, {1216, 43, 7}, {1280, 1, 9},
101 {1408, 22, 9}, {1536, 1, 10}, {1664, 22, 10}, {1792, 1, 46},
102 {1920, 1, 11}, {2048, 1, 47}, {2176, 43, 11}, {2304, 1, 12},
103 {2560, 1, 13}, {2816, 43, 13}, {3072, 1, 14}, {3328, 43, 14},
104 {3584, 1, 50}, {3840, 1, 15}, {4096, 1, 51}, {4608, 1, 16},
105 {5120, 1, 17}, {6144, 1, 18}, {7168, 1, 54}, {7680, 1, 19},
106 {8192, 1, 55}, {9216, 1, 20}, {10240, 1, 21}, {12288, 1, 22},
107 {14336, 1, 58}, {15360, 1, 23}, {16384, 1, 59}, {18432, 1, 24},
108 {20480, 1, 25}, {24576, 1, 26}, {28672, 1, 62}, {30720, 1, 27},
109 {32768, 1, 63}, {36864, 1, 28}, {40960, 1, 29}, {49152, 1, 30},
110 {61440, 1, 31}, {-1, 1, 31}
TsiChung Liew5d9a5ef2008-08-19 00:56:46 +0600111#elif defined(__M68K__)
112 {20, 32}, {22, 33}, {24, 34}, {26, 35},
113 {28, 0}, {28, 36}, {30, 1}, {32, 37},
114 {34, 2}, {36, 38}, {40, 3}, {40, 39},
115 {44, 4}, {48, 5}, {48, 40}, {56, 6},
116 {56, 41}, {64, 42}, {68, 7}, {72, 43},
117 {80, 8}, {80, 44}, {88, 9}, {96, 41},
118 {104, 10}, {112, 42}, {128, 11}, {128, 43},
119 {144, 12}, {160, 13}, {160, 48}, {192, 14},
120 {192, 49}, {224, 50}, {240, 15}, {256, 51},
121 {288, 16}, {320, 17}, {320, 52}, {384, 18},
122 {384, 53}, {448, 54}, {480, 19}, {512, 55},
123 {576, 20}, {640, 21}, {640, 56}, {768, 22},
124 {768, 57}, {960, 23}, {896, 58}, {1024, 59},
125 {1152, 24}, {1280, 25}, {1280, 60}, {1536, 26},
126 {1536, 61}, {1792, 62}, {1920, 27}, {2048, 63},
127 {2304, 28}, {2560, 29}, {3072, 30}, {3840, 31},
128 {-1, 31}
129#endif
Timur Tabid8c82db2008-03-14 17:45:29 -0500130};
131
132/**
133 * Set the I2C bus speed for a given I2C device
134 *
135 * @param dev: the I2C device
136 * @i2c_clk: I2C bus clock frequency
137 * @speed: the desired speed of the bus
138 *
139 * The I2C device must be stopped before calling this function.
140 *
141 * The return value is the actual bus speed that is set.
142 */
143static unsigned int set_i2c_bus_speed(const struct fsl_i2c *dev,
144 unsigned int i2c_clk, unsigned int speed)
145{
146 unsigned short divider = min(i2c_clk / speed, (unsigned short) -1);
147 unsigned int i;
Timur Tabid8c82db2008-03-14 17:45:29 -0500148
149 /*
150 * We want to choose an FDR/DFSR that generates an I2C bus speed that
151 * is equal to or lower than the requested speed. That means that we
152 * want the first divider that is equal to or greater than the
153 * calculated divider.
154 */
155
156 for (i = 0; i < ARRAY_SIZE(fsl_i2c_speed_map); i++)
157 if (fsl_i2c_speed_map[i].divider >= divider) {
TsiChung Liew5d9a5ef2008-08-19 00:56:46 +0600158 u8 fdr;
159#ifdef __PPC__
160 u8 dfsr;
Timur Tabid8c82db2008-03-14 17:45:29 -0500161 dfsr = fsl_i2c_speed_map[i].dfsr;
TsiChung Liew5d9a5ef2008-08-19 00:56:46 +0600162#endif
Timur Tabid8c82db2008-03-14 17:45:29 -0500163 fdr = fsl_i2c_speed_map[i].fdr;
164 speed = i2c_clk / fsl_i2c_speed_map[i].divider;
Kumar Gala3e3f7662008-03-26 18:53:28 -0500165 writeb(fdr, &dev->fdr); /* set bus speed */
TsiChung Liew5d9a5ef2008-08-19 00:56:46 +0600166#ifdef __PPC__
Kumar Gala3e3f7662008-03-26 18:53:28 -0500167 writeb(dfsr, &dev->dfsrr); /* set default filter */
TsiChung Liew5d9a5ef2008-08-19 00:56:46 +0600168#endif
Timur Tabid8c82db2008-03-14 17:45:29 -0500169 break;
170 }
171
Timur Tabid8c82db2008-03-14 17:45:29 -0500172 return speed;
173}
174
Jon Loeliger7237c032006-10-19 11:02:16 -0500175void
176i2c_init(int speed, int slaveadd)
177{
Timur Tabid8c82db2008-03-14 17:45:29 -0500178 struct fsl_i2c *dev;
Stefan Roesef2302d42008-08-06 14:05:38 +0200179 unsigned int temp;
Jon Loeliger7237c032006-10-19 11:02:16 -0500180
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200181 dev = (struct fsl_i2c *) (CONFIG_SYS_IMMR + CONFIG_SYS_I2C_OFFSET);
Jon Loeliger7237c032006-10-19 11:02:16 -0500182
Timur Tabibe5e6182006-11-03 19:15:00 -0600183 writeb(0, &dev->cr); /* stop I2C controller */
Joakim Tjernlundf6f5f702007-01-31 11:04:19 +0100184 udelay(5); /* let it shutdown in peace */
Stefan Roesef2302d42008-08-06 14:05:38 +0200185 temp = set_i2c_bus_speed(dev, gd->i2c1_clk, speed);
186 if (gd->flags & GD_FLG_RELOC)
187 i2c_bus_speed[0] = temp;
Joakim Tjernlund14198bf2006-11-28 16:17:18 -0600188 writeb(slaveadd << 1, &dev->adr); /* write slave address */
Timur Tabibe5e6182006-11-03 19:15:00 -0600189 writeb(0x0, &dev->sr); /* clear status register */
190 writeb(I2C_CR_MEN, &dev->cr); /* start I2C controller */
Jon Loeliger7237c032006-10-19 11:02:16 -0500191
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200192#ifdef CONFIG_SYS_I2C2_OFFSET
193 dev = (struct fsl_i2c *) (CONFIG_SYS_IMMR + CONFIG_SYS_I2C2_OFFSET);
Jon Loeliger7237c032006-10-19 11:02:16 -0500194
Timur Tabibe5e6182006-11-03 19:15:00 -0600195 writeb(0, &dev->cr); /* stop I2C controller */
Timur Tabie739bc92007-07-03 13:46:32 -0500196 udelay(5); /* let it shutdown in peace */
Stefan Roesef2302d42008-08-06 14:05:38 +0200197 temp = set_i2c_bus_speed(dev, gd->i2c2_clk, speed);
198 if (gd->flags & GD_FLG_RELOC)
199 i2c_bus_speed[1] = temp;
Timur Tabie739bc92007-07-03 13:46:32 -0500200 writeb(slaveadd << 1, &dev->adr); /* write slave address */
Timur Tabibe5e6182006-11-03 19:15:00 -0600201 writeb(0x0, &dev->sr); /* clear status register */
202 writeb(I2C_CR_MEN, &dev->cr); /* start I2C controller */
Timur Tabid8c82db2008-03-14 17:45:29 -0500203#endif
Jon Loeliger7237c032006-10-19 11:02:16 -0500204}
205
206static __inline__ int
207i2c_wait4bus(void)
208{
Stefan Roesef2302d42008-08-06 14:05:38 +0200209 unsigned long long timeval = get_ticks();
Jon Loeliger7237c032006-10-19 11:02:16 -0500210
Timur Tabibe5e6182006-11-03 19:15:00 -0600211 while (readb(&i2c_dev[i2c_bus_num]->sr) & I2C_SR_MBB) {
Stefan Roesef2302d42008-08-06 14:05:38 +0200212 if ((get_ticks() - timeval) > usec2ticks(I2C_TIMEOUT))
Jon Loeliger7237c032006-10-19 11:02:16 -0500213 return -1;
Jon Loeliger7237c032006-10-19 11:02:16 -0500214 }
215
216 return 0;
217}
218
219static __inline__ int
220i2c_wait(int write)
221{
222 u32 csr;
Stefan Roesef2302d42008-08-06 14:05:38 +0200223 unsigned long long timeval = get_ticks();
Jon Loeliger7237c032006-10-19 11:02:16 -0500224
225 do {
Timur Tabibe5e6182006-11-03 19:15:00 -0600226 csr = readb(&i2c_dev[i2c_bus_num]->sr);
Jon Loeliger7237c032006-10-19 11:02:16 -0500227 if (!(csr & I2C_SR_MIF))
228 continue;
229
Timur Tabibe5e6182006-11-03 19:15:00 -0600230 writeb(0x0, &i2c_dev[i2c_bus_num]->sr);
Jon Loeliger7237c032006-10-19 11:02:16 -0500231
232 if (csr & I2C_SR_MAL) {
233 debug("i2c_wait: MAL\n");
234 return -1;
235 }
236
237 if (!(csr & I2C_SR_MCF)) {
238 debug("i2c_wait: unfinished\n");
239 return -1;
240 }
241
Joakim Tjernlund1939d962006-11-28 16:17:27 -0600242 if (write == I2C_WRITE_BIT && (csr & I2C_SR_RXAK)) {
Jon Loeliger7237c032006-10-19 11:02:16 -0500243 debug("i2c_wait: No RXACK\n");
244 return -1;
245 }
246
247 return 0;
Stefan Roesef2302d42008-08-06 14:05:38 +0200248 } while ((get_ticks() - timeval) < usec2ticks(I2C_TIMEOUT));
Jon Loeliger7237c032006-10-19 11:02:16 -0500249
250 debug("i2c_wait: timed out\n");
251 return -1;
252}
253
254static __inline__ int
255i2c_write_addr (u8 dev, u8 dir, int rsta)
256{
257 writeb(I2C_CR_MEN | I2C_CR_MSTA | I2C_CR_MTX
258 | (rsta ? I2C_CR_RSTA : 0),
Timur Tabibe5e6182006-11-03 19:15:00 -0600259 &i2c_dev[i2c_bus_num]->cr);
Jon Loeliger7237c032006-10-19 11:02:16 -0500260
Timur Tabibe5e6182006-11-03 19:15:00 -0600261 writeb((dev << 1) | dir, &i2c_dev[i2c_bus_num]->dr);
Jon Loeliger7237c032006-10-19 11:02:16 -0500262
Joakim Tjernlund1939d962006-11-28 16:17:27 -0600263 if (i2c_wait(I2C_WRITE_BIT) < 0)
Jon Loeliger7237c032006-10-19 11:02:16 -0500264 return 0;
265
266 return 1;
267}
268
269static __inline__ int
270__i2c_write(u8 *data, int length)
271{
272 int i;
273
274 writeb(I2C_CR_MEN | I2C_CR_MSTA | I2C_CR_MTX,
Timur Tabibe5e6182006-11-03 19:15:00 -0600275 &i2c_dev[i2c_bus_num]->cr);
Jon Loeliger7237c032006-10-19 11:02:16 -0500276
277 for (i = 0; i < length; i++) {
Timur Tabibe5e6182006-11-03 19:15:00 -0600278 writeb(data[i], &i2c_dev[i2c_bus_num]->dr);
Jon Loeliger7237c032006-10-19 11:02:16 -0500279
Joakim Tjernlund1939d962006-11-28 16:17:27 -0600280 if (i2c_wait(I2C_WRITE_BIT) < 0)
Jon Loeliger7237c032006-10-19 11:02:16 -0500281 break;
282 }
283
284 return i;
285}
286
287static __inline__ int
288__i2c_read(u8 *data, int length)
289{
290 int i;
291
292 writeb(I2C_CR_MEN | I2C_CR_MSTA | ((length == 1) ? I2C_CR_TXAK : 0),
Timur Tabibe5e6182006-11-03 19:15:00 -0600293 &i2c_dev[i2c_bus_num]->cr);
Jon Loeliger7237c032006-10-19 11:02:16 -0500294
295 /* dummy read */
Timur Tabibe5e6182006-11-03 19:15:00 -0600296 readb(&i2c_dev[i2c_bus_num]->dr);
Jon Loeliger7237c032006-10-19 11:02:16 -0500297
298 for (i = 0; i < length; i++) {
Joakim Tjernlund1939d962006-11-28 16:17:27 -0600299 if (i2c_wait(I2C_READ_BIT) < 0)
Jon Loeliger7237c032006-10-19 11:02:16 -0500300 break;
301
302 /* Generate ack on last next to last byte */
303 if (i == length - 2)
304 writeb(I2C_CR_MEN | I2C_CR_MSTA | I2C_CR_TXAK,
Timur Tabibe5e6182006-11-03 19:15:00 -0600305 &i2c_dev[i2c_bus_num]->cr);
Jon Loeliger7237c032006-10-19 11:02:16 -0500306
307 /* Generate stop on last byte */
308 if (i == length - 1)
Timur Tabibe5e6182006-11-03 19:15:00 -0600309 writeb(I2C_CR_MEN | I2C_CR_TXAK, &i2c_dev[i2c_bus_num]->cr);
Jon Loeliger7237c032006-10-19 11:02:16 -0500310
Timur Tabibe5e6182006-11-03 19:15:00 -0600311 data[i] = readb(&i2c_dev[i2c_bus_num]->dr);
Jon Loeliger7237c032006-10-19 11:02:16 -0500312 }
313
314 return i;
315}
316
317int
318i2c_read(u8 dev, uint addr, int alen, u8 *data, int length)
319{
Joakim Tjernlundf6f5f702007-01-31 11:04:19 +0100320 int i = -1; /* signal error */
Jon Loeliger7237c032006-10-19 11:02:16 -0500321 u8 *a = (u8*)&addr;
322
Jon Loeliger4d45f692006-10-19 12:02:24 -0500323 if (i2c_wait4bus() >= 0
Joakim Tjernlund1939d962006-11-28 16:17:27 -0600324 && i2c_write_addr(dev, I2C_WRITE_BIT, 0) != 0
Joakim Tjernlundf6f5f702007-01-31 11:04:19 +0100325 && __i2c_write(&a[4 - alen], alen) == alen)
326 i = 0; /* No error so far */
327
328 if (length
329 && i2c_write_addr(dev, I2C_READ_BIT, 1) != 0)
Jon Loeliger4d45f692006-10-19 12:02:24 -0500330 i = __i2c_read(data, length);
Jon Loeliger7237c032006-10-19 11:02:16 -0500331
Timur Tabibe5e6182006-11-03 19:15:00 -0600332 writeb(I2C_CR_MEN, &i2c_dev[i2c_bus_num]->cr);
Jon Loeliger7237c032006-10-19 11:02:16 -0500333
Jon Loeliger4d45f692006-10-19 12:02:24 -0500334 if (i == length)
335 return 0;
336
337 return -1;
Jon Loeliger7237c032006-10-19 11:02:16 -0500338}
339
340int
341i2c_write(u8 dev, uint addr, int alen, u8 *data, int length)
342{
Joakim Tjernlundf6f5f702007-01-31 11:04:19 +0100343 int i = -1; /* signal error */
Jon Loeliger7237c032006-10-19 11:02:16 -0500344 u8 *a = (u8*)&addr;
345
Jon Loeliger4d45f692006-10-19 12:02:24 -0500346 if (i2c_wait4bus() >= 0
Joakim Tjernlund1939d962006-11-28 16:17:27 -0600347 && i2c_write_addr(dev, I2C_WRITE_BIT, 0) != 0
Jon Loeliger4d45f692006-10-19 12:02:24 -0500348 && __i2c_write(&a[4 - alen], alen) == alen) {
349 i = __i2c_write(data, length);
350 }
Jon Loeliger7237c032006-10-19 11:02:16 -0500351
Timur Tabibe5e6182006-11-03 19:15:00 -0600352 writeb(I2C_CR_MEN, &i2c_dev[i2c_bus_num]->cr);
Jon Loeliger7237c032006-10-19 11:02:16 -0500353
Jon Loeliger4d45f692006-10-19 12:02:24 -0500354 if (i == length)
355 return 0;
356
357 return -1;
Jon Loeliger7237c032006-10-19 11:02:16 -0500358}
359
360int
361i2c_probe(uchar chip)
362{
Joakim Tjernlundf6f5f702007-01-31 11:04:19 +0100363 /* For unknow reason the controller will ACK when
364 * probing for a slave with the same address, so skip
365 * it.
Jon Loeliger7237c032006-10-19 11:02:16 -0500366 */
Joakim Tjernlundf6f5f702007-01-31 11:04:19 +0100367 if (chip == (readb(&i2c_dev[i2c_bus_num]->adr) >> 1))
368 return -1;
Jon Loeliger7237c032006-10-19 11:02:16 -0500369
Joakim Tjernlundf6f5f702007-01-31 11:04:19 +0100370 return i2c_read(chip, 0, 0, NULL, 0);
Jon Loeliger7237c032006-10-19 11:02:16 -0500371}
372
Timur Tabibe5e6182006-11-03 19:15:00 -0600373int i2c_set_bus_num(unsigned int bus)
374{
Heiko Schocherc1bce4f2009-02-24 11:30:37 +0100375#if defined(CONFIG_I2C_MUX)
376 if (bus < CONFIG_SYS_MAX_I2C_BUS) {
377 i2c_bus_num = bus;
378 } else {
379 int ret;
380
381 ret = i2x_mux_select_mux(bus);
382 if (ret)
383 return ret;
384 i2c_bus_num = 0;
385 }
386 i2c_bus_num_mux = bus;
387#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200388#ifdef CONFIG_SYS_I2C2_OFFSET
Timur Tabibe5e6182006-11-03 19:15:00 -0600389 if (bus > 1) {
390#else
391 if (bus > 0) {
392#endif
393 return -1;
394 }
395
396 i2c_bus_num = bus;
Heiko Schocherc1bce4f2009-02-24 11:30:37 +0100397#endif
Timur Tabibe5e6182006-11-03 19:15:00 -0600398 return 0;
399}
400
401int i2c_set_bus_speed(unsigned int speed)
402{
Timur Tabid8c82db2008-03-14 17:45:29 -0500403 unsigned int i2c_clk = (i2c_bus_num == 1) ? gd->i2c2_clk : gd->i2c1_clk;
404
405 writeb(0, &i2c_dev[i2c_bus_num]->cr); /* stop controller */
406 i2c_bus_speed[i2c_bus_num] =
407 set_i2c_bus_speed(i2c_dev[i2c_bus_num], i2c_clk, speed);
408 writeb(I2C_CR_MEN, &i2c_dev[i2c_bus_num]->cr); /* start controller */
409
410 return 0;
Timur Tabibe5e6182006-11-03 19:15:00 -0600411}
412
413unsigned int i2c_get_bus_num(void)
414{
Heiko Schocherc1bce4f2009-02-24 11:30:37 +0100415#if defined(CONFIG_I2C_MUX)
416 return i2c_bus_num_mux;
417#else
Timur Tabibe5e6182006-11-03 19:15:00 -0600418 return i2c_bus_num;
Heiko Schocherc1bce4f2009-02-24 11:30:37 +0100419#endif
Timur Tabibe5e6182006-11-03 19:15:00 -0600420}
421
422unsigned int i2c_get_bus_speed(void)
423{
Timur Tabid8c82db2008-03-14 17:45:29 -0500424 return i2c_bus_speed[i2c_bus_num];
Timur Tabibe5e6182006-11-03 19:15:00 -0600425}
Timur Tabid8c82db2008-03-14 17:45:29 -0500426
Jon Loeliger7237c032006-10-19 11:02:16 -0500427#endif /* CONFIG_HARD_I2C */