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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Piotr Wilczek4d6c9672013-09-20 15:01:27 +02002/*
3 * Copyright (C) 2013 Samsung Electronics
4 * Sanghee Kim <sh0130.kim@samsung.com>
5 * Piotr Wilczek <p.wilczek@samsung.com>
6 *
7 * Configuation settings for the SAMSUNG TRATS2 (EXYNOS4412) board.
Piotr Wilczek4d6c9672013-09-20 15:01:27 +02008 */
9
Piotr Wilczek1ecab0f2014-03-07 14:59:49 +010010#ifndef __CONFIG_TRATS2_H
11#define __CONFIG_TRATS2_H
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020012
Simon Glass4c7bb1d2014-10-07 22:01:44 -060013#include <configs/exynos4-common.h>
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020014
Piotr Wilczek1ecab0f2014-03-07 14:59:49 +010015#define CONFIG_TIZEN /* TIZEN lib */
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020016
Łukasz Majewskic4e96db2014-01-14 08:02:26 +010017#define CONFIG_SYS_L2CACHE_OFF
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020018#ifndef CONFIG_SYS_L2CACHE_OFF
19#define CONFIG_SYS_L2_PL310
20#define CONFIG_SYS_PL310_BASE 0x10502000
21#endif
22
Piotr Wilczek1ecab0f2014-03-07 14:59:49 +010023/* TRATS2 has 4 banks of DRAM */
Piotr Wilczek1ecab0f2014-03-07 14:59:49 +010024#define CONFIG_SYS_SDRAM_BASE 0x40000000
25#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
26#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
27/* memtest works on */
Piotr Wilczek1ecab0f2014-03-07 14:59:49 +010028#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020029
Łukasz Majewski1018b0a2015-04-01 12:34:30 +020030#define CONFIG_BOOTCOMMAND "run autoboot"
Piotr Wilczek1ecab0f2014-03-07 14:59:49 +010031
32#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
33 - GENERATED_GBL_DATA_SIZE)
34
35#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
36
37#define CONFIG_SYS_MONITOR_BASE 0x00000000
38
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020039/* Tizen - partitions definitions */
Przemyslaw Marczak18f3e0e2014-02-28 18:53:36 +010040#define PARTS_CSA "csa-mmc"
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020041#define PARTS_BOOT "boot"
Przemyslaw Marczak18f3e0e2014-02-28 18:53:36 +010042#define PARTS_QBOOT "qboot"
Piotr Wilczekdca36682013-11-27 11:11:02 +010043#define PARTS_CSC "csc"
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020044#define PARTS_ROOT "platform"
45#define PARTS_DATA "data"
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020046#define PARTS_UMS "ums"
47
48#define PARTS_DEFAULT \
Piotr Wilczeka5e15bb2013-12-30 09:40:40 +010049 "uuid_disk=${uuid_gpt_disk};" \
Piotr Wilczekdca36682013-11-27 11:11:02 +010050 "name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
Przemyslaw Marczak18f3e0e2014-02-28 18:53:36 +010051 "name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
52 "name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020053 "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
Piotr Wilczekdca36682013-11-27 11:11:02 +010054 "name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
Przemyslaw Marczak18f3e0e2014-02-28 18:53:36 +010055 "name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020056 "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
57
Piotr Wilczek09f98012013-11-12 15:22:46 +010058#define CONFIG_DFU_ALT \
Mateusz Zalegab7d42592014-04-28 21:13:25 +020059 "u-boot raw 0x80 0x800;" \
Łukasz Majewskidcb7eb62014-07-22 10:17:06 +020060 "/uImage ext4 0 2;" \
61 "/modem.bin ext4 0 2;" \
62 "/exynos4412-trats2.dtb ext4 0 2;" \
Przemyslaw Marczak18f3e0e2014-02-28 18:53:36 +010063 ""PARTS_CSA" part 0 1;" \
Łukasz Majewskicdd15bc2014-01-14 08:02:24 +010064 ""PARTS_BOOT" part 0 2;" \
Przemyslaw Marczak18f3e0e2014-02-28 18:53:36 +010065 ""PARTS_QBOOT" part 0 3;" \
66 ""PARTS_CSC" part 0 4;" \
Łukasz Majewskicdd15bc2014-01-14 08:02:24 +010067 ""PARTS_ROOT" part 0 5;" \
68 ""PARTS_DATA" part 0 6;" \
Przemyslaw Marczaka0afc6f2014-01-22 12:02:47 +010069 ""PARTS_UMS" part 0 7;" \
Łukasz Majewski1018b0a2015-04-01 12:34:30 +020070 "params.bin raw 0x38 0x8;" \
71 "/Image.itb ext4 0 2\0"
Piotr Wilczek09f98012013-11-12 15:22:46 +010072
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020073#define CONFIG_EXTRA_ENV_SETTINGS \
74 "bootk=" \
Piotr Wilczek425e26d2014-01-22 15:54:37 +010075 "run loaduimage;" \
76 "if run loaddtb; then " \
77 "bootm 0x40007FC0 - ${fdtaddr};" \
78 "fi;" \
79 "bootm 0x40007FC0;\0" \
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020080 "updatebackup=" \
Jaehoon Chung188c42b2014-04-30 09:09:15 +090081 "mmc dev 0 2; mmc write 0x51000000 0 0x800;" \
82 " mmc dev 0 0\0" \
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020083 "updatebootb=" \
Jaehoon Chung188c42b2014-04-30 09:09:15 +090084 "mmc read 0x51000000 0x80 0x800; run updatebackup\0" \
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020085 "mmcboot=" \
86 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
87 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
Piotr Wilczek425e26d2014-01-22 15:54:37 +010088 "run bootk\0" \
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020089 "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
90 "boottrace=setenv opts initcall_debug; run bootcmd\0" \
91 "verify=n\0" \
92 "rootfstype=ext4\0" \
Andre Heider9c042652020-09-17 08:52:01 +020093 "console=console=ttySAC2,115200n8\0" \
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020094 "kernelname=uImage\0" \
Piotr Wilczek2c8043c2013-11-27 11:11:00 +010095 "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 " \
96 "${kernelname}\0" \
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020097 "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
98 "${fdtfile}\0" \
Piotr Wilczeka5e15bb2013-12-30 09:40:40 +010099 "mmcdev=" __stringify(CONFIG_MMC_DEFAULT_DEV) "\0" \
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200100 "mmcbootpart=2\0" \
101 "mmcrootpart=5\0" \
102 "opts=always_resume=1\0" \
103 "partitions=" PARTS_DEFAULT \
Piotr Wilczek09f98012013-11-12 15:22:46 +0100104 "dfu_alt_info=" CONFIG_DFU_ALT \
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200105 "uartpath=ap\0" \
106 "usbpath=ap\0" \
107 "consoleon=set console console=ttySAC2,115200n8; save; reset\0" \
108 "consoleoff=set console console=ram; save; reset\0" \
109 "spladdr=0x40000100\0" \
110 "splsize=0x200\0" \
111 "splfile=falcon.bin\0" \
112 "spl_export=" \
113 "setexpr spl_imgsize ${splsize} + 8 ;" \
114 "setenv spl_imgsize 0x${spl_imgsize};" \
115 "setexpr spl_imgaddr ${spladdr} - 8 ;" \
116 "setexpr spl_addr_tmp ${spladdr} - 4 ;" \
117 "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
118 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
119 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
120 "spl export atags 0x40007FC0;" \
121 "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
122 "mw.l ${spl_addr_tmp} ${splsize};" \
123 "ext4write mmc ${mmcdev}:${mmcbootpart}" \
124 " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
125 "setenv spl_imgsize;" \
126 "setenv spl_imgaddr;" \
127 "setenv spl_addr_tmp;\0" \
Łukasz Majewski1018b0a2015-04-01 12:34:30 +0200128 CONFIG_EXTRA_ENV_ITB \
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200129 "fdtaddr=40800000\0" \
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200130
Albert ARIBAUD519fdde2014-04-08 09:25:08 +0200131/* GPT */
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200132
Przemyslaw Marczake0021702014-03-25 10:58:22 +0100133/* Security subsystem - enable hw_rand() */
134#define CONFIG_EXYNOS_ACE_SHA
Przemyslaw Marczake0021702014-03-25 10:58:22 +0100135
Przemyslaw Marczak679549d2014-01-22 11:24:12 +0100136/* Common misc for Samsung */
137#define CONFIG_MISC_COMMON
138
Przemyslaw Marczakf64236a2014-01-22 11:24:19 +0100139/* Download menu - Samsung common */
140#define CONFIG_LCD_MENU
Przemyslaw Marczakf64236a2014-01-22 11:24:19 +0100141
142/* Download menu - definitions for check keys */
143#ifndef __ASSEMBLY__
Przemyslaw Marczakf64236a2014-01-22 11:24:19 +0100144
145#define KEY_PWR_PMIC_NAME "MAX77686_PMIC"
146#define KEY_PWR_STATUS_REG MAX77686_REG_PMIC_STATUS1
147#define KEY_PWR_STATUS_MASK (1 << 0)
148#define KEY_PWR_INTERRUPT_REG MAX77686_REG_PMIC_INT1
149#define KEY_PWR_INTERRUPT_MASK (1 << 1)
150
Akshay Saraswat9b97b722014-05-13 10:30:15 +0530151#define KEY_VOL_UP_GPIO EXYNOS4X12_GPIO_X22
152#define KEY_VOL_DOWN_GPIO EXYNOS4X12_GPIO_X33
Przemyslaw Marczakf64236a2014-01-22 11:24:19 +0100153#endif /* __ASSEMBLY__ */
154
155/* LCD console */
156#define LCD_BPP LCD_COLOR16
Przemyslaw Marczakf64236a2014-01-22 11:24:19 +0100157
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200158/* LCD */
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200159#define CONFIG_FB_ADDR 0x52504000
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200160#define CONFIG_EXYNOS_MIPI_DSIM
Przemyslaw Marczak903afe12013-11-29 18:30:43 +0100161#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200162
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200163#endif /* __CONFIG_H */