blob: d0830892e83bba268488ee5cce4aced46e5ba3a7 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Bin Menga65b25d2015-05-07 21:34:08 +08002/*
3 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
Bin Menga65b25d2015-05-07 21:34:08 +08004 */
5
6/dts-v1/;
7
Bin Meng5c564222015-06-03 09:20:06 +08008#include <dt-bindings/interrupt-router/intel-irq.h>
9
10/* ICH9 IRQ router has discrete PIRQ control registers */
11#undef PIRQE
12#undef PIRQF
13#undef PIRQG
14#undef PIRQH
15#define PIRQE 8
16#define PIRQF 9
17#define PIRQG 10
18#define PIRQH 11
19
Bin Menga65b25d2015-05-07 21:34:08 +080020/include/ "skeleton.dtsi"
21/include/ "serial.dtsi"
Bin Mengb6ff6ce2015-11-12 05:33:06 -080022/include/ "keyboard.dtsi"
Bin Mengb37b7b22018-07-19 03:07:33 -070023/include/ "reset.dtsi"
Bin Meng93f8a312015-07-15 16:23:39 +080024/include/ "rtc.dtsi"
Bin Menga65b25d2015-05-07 21:34:08 +080025
Bin Mengc79cbb52021-07-28 12:00:23 +080026#include "tsc_timer.dtsi"
Simon Glass839d66c2020-11-05 06:32:17 -070027#include "smbios.dtsi"
28
Bin Menga65b25d2015-05-07 21:34:08 +080029/ {
Bin Meng683b09d2015-06-03 09:20:04 +080030 model = "QEMU x86 (Q35)";
Bin Menga65b25d2015-05-07 21:34:08 +080031 compatible = "qemu,x86";
32
33 config {
34 silent_console = <0>;
Bin Mengf2653e82015-06-03 09:20:05 +080035 u-boot,no-apm-finalize;
Bin Menga65b25d2015-05-07 21:34:08 +080036 };
37
38 chosen {
39 stdout-path = "/serial";
40 };
41
Bin Menga8ebf282015-07-22 01:21:13 -070042 cpus {
43 #address-cells = <1>;
44 #size-cells = <0>;
Bin Meng2cffd902017-01-18 03:32:57 -080045 u-boot,dm-pre-reloc;
Bin Menga8ebf282015-07-22 01:21:13 -070046
47 cpu@0 {
48 device_type = "cpu";
Miao Yan5a694052016-01-07 01:32:01 -080049 compatible = "cpu-qemu";
Bin Meng2cffd902017-01-18 03:32:57 -080050 u-boot,dm-pre-reloc;
Bin Menga8ebf282015-07-22 01:21:13 -070051 reg = <0>;
52 intel,apic-id = <0>;
53 };
54 };
55
Bin Menga65b25d2015-05-07 21:34:08 +080056 pci {
57 compatible = "pci-x86";
58 #address-cells = <3>;
59 #size-cells = <2>;
60 u-boot,dm-pre-reloc;
61 ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000
62 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
63 0x01000000 0x0 0x2000 0x2000 0 0xe000>;
Bin Meng5c564222015-06-03 09:20:06 +080064
Simon Glassf2b85ab2016-01-18 20:19:21 -070065 pch@1f,0 {
Bin Meng5c564222015-06-03 09:20:06 +080066 reg = <0x0000f800 0 0 0 0>;
Simon Glassf2b85ab2016-01-18 20:19:21 -070067 compatible = "intel,pch9";
Bin Meng2cffd902017-01-18 03:32:57 -080068 u-boot,dm-pre-reloc;
Simon Glassf2b85ab2016-01-18 20:19:21 -070069
70 irq-router {
71 compatible = "intel,irq-router";
Bin Meng2cffd902017-01-18 03:32:57 -080072 u-boot,dm-pre-reloc;
Simon Glassf2b85ab2016-01-18 20:19:21 -070073 intel,pirq-config = "pci";
Bin Mengce8dd772016-05-07 07:46:15 -070074 intel,actl-8bit;
75 intel,actl-addr = <0x44>;
Simon Glassf2b85ab2016-01-18 20:19:21 -070076 intel,pirq-link = <0x60 8>;
77 intel,pirq-mask = <0x0e40>;
78 intel,pirq-routing = <
79 /* e1000 NIC */
80 PCI_BDF(0, 2, 0) INTA PIRQG
81 /* ICH9 UHCI */
82 PCI_BDF(0, 29, 0) INTA PIRQA
83 PCI_BDF(0, 29, 1) INTB PIRQB
84 PCI_BDF(0, 29, 2) INTC PIRQC
85 /* ICH9 EHCI */
86 PCI_BDF(0, 29, 7) INTD PIRQD
87 /* ICH9 SATA */
88 PCI_BDF(0, 31, 2) INTA PIRQA
89 >;
90 };
Bin Meng5c564222015-06-03 09:20:06 +080091 };
Bin Menga65b25d2015-05-07 21:34:08 +080092 };
93
94};