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Yusuke Godac133c1f2008-03-11 12:55:12 +09001/*
2 * Configuation settings for the Renesas R7780MP board
3 *
Nobuhiro Iwamatsuec39d472008-06-17 16:28:01 +09004 * Copyright (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Yusuke Godac133c1f2008-03-11 12:55:12 +09005 * Copyright (C) 2008 Yusuke Goda <goda.yusuke@renesas.com>
6 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Yusuke Godac133c1f2008-03-11 12:55:12 +09008 */
9
10#ifndef __R7780RP_H
11#define __R7780RP_H
12
13#undef DEBUG
Yusuke Godac133c1f2008-03-11 12:55:12 +090014#define CONFIG_CPU_SH7780 1
15#define CONFIG_R7780MP 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020016#define CONFIG_SYS_R7780MP_OLD_FLASH 1
Nobuhiro Iwamatsuec39d472008-06-17 16:28:01 +090017#define __LITTLE_ENDIAN__ 1
Yusuke Godac133c1f2008-03-11 12:55:12 +090018
19/*
20 * Command line configuration.
21 */
22#define CONFIG_CMD_SDRAM
23#define CONFIG_CMD_FLASH
24#define CONFIG_CMD_MEMORY
25#define CONFIG_CMD_PCI
26#define CONFIG_CMD_NET
27#define CONFIG_CMD_PING
Mike Frysingerbdab39d2009-01-28 19:08:14 -050028#define CONFIG_CMD_SAVEENV
Yusuke Godac133c1f2008-03-11 12:55:12 +090029#define CONFIG_CMD_NFS
30#define CONFIG_CMD_IDE
31#define CONFIG_CMD_EXT2
32#define CONFIG_DOS_PARTITION
33
Jean-Christophe PLAGNIOL-VILLARD6c58a032008-08-13 01:40:38 +020034#define CONFIG_SCIF_CONSOLE 1
Yusuke Godac133c1f2008-03-11 12:55:12 +090035#define CONFIG_BAUDRATE 115200
36#define CONFIG_CONS_SCIF0 1
37
38#define CONFIG_BOOTDELAY 3
39#define CONFIG_BOOTARGS "console=ttySC0,115200"
40#define CONFIG_ENV_OVERWRITE 1
41
42/* check for keypress on bootdelay==0 */
43/*#define CONFIG_ZERO_BOOTDELAY_CHECK*/
44
Nobuhiro Iwamatsu913c8912011-01-17 20:50:26 +090045#define CONFIG_SYS_TEXT_BASE 0x0FFC0000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020046#define CONFIG_SYS_SDRAM_BASE (0x08000000)
47#define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024)
Yusuke Godac133c1f2008-03-11 12:55:12 +090048
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020049#define CONFIG_SYS_LONGHELP
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020050#define CONFIG_SYS_CBSIZE 256
51#define CONFIG_SYS_PBSIZE 256
52#define CONFIG_SYS_MAXARGS 16
53#define CONFIG_SYS_BARGSIZE 512
Yusuke Godac133c1f2008-03-11 12:55:12 +090054
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020055#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
Wolfgang Denk14d0a022010-10-07 21:51:12 +020056#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000)
Yusuke Godac133c1f2008-03-11 12:55:12 +090057
Nobuhiro Iwamatsuec39d472008-06-17 16:28:01 +090058/* Flash board support */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020059#define CONFIG_SYS_FLASH_BASE (0xA0000000)
60#ifdef CONFIG_SYS_R7780MP_OLD_FLASH
Nobuhiro Iwamatsuec39d472008-06-17 16:28:01 +090061/* NOR Flash (S29PL127J60TFI130) */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020062# define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT
63# define CONFIG_SYS_MAX_FLASH_BANKS (2)
64# define CONFIG_SYS_MAX_FLASH_SECT 270
65# define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE,\
66 CONFIG_SYS_FLASH_BASE + 0x100000,\
67 CONFIG_SYS_FLASH_BASE + 0x400000,\
68 CONFIG_SYS_FLASH_BASE + 0x700000, }
69#else /* CONFIG_SYS_R7780MP_OLD_FLASH */
Nobuhiro Iwamatsuec39d472008-06-17 16:28:01 +090070/* NOR Flash (Spantion S29GL256P) */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020071# define CONFIG_SYS_MAX_FLASH_BANKS (1)
72# define CONFIG_SYS_MAX_FLASH_SECT 256
73# define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
74#endif /* CONFIG_SYS_R7780MP_OLD_FLASH */
Yusuke Godac133c1f2008-03-11 12:55:12 +090075
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020076#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024)
Yusuke Godac133c1f2008-03-11 12:55:12 +090077/* Address of u-boot image in Flash */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020078#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
79#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
Yusuke Godac133c1f2008-03-11 12:55:12 +090080/* Size of DRAM reserved for malloc() use */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020081#define CONFIG_SYS_MALLOC_LEN (1204 * 1024)
Yusuke Godac133c1f2008-03-11 12:55:12 +090082
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020083#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
84#define CONFIG_SYS_RX_ETH_BUFFER (8)
Yusuke Godac133c1f2008-03-11 12:55:12 +090085
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020086#define CONFIG_SYS_FLASH_CFI
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +020087#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020088#undef CONFIG_SYS_FLASH_CFI_BROKEN_TABLE
89#undef CONFIG_SYS_FLASH_QUIET_TEST
Yusuke Godac133c1f2008-03-11 12:55:12 +090090/* print 'E' for empty sector on flinfo */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020091#define CONFIG_SYS_FLASH_EMPTY_INFO
Yusuke Godac133c1f2008-03-11 12:55:12 +090092
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +020093#define CONFIG_ENV_IS_IN_FLASH
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +020094#define CONFIG_ENV_SECT_SIZE (256 * 1024)
95#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020096#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
97#define CONFIG_SYS_FLASH_ERASE_TOUT 120000
98#define CONFIG_SYS_FLASH_WRITE_TOUT 500
Yusuke Godac133c1f2008-03-11 12:55:12 +090099
100/* Board Clock */
101#define CONFIG_SYS_CLK_FREQ 33333333
Nobuhiro Iwamatsu684a5012013-08-21 16:11:21 +0900102#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
103#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
Jean-Christophe PLAGNIOL-VILLARDbe45c632009-06-04 12:06:48 +0200104#define CONFIG_SYS_TMU_CLK_DIV 4
Yusuke Godac133c1f2008-03-11 12:55:12 +0900105
106/* PCI Controller */
107#if defined(CONFIG_CMD_PCI)
108#define CONFIG_PCI
109#define CONFIG_SH4_PCI
Nobuhiro Iwamatsuab8f4d42008-03-24 02:11:26 +0900110#define CONFIG_SH7780_PCI
Yoshihiro Shimoda06b18162009-02-25 14:26:42 +0900111#define CONFIG_SH7780_PCI_LSR 0x07f00001
112#define CONFIG_SH7780_PCI_LAR CONFIG_SYS_SDRAM_SIZE
113#define CONFIG_SH7780_PCI_BAR CONFIG_SYS_SDRAM_SIZE
Yusuke Godac133c1f2008-03-11 12:55:12 +0900114#define CONFIG_PCI_PNP
115#define CONFIG_PCI_SCAN_SHOW 1
116#define __io
117#define __mem_pci
118
119#define CONFIG_PCI_MEM_BUS 0xFD000000 /* Memory space base addr */
120#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
121#define CONFIG_PCI_MEM_SIZE 0x01000000 /* Size of Memory window */
122
123#define CONFIG_PCI_IO_BUS 0xFE200000 /* IO space base address */
124#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
125#define CONFIG_PCI_IO_SIZE 0x00200000 /* Size of IO window */
Nobuhiro Iwamatsu04366d02009-07-08 11:42:19 +0900126#define CONFIG_PCI_SYS_PHYS CONFIG_SYS_SDRAM_BASE
127#define CONFIG_PCI_SYS_BUS CONFIG_SYS_SDRAM_BASE
128#define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE
Yusuke Godac133c1f2008-03-11 12:55:12 +0900129#endif /* CONFIG_CMD_PCI */
130
131#if defined(CONFIG_CMD_NET)
Nobuhiro Iwamatsuec39d472008-06-17 16:28:01 +0900132/*
Nobuhiro Iwamatsuec39d472008-06-17 16:28:01 +0900133#define CONFIG_RTL8169
134*/
Marcel Ziswilerc7c1dbb2009-09-09 21:09:00 +0200135/* AX88796L Support(NE2000 base chip) */
Yusuke Godac133c1f2008-03-11 12:55:12 +0900136#define CONFIG_DRIVER_AX88796L
137#define CONFIG_DRIVER_NE2000_BASE 0xA4100000
138#endif
139
140/* Compact flash Support */
141#if defined(CONFIG_CMD_IDE)
142#define CONFIG_IDE_RESET 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200143#define CONFIG_SYS_PIO_MODE 1
144#define CONFIG_SYS_IDE_MAXBUS 1 /* IDE bus */
145#define CONFIG_SYS_IDE_MAXDEVICE 1
146#define CONFIG_SYS_ATA_BASE_ADDR 0xb4000000
147#define CONFIG_SYS_ATA_STRIDE 2 /* 1bit shift */
148#define CONFIG_SYS_ATA_DATA_OFFSET 0x1000 /* data reg offset */
149#define CONFIG_SYS_ATA_REG_OFFSET 0x1000 /* reg offset */
150#define CONFIG_SYS_ATA_ALT_OFFSET 0x800 /* alternate register offset */
Albert Aribaudf2a37fc2010-08-08 05:17:05 +0530151#define CONFIG_IDE_SWAP_IO
Yusuke Godac133c1f2008-03-11 12:55:12 +0900152#endif /* CONFIG_CMD_IDE */
153
154#endif /* __R7780RP_H */