Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Simon Glass | dde3b70 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2004-2008 Texas Instruments |
| 4 | * |
| 5 | * (C) Copyright 2002 |
| 6 | * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> |
Simon Glass | dde3b70 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 7 | */ |
| 8 | |
Marc Zyngier | bf433af | 2014-07-12 14:24:02 +0100 | [diff] [blame] | 9 | #include <config.h> |
Chen-Yu Tsai | 980d6a5 | 2016-06-19 12:38:36 +0800 | [diff] [blame] | 10 | #include <asm/psci.h> |
Marc Zyngier | bf433af | 2014-07-12 14:24:02 +0100 | [diff] [blame] | 11 | |
Simon Glass | dde3b70 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 12 | OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") |
| 13 | OUTPUT_ARCH(arm) |
| 14 | ENTRY(_start) |
| 15 | SECTIONS |
| 16 | { |
Simon Glass | c135211 | 2016-03-13 19:07:29 -0600 | [diff] [blame] | 17 | #ifndef CONFIG_CMDLINE |
| 18 | /DISCARD/ : { *(.u_boot_list_2_cmd_*) } |
| 19 | #endif |
Wang Dongsheng | c5e954e | 2016-01-18 11:02:40 +0800 | [diff] [blame] | 20 | #if defined(CONFIG_ARMV7_SECURE_BASE) && defined(CONFIG_ARMV7_NONSEC) |
Peng Fan | d47cb0b | 2015-10-23 10:13:03 +0800 | [diff] [blame] | 21 | /* |
Wang Dongsheng | c5e954e | 2016-01-18 11:02:40 +0800 | [diff] [blame] | 22 | * If CONFIG_ARMV7_SECURE_BASE is true, secure code will not |
| 23 | * bundle with u-boot, and code offsets are fixed. Secure zone |
| 24 | * only needs to be copied from the loading address to |
| 25 | * CONFIG_ARMV7_SECURE_BASE, which is the linking and running |
| 26 | * address for secure code. |
Peng Fan | d47cb0b | 2015-10-23 10:13:03 +0800 | [diff] [blame] | 27 | * |
Wang Dongsheng | c5e954e | 2016-01-18 11:02:40 +0800 | [diff] [blame] | 28 | * If CONFIG_ARMV7_SECURE_BASE is undefined, the secure zone will |
| 29 | * be included in u-boot address space, and some absolute address |
| 30 | * were used in secure code. The absolute addresses of the secure |
| 31 | * code also needs to be relocated along with the accompanying u-boot |
| 32 | * code. |
| 33 | * |
| 34 | * So DISCARD is only for CONFIG_ARMV7_SECURE_BASE. |
Peng Fan | d47cb0b | 2015-10-23 10:13:03 +0800 | [diff] [blame] | 35 | */ |
| 36 | /DISCARD/ : { *(.rel._secure*) } |
Wang Dongsheng | c5e954e | 2016-01-18 11:02:40 +0800 | [diff] [blame] | 37 | #endif |
Simon Glass | dde3b70 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 38 | . = 0x00000000; |
| 39 | |
| 40 | . = ALIGN(4); |
| 41 | .text : |
| 42 | { |
Albert ARIBAUD | d026dec | 2013-06-11 14:17:33 +0200 | [diff] [blame] | 43 | *(.__image_copy_start) |
Albert ARIBAUD | 41623c9 | 2014-04-15 16:13:51 +0200 | [diff] [blame] | 44 | *(.vectors) |
Stephen Warren | b68d671 | 2012-10-22 06:19:32 +0000 | [diff] [blame] | 45 | CPUDIR/start.o (.text*) |
Alexander Graf | 7e21fbc | 2018-06-12 07:48:37 +0200 | [diff] [blame] | 46 | } |
| 47 | |
| 48 | /* This needs to come before *(.text*) */ |
| 49 | .__efi_runtime_start : { |
| 50 | *(.__efi_runtime_start) |
| 51 | } |
| 52 | |
| 53 | .efi_runtime : { |
| 54 | *(.text.efi_runtime*) |
| 55 | *(.rodata.efi_runtime*) |
| 56 | *(.data.efi_runtime*) |
| 57 | } |
| 58 | |
| 59 | .__efi_runtime_stop : { |
| 60 | *(.__efi_runtime_stop) |
| 61 | } |
| 62 | |
| 63 | .text_rest : |
| 64 | { |
Stephen Warren | b68d671 | 2012-10-22 06:19:32 +0000 | [diff] [blame] | 65 | *(.text*) |
Simon Glass | dde3b70 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 66 | } |
| 67 | |
Jan Kiszka | 104d6fb | 2015-04-21 07:18:24 +0200 | [diff] [blame] | 68 | #ifdef CONFIG_ARMV7_NONSEC |
Marc Zyngier | bf433af | 2014-07-12 14:24:02 +0100 | [diff] [blame] | 69 | |
Chen-Yu Tsai | a1274cc | 2016-06-19 12:38:34 +0800 | [diff] [blame] | 70 | /* Align the secure section only if we're going to use it in situ */ |
Chen-Yu Tsai | 792b204 | 2018-09-06 11:56:28 +0800 | [diff] [blame] | 71 | .__secure_start |
Chen-Yu Tsai | a1274cc | 2016-06-19 12:38:34 +0800 | [diff] [blame] | 72 | #ifndef CONFIG_ARMV7_SECURE_BASE |
| 73 | ALIGN(CONSTANT(COMMONPAGESIZE)) |
| 74 | #endif |
Chen-Yu Tsai | 792b204 | 2018-09-06 11:56:28 +0800 | [diff] [blame] | 75 | : { |
Chen-Yu Tsai | a1274cc | 2016-06-19 12:38:34 +0800 | [diff] [blame] | 76 | KEEP(*(.__secure_start)) |
| 77 | } |
| 78 | |
Marc Zyngier | bf433af | 2014-07-12 14:24:02 +0100 | [diff] [blame] | 79 | #ifndef CONFIG_ARMV7_SECURE_BASE |
| 80 | #define CONFIG_ARMV7_SECURE_BASE |
Chen-Yu Tsai | b56e06d | 2016-06-07 10:54:27 +0800 | [diff] [blame] | 81 | #define __ARMV7_PSCI_STACK_IN_RAM |
Marc Zyngier | bf433af | 2014-07-12 14:24:02 +0100 | [diff] [blame] | 82 | #endif |
| 83 | |
Marc Zyngier | bf433af | 2014-07-12 14:24:02 +0100 | [diff] [blame] | 84 | .secure_text CONFIG_ARMV7_SECURE_BASE : |
| 85 | AT(ADDR(.__secure_start) + SIZEOF(.__secure_start)) |
| 86 | { |
| 87 | *(._secure.text) |
| 88 | } |
| 89 | |
Chen-Yu Tsai | a5aa7ff | 2016-07-05 21:45:06 +0800 | [diff] [blame] | 90 | .secure_data : AT(LOADADDR(.secure_text) + SIZEOF(.secure_text)) |
| 91 | { |
| 92 | *(._secure.data) |
| 93 | } |
| 94 | |
Masahiro Yamada | 2fe1281 | 2016-09-26 14:21:30 +0900 | [diff] [blame] | 95 | #ifdef CONFIG_ARMV7_PSCI |
Chen-Yu Tsai | a5aa7ff | 2016-07-05 21:45:06 +0800 | [diff] [blame] | 96 | .secure_stack ALIGN(ADDR(.secure_data) + SIZEOF(.secure_data), |
Chen-Yu Tsai | 980d6a5 | 2016-06-19 12:38:36 +0800 | [diff] [blame] | 97 | CONSTANT(COMMONPAGESIZE)) (NOLOAD) : |
Chen-Yu Tsai | b56e06d | 2016-06-07 10:54:27 +0800 | [diff] [blame] | 98 | #ifdef __ARMV7_PSCI_STACK_IN_RAM |
Chen-Yu Tsai | 980d6a5 | 2016-06-19 12:38:36 +0800 | [diff] [blame] | 99 | AT(ADDR(.secure_stack)) |
| 100 | #else |
Chen-Yu Tsai | a5aa7ff | 2016-07-05 21:45:06 +0800 | [diff] [blame] | 101 | AT(LOADADDR(.secure_data) + SIZEOF(.secure_data)) |
Chen-Yu Tsai | 980d6a5 | 2016-06-19 12:38:36 +0800 | [diff] [blame] | 102 | #endif |
| 103 | { |
| 104 | KEEP(*(.__secure_stack_start)) |
Masahiro Yamada | 2fe1281 | 2016-09-26 14:21:30 +0900 | [diff] [blame] | 105 | |
Chen-Yu Tsai | 980d6a5 | 2016-06-19 12:38:36 +0800 | [diff] [blame] | 106 | /* Skip addreses for stack */ |
| 107 | . = . + CONFIG_ARMV7_PSCI_NR_CPUS * ARM_PSCI_STACK_SIZE; |
Masahiro Yamada | 2fe1281 | 2016-09-26 14:21:30 +0900 | [diff] [blame] | 108 | |
Chen-Yu Tsai | 980d6a5 | 2016-06-19 12:38:36 +0800 | [diff] [blame] | 109 | /* Align end of stack section to page boundary */ |
| 110 | . = ALIGN(CONSTANT(COMMONPAGESIZE)); |
| 111 | |
| 112 | KEEP(*(.__secure_stack_end)) |
Chen-Yu Tsai | 3eff681 | 2016-06-19 12:38:39 +0800 | [diff] [blame] | 113 | |
| 114 | #ifdef CONFIG_ARMV7_SECURE_MAX_SIZE |
| 115 | /* |
| 116 | * We are not checking (__secure_end - __secure_start) here, |
| 117 | * as these are the load addresses, and do not include the |
| 118 | * stack section. Instead, use the end of the stack section |
| 119 | * and the start of the text section. |
| 120 | */ |
| 121 | ASSERT((. - ADDR(.secure_text)) <= CONFIG_ARMV7_SECURE_MAX_SIZE, |
| 122 | "Error: secure section exceeds secure memory size"); |
| 123 | #endif |
Chen-Yu Tsai | 980d6a5 | 2016-06-19 12:38:36 +0800 | [diff] [blame] | 124 | } |
| 125 | |
| 126 | #ifndef __ARMV7_PSCI_STACK_IN_RAM |
| 127 | /* Reset VMA but don't allocate space if we have secure SRAM */ |
| 128 | . = LOADADDR(.secure_stack); |
Chen-Yu Tsai | b56e06d | 2016-06-07 10:54:27 +0800 | [diff] [blame] | 129 | #endif |
| 130 | |
Masahiro Yamada | 2fe1281 | 2016-09-26 14:21:30 +0900 | [diff] [blame] | 131 | #endif |
| 132 | |
Chen-Yu Tsai | 980d6a5 | 2016-06-19 12:38:36 +0800 | [diff] [blame] | 133 | .__secure_end : AT(ADDR(.__secure_end)) { |
Marc Zyngier | bf433af | 2014-07-12 14:24:02 +0100 | [diff] [blame] | 134 | *(.__secure_end) |
| 135 | LONG(0x1d1071c); /* Must output something to reset LMA */ |
| 136 | } |
| 137 | #endif |
| 138 | |
Simon Glass | dde3b70 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 139 | . = ALIGN(4); |
| 140 | .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } |
| 141 | |
| 142 | . = ALIGN(4); |
| 143 | .data : { |
Stephen Warren | b68d671 | 2012-10-22 06:19:32 +0000 | [diff] [blame] | 144 | *(.data*) |
Simon Glass | dde3b70 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 145 | } |
| 146 | |
| 147 | . = ALIGN(4); |
| 148 | |
| 149 | . = .; |
Simon Glass | dde3b70 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 150 | |
| 151 | . = ALIGN(4); |
Marek Vasut | 5567514 | 2012-10-12 10:27:03 +0000 | [diff] [blame] | 152 | .u_boot_list : { |
Albert ARIBAUD | ef123c5 | 2013-02-25 00:59:00 +0000 | [diff] [blame] | 153 | KEEP(*(SORT(.u_boot_list*))); |
Marek Vasut | 5567514 | 2012-10-12 10:27:03 +0000 | [diff] [blame] | 154 | } |
| 155 | |
| 156 | . = ALIGN(4); |
Simon Glass | dde3b70 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 157 | |
Alexander Graf | 50149ea | 2016-03-04 01:10:01 +0100 | [diff] [blame] | 158 | .efi_runtime_rel_start : |
| 159 | { |
| 160 | *(.__efi_runtime_rel_start) |
| 161 | } |
| 162 | |
| 163 | .efi_runtime_rel : { |
Alexander Graf | 7e21fbc | 2018-06-12 07:48:37 +0200 | [diff] [blame] | 164 | *(.rel*.efi_runtime) |
| 165 | *(.rel*.efi_runtime.*) |
Alexander Graf | 50149ea | 2016-03-04 01:10:01 +0100 | [diff] [blame] | 166 | } |
| 167 | |
| 168 | .efi_runtime_rel_stop : |
| 169 | { |
| 170 | *(.__efi_runtime_rel_stop) |
| 171 | } |
| 172 | |
Tom Rini | 83ebd4a | 2017-06-14 09:13:21 -0400 | [diff] [blame] | 173 | . = ALIGN(4); |
Alexander Graf | 50149ea | 2016-03-04 01:10:01 +0100 | [diff] [blame] | 174 | |
Albert ARIBAUD | d026dec | 2013-06-11 14:17:33 +0200 | [diff] [blame] | 175 | .image_copy_end : |
| 176 | { |
| 177 | *(.__image_copy_end) |
| 178 | } |
Simon Glass | dde3b70 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 179 | |
Albert ARIBAUD | 47bd65e | 2013-06-11 14:17:34 +0200 | [diff] [blame] | 180 | .rel_dyn_start : |
| 181 | { |
| 182 | *(.__rel_dyn_start) |
| 183 | } |
| 184 | |
Simon Glass | dde3b70 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 185 | .rel.dyn : { |
Simon Glass | dde3b70 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 186 | *(.rel*) |
Albert ARIBAUD | 47bd65e | 2013-06-11 14:17:34 +0200 | [diff] [blame] | 187 | } |
| 188 | |
| 189 | .rel_dyn_end : |
| 190 | { |
| 191 | *(.__rel_dyn_end) |
Simon Glass | dde3b70 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 192 | } |
| 193 | |
Albert ARIBAUD | d0b5d9d | 2014-02-22 17:53:42 +0100 | [diff] [blame] | 194 | .end : |
| 195 | { |
| 196 | *(.__end) |
| 197 | } |
| 198 | |
| 199 | _image_binary_end = .; |
Simon Glass | dde3b70 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 200 | |
| 201 | /* |
| 202 | * Deprecated: this MMU section is used by pxa at present but |
| 203 | * should not be used by new boards/CPUs. |
| 204 | */ |
| 205 | . = ALIGN(4096); |
| 206 | .mmutable : { |
| 207 | *(.mmutable) |
| 208 | } |
| 209 | |
Albert ARIBAUD | f84a7b8 | 2013-04-11 05:43:21 +0000 | [diff] [blame] | 210 | /* |
| 211 | * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c |
| 212 | * __bss_base and __bss_limit are for linker only (overlay ordering) |
| 213 | */ |
| 214 | |
Albert ARIBAUD | 3ebd1cb | 2013-02-25 00:58:59 +0000 | [diff] [blame] | 215 | .bss_start __rel_dyn_start (OVERLAY) : { |
| 216 | KEEP(*(.__bss_start)); |
Albert ARIBAUD | f84a7b8 | 2013-04-11 05:43:21 +0000 | [diff] [blame] | 217 | __bss_base = .; |
Albert ARIBAUD | 3ebd1cb | 2013-02-25 00:58:59 +0000 | [diff] [blame] | 218 | } |
| 219 | |
Albert ARIBAUD | f84a7b8 | 2013-04-11 05:43:21 +0000 | [diff] [blame] | 220 | .bss __bss_base (OVERLAY) : { |
Stephen Warren | b68d671 | 2012-10-22 06:19:32 +0000 | [diff] [blame] | 221 | *(.bss*) |
Simon Glass | dde3b70 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 222 | . = ALIGN(4); |
Albert ARIBAUD | f84a7b8 | 2013-04-11 05:43:21 +0000 | [diff] [blame] | 223 | __bss_limit = .; |
Albert ARIBAUD | 3ebd1cb | 2013-02-25 00:58:59 +0000 | [diff] [blame] | 224 | } |
Tom Rini | 0ce033d | 2013-03-18 12:31:00 -0400 | [diff] [blame] | 225 | |
Albert ARIBAUD | f84a7b8 | 2013-04-11 05:43:21 +0000 | [diff] [blame] | 226 | .bss_end __bss_limit (OVERLAY) : { |
| 227 | KEEP(*(.__bss_end)); |
Simon Glass | dde3b70 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 228 | } |
| 229 | |
Albert ARIBAUD | d0b5d9d | 2014-02-22 17:53:42 +0100 | [diff] [blame] | 230 | .dynsym _image_binary_end : { *(.dynsym) } |
Albert ARIBAUD | 47ed5dd | 2013-11-07 14:21:46 +0100 | [diff] [blame] | 231 | .dynbss : { *(.dynbss) } |
| 232 | .dynstr : { *(.dynstr*) } |
| 233 | .dynamic : { *(.dynamic*) } |
| 234 | .plt : { *(.plt*) } |
| 235 | .interp : { *(.interp*) } |
Andreas Färber | 2c67e0e | 2014-01-27 05:48:11 +0100 | [diff] [blame] | 236 | .gnu.hash : { *(.gnu.hash) } |
Albert ARIBAUD | 47ed5dd | 2013-11-07 14:21:46 +0100 | [diff] [blame] | 237 | .gnu : { *(.gnu*) } |
| 238 | .ARM.exidx : { *(.ARM.exidx*) } |
Albert ARIBAUD | b02bfc4 | 2014-01-13 14:57:05 +0100 | [diff] [blame] | 239 | .gnu.linkonce.armexidx : { *(.gnu.linkonce.armexidx.*) } |
Simon Glass | dde3b70 | 2012-02-23 03:28:41 +0000 | [diff] [blame] | 240 | } |