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wdenk1c437712004-01-16 00:30:56 +00001/***********************************************************************
2 *
Detlev Zundel200779e2009-04-03 11:53:01 +02003 * (C) Copyright 2004-2009
wdenk1c437712004-01-16 00:30:56 +00004 * DENX Software Engineering
5 * Wolfgang Denk, wd@denx.de
wdenk1c437712004-01-16 00:30:56 +00006 *
7 * Simple 16550A serial driver
8 *
9 * Originally from linux source (drivers/char/ps2ser.c)
10 *
11 * Used by the PS/2 multiplexer driver (ps2mult.c)
12 *
13 ***********************************************************************/
14
15#include <common.h>
16
wdenk1c437712004-01-16 00:30:56 +000017#include <asm/io.h>
18#include <asm/atomic.h>
19#include <ps2mult.h>
Detlev Zundel200779e2009-04-03 11:53:01 +020020/* This is needed for ns16550.h */
21#ifndef CONFIG_SYS_NS16550_REG_SIZE
22#define CONFIG_SYS_NS16550_REG_SIZE 1
Wolfgang Denkbc8bb6d2006-06-16 16:40:54 +020023#endif
Detlev Zundel200779e2009-04-03 11:53:01 +020024#include <ns16550.h>
wdenk1c437712004-01-16 00:30:56 +000025
Wolfgang Denkd87080b2006-03-31 18:32:53 +020026DECLARE_GLOBAL_DATA_PTR;
27
wdenk1c437712004-01-16 00:30:56 +000028/* #define DEBUG */
29
30#define PS2SER_BAUD 57600
31
wdenk7e6bf352004-12-12 22:06:17 +000032#ifdef CONFIG_MPC5xxx
33#if CONFIG_PS2SERIAL == 1
34#define PSC_BASE MPC5XXX_PSC1
35#elif CONFIG_PS2SERIAL == 2
36#define PSC_BASE MPC5XXX_PSC2
37#elif CONFIG_PS2SERIAL == 3
38#define PSC_BASE MPC5XXX_PSC3
39#elif defined(CONFIG_MGT5100)
40#error CONFIG_PS2SERIAL must be in 1, 2 or 3
41#elif CONFIG_PS2SERIAL == 4
42#define PSC_BASE MPC5XXX_PSC4
43#elif CONFIG_PS2SERIAL == 5
44#define PSC_BASE MPC5XXX_PSC5
45#elif CONFIG_PS2SERIAL == 6
46#define PSC_BASE MPC5XXX_PSC6
47#else
48#error CONFIG_PS2SERIAL must be in 1 ... 6
49#endif
Wolfgang Denkbc8bb6d2006-06-16 16:40:54 +020050
Wolfgang Grandegger1287e0c2008-06-05 13:12:07 +020051#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
52 defined(CONFIG_MPC8548) || defined(CONFIG_MPC8555)
Wolfgang Denkbc8bb6d2006-06-16 16:40:54 +020053
54#if CONFIG_PS2SERIAL == 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020055#define COM_BASE (CONFIG_SYS_CCSRBAR+0x4500)
Wolfgang Denkbc8bb6d2006-06-16 16:40:54 +020056#elif CONFIG_PS2SERIAL == 2
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020057#define COM_BASE (CONFIG_SYS_CCSRBAR+0x4600)
Wolfgang Denkbc8bb6d2006-06-16 16:40:54 +020058#else
59#error CONFIG_PS2SERIAL must be in 1 ... 2
60#endif
61
Wolfgang Denkbd3143f2006-07-19 14:49:35 +020062#endif /* CONFIG_MPC5xxx / CONFIG_MPC8540 / other */
wdenk7e6bf352004-12-12 22:06:17 +000063
wdenk1c437712004-01-16 00:30:56 +000064static int ps2ser_getc_hw(void);
65static void ps2ser_interrupt(void *dev_id);
66
67extern struct serial_state rs_table[]; /* in serial.c */
Wolfgang Grandegger1287e0c2008-06-05 13:12:07 +020068#if !defined(CONFIG_MPC5xxx) && !defined(CONFIG_MPC8540) && \
69 !defined(CONFIG_MPC8541) && !defined(CONFIG_MPC8548) && \
70 !defined(CONFIG_MPC8555)
wdenkef978732004-01-21 20:46:28 +000071static struct serial_state *state;
wdenk7e6bf352004-12-12 22:06:17 +000072#endif
wdenk1c437712004-01-16 00:30:56 +000073
74static u_char ps2buf[PS2BUF_SIZE];
75static atomic_t ps2buf_cnt;
76static int ps2buf_in_idx;
77static int ps2buf_out_idx;
78
wdenk7e6bf352004-12-12 22:06:17 +000079#ifdef CONFIG_MPC5xxx
80int ps2ser_init(void)
81{
wdenk7e6bf352004-12-12 22:06:17 +000082 volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
83 unsigned long baseclk;
84 int div;
85
86 /* reset PSC */
87 psc->command = PSC_SEL_MODE_REG_1;
88
89 /* select clock sources */
90#if defined(CONFIG_MGT5100)
91 psc->psc_clock_select = 0xdd00;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020092 baseclk = (CONFIG_SYS_MPC5XXX_CLKIN + 16) / 32;
wdenk7e6bf352004-12-12 22:06:17 +000093#elif defined(CONFIG_MPC5200)
94 psc->psc_clock_select = 0;
95 baseclk = (gd->ipb_clk + 16) / 32;
96#endif
97
98 /* switch to UART mode */
99 psc->sicr = 0;
100
101 /* configure parity, bit length and so on */
102#if defined(CONFIG_MGT5100)
103 psc->mode = PSC_MODE_ERR | PSC_MODE_8_BITS | PSC_MODE_PARNONE;
104#elif defined(CONFIG_MPC5200)
105 psc->mode = PSC_MODE_8_BITS | PSC_MODE_PARNONE;
106#endif
107 psc->mode = PSC_MODE_ONE_STOP;
108
109 /* set up UART divisor */
110 div = (baseclk + (PS2SER_BAUD/2)) / PS2SER_BAUD;
111 psc->ctur = (div >> 8) & 0xff;
112 psc->ctlr = div & 0xff;
113
114 /* disable all interrupts */
115 psc->psc_imr = 0;
116
117 /* reset and enable Rx/Tx */
118 psc->command = PSC_RST_RX;
119 psc->command = PSC_RST_TX;
120 psc->command = PSC_RX_ENABLE | PSC_TX_ENABLE;
121
122 return (0);
123}
124
Wolfgang Grandegger1287e0c2008-06-05 13:12:07 +0200125#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
126 defined(CONFIG_MPC8548) || defined(CONFIG_MPC8555)
Wolfgang Denkbc8bb6d2006-06-16 16:40:54 +0200127int ps2ser_init(void)
128{
129 NS16550_t com_port = (NS16550_t)COM_BASE;
130
131 com_port->ier = 0x00;
Detlev Zundel200779e2009-04-03 11:53:01 +0200132 com_port->lcr = UART_LCR_BKSE | UART_LCR_8N1;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200133 com_port->dll = (CONFIG_SYS_NS16550_CLK / 16 / PS2SER_BAUD) & 0xff;
134 com_port->dlm = ((CONFIG_SYS_NS16550_CLK / 16 / PS2SER_BAUD) >> 8) & 0xff;
Detlev Zundel200779e2009-04-03 11:53:01 +0200135 com_port->lcr = UART_LCR_8N1;
136 com_port->mcr = (UART_MCR_DTR | UART_MCR_RTS);
137 com_port->fcr = (UART_FCR_FIFO_EN | UART_FCR_RXSR | UART_FCR_TXSR);
Wolfgang Denkbc8bb6d2006-06-16 16:40:54 +0200138
139 return (0);
140}
141
Wolfgang Denkbd3143f2006-07-19 14:49:35 +0200142#else /* !CONFIG_MPC5xxx && !CONFIG_MPC8540 / other */
wdenk1c437712004-01-16 00:30:56 +0000143
144static inline unsigned int ps2ser_in(int offset)
145{
146 return readb((unsigned long) state->iomem_base + offset);
147}
148
149static inline void ps2ser_out(int offset, int value)
150{
151 writeb(value, (unsigned long) state->iomem_base + offset);
152}
153
154int ps2ser_init(void)
155{
wdenkef978732004-01-21 20:46:28 +0000156 int quot;
157 unsigned cval;
158
159 state = rs_table + CONFIG_PS2SERIAL;
160
161 quot = state->baud_base / PS2SER_BAUD;
162 cval = 0x3; /* 8N1 - 8 data bits, no parity bits, 1 stop bit */
wdenk1c437712004-01-16 00:30:56 +0000163
164 /* Set speed, enable interrupts, enable FIFO
165 */
166 ps2ser_out(UART_LCR, cval | UART_LCR_DLAB);
167 ps2ser_out(UART_DLL, quot & 0xff);
168 ps2ser_out(UART_DLM, quot >> 8);
169 ps2ser_out(UART_LCR, cval);
170 ps2ser_out(UART_IER, UART_IER_RDI);
171 ps2ser_out(UART_MCR, UART_MCR_OUT2 | UART_MCR_DTR | UART_MCR_RTS);
172 ps2ser_out(UART_FCR,
173 UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
174
175 /* If we read 0xff from the LSR, there is no UART here
176 */
177 if (ps2ser_in(UART_LSR) == 0xff) {
178 printf ("ps2ser.c: no UART found\n");
179 return -1;
180 }
181
182 irq_install_handler(state->irq, ps2ser_interrupt, NULL);
183
184 return 0;
185}
Wolfgang Denkbd3143f2006-07-19 14:49:35 +0200186#endif /* CONFIG_MPC5xxx / CONFIG_MPC8540 / other */
wdenk1c437712004-01-16 00:30:56 +0000187
188void ps2ser_putc(int chr)
189{
wdenk7e6bf352004-12-12 22:06:17 +0000190#ifdef CONFIG_MPC5xxx
191 volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
Wolfgang Grandegger1287e0c2008-06-05 13:12:07 +0200192#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
193 defined(CONFIG_MPC8548) || defined(CONFIG_MPC8555)
Wolfgang Denkbc8bb6d2006-06-16 16:40:54 +0200194 NS16550_t com_port = (NS16550_t)COM_BASE;
wdenk7e6bf352004-12-12 22:06:17 +0000195#endif
wdenk1c437712004-01-16 00:30:56 +0000196#ifdef DEBUG
197 printf(">>>> 0x%02x\n", chr);
198#endif
199
wdenk7e6bf352004-12-12 22:06:17 +0000200#ifdef CONFIG_MPC5xxx
201 while (!(psc->psc_status & PSC_SR_TXRDY));
wdenkefe2a4d2004-12-16 21:44:03 +0000202
wdenk7e6bf352004-12-12 22:06:17 +0000203 psc->psc_buffer_8 = chr;
Wolfgang Grandegger1287e0c2008-06-05 13:12:07 +0200204#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
205 defined(CONFIG_MPC8548) || defined(CONFIG_MPC8555)
Detlev Zundel200779e2009-04-03 11:53:01 +0200206 while ((com_port->lsr & UART_LSR_THRE) == 0);
Wolfgang Denkbc8bb6d2006-06-16 16:40:54 +0200207 com_port->thr = chr;
wdenk7e6bf352004-12-12 22:06:17 +0000208#else
wdenk1c437712004-01-16 00:30:56 +0000209 while (!(ps2ser_in(UART_LSR) & UART_LSR_THRE));
210
211 ps2ser_out(UART_TX, chr);
wdenk7e6bf352004-12-12 22:06:17 +0000212#endif
wdenk1c437712004-01-16 00:30:56 +0000213}
214
215static int ps2ser_getc_hw(void)
216{
wdenk7e6bf352004-12-12 22:06:17 +0000217#ifdef CONFIG_MPC5xxx
218 volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
Wolfgang Grandegger1287e0c2008-06-05 13:12:07 +0200219#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
220 defined(CONFIG_MPC8548) || defined(CONFIG_MPC8555)
Wolfgang Denkbc8bb6d2006-06-16 16:40:54 +0200221 NS16550_t com_port = (NS16550_t)COM_BASE;
wdenk7e6bf352004-12-12 22:06:17 +0000222#endif
wdenk1c437712004-01-16 00:30:56 +0000223 int res = -1;
224
wdenk7e6bf352004-12-12 22:06:17 +0000225#ifdef CONFIG_MPC5xxx
226 if (psc->psc_status & PSC_SR_RXRDY) {
227 res = (psc->psc_buffer_8);
228 }
Wolfgang Grandegger1287e0c2008-06-05 13:12:07 +0200229#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
230 defined(CONFIG_MPC8548) || defined(CONFIG_MPC8555)
Detlev Zundel200779e2009-04-03 11:53:01 +0200231 if (com_port->lsr & UART_LSR_DR) {
Wolfgang Denkbc8bb6d2006-06-16 16:40:54 +0200232 res = com_port->rbr;
233 }
wdenk7e6bf352004-12-12 22:06:17 +0000234#else
wdenk1c437712004-01-16 00:30:56 +0000235 if (ps2ser_in(UART_LSR) & UART_LSR_DR) {
236 res = (ps2ser_in(UART_RX));
237 }
wdenk7e6bf352004-12-12 22:06:17 +0000238#endif
wdenk1c437712004-01-16 00:30:56 +0000239
240 return res;
241}
242
243int ps2ser_getc(void)
244{
245 volatile int chr;
246 int flags;
247
248#ifdef DEBUG
249 printf("<< ");
250#endif
251
252 flags = disable_interrupts();
253
254 do {
255 if (atomic_read(&ps2buf_cnt) != 0) {
256 chr = ps2buf[ps2buf_out_idx++];
257 ps2buf_out_idx &= (PS2BUF_SIZE - 1);
258 atomic_dec(&ps2buf_cnt);
259 } else {
260 chr = ps2ser_getc_hw();
261 }
262 }
263 while (chr < 0);
264
265 if (flags) enable_interrupts();
266
267#ifdef DEBUG
268 printf("0x%02x\n", chr);
269#endif
270
271 return chr;
272}
273
274int ps2ser_check(void)
275{
276 int flags;
277
278 flags = disable_interrupts();
279 ps2ser_interrupt(NULL);
280 if (flags) enable_interrupts();
281
282 return atomic_read(&ps2buf_cnt);
283}
284
285static void ps2ser_interrupt(void *dev_id)
286{
wdenk7e6bf352004-12-12 22:06:17 +0000287#ifdef CONFIG_MPC5xxx
288 volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
Wolfgang Grandegger1287e0c2008-06-05 13:12:07 +0200289#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
290 defined(CONFIG_MPC8548) || defined(CONFIG_MPC8555)
Wolfgang Denkbc8bb6d2006-06-16 16:40:54 +0200291 NS16550_t com_port = (NS16550_t)COM_BASE;
wdenk7e6bf352004-12-12 22:06:17 +0000292#endif
wdenk1c437712004-01-16 00:30:56 +0000293 int chr;
wdenk7e6bf352004-12-12 22:06:17 +0000294 int status;
wdenk1c437712004-01-16 00:30:56 +0000295
296 do {
297 chr = ps2ser_getc_hw();
wdenk7e6bf352004-12-12 22:06:17 +0000298#ifdef CONFIG_MPC5xxx
299 status = psc->psc_status;
Wolfgang Grandegger1287e0c2008-06-05 13:12:07 +0200300#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
301 defined(CONFIG_MPC8548) || defined(CONFIG_MPC8555)
Wolfgang Denkbc8bb6d2006-06-16 16:40:54 +0200302 status = com_port->lsr;
wdenk7e6bf352004-12-12 22:06:17 +0000303#else
304 status = ps2ser_in(UART_IIR);
305#endif
wdenk1c437712004-01-16 00:30:56 +0000306 if (chr < 0) continue;
307
308 if (atomic_read(&ps2buf_cnt) < PS2BUF_SIZE) {
309 ps2buf[ps2buf_in_idx++] = chr;
310 ps2buf_in_idx &= (PS2BUF_SIZE - 1);
311 atomic_inc(&ps2buf_cnt);
312 } else {
313 printf ("ps2ser.c: buffer overflow\n");
314 }
wdenk7e6bf352004-12-12 22:06:17 +0000315#ifdef CONFIG_MPC5xxx
wdenkefe2a4d2004-12-16 21:44:03 +0000316 } while (status & PSC_SR_RXRDY);
Wolfgang Grandegger1287e0c2008-06-05 13:12:07 +0200317#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
318 defined(CONFIG_MPC8548) || defined(CONFIG_MPC8555)
Detlev Zundel200779e2009-04-03 11:53:01 +0200319 } while (status & UART_LSR_DR);
wdenk7e6bf352004-12-12 22:06:17 +0000320#else
321 } while (status & UART_IIR_RDI);
322#endif
wdenk1c437712004-01-16 00:30:56 +0000323
324 if (atomic_read(&ps2buf_cnt)) {
325 ps2mult_callback(atomic_read(&ps2buf_cnt));
326 }
327}