| Wenyou Yang | 1c0ac82 | 2017-03-24 09:26:16 +0800 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_AT91=y |
| 3 | CONFIG_TARGET_SAMA5D3XEK=y |
| 4 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
| 5 | CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp" |
| Tom Rini | fb82fe3 | 2017-06-19 09:47:40 -0400 | [diff] [blame] | 6 | CONFIG_DEBUG_UART=y |
| Wenyou Yang | 1c0ac82 | 2017-03-24 09:26:16 +0800 | [diff] [blame] | 7 | CONFIG_FIT=y |
| 8 | CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_SERIALFLASH" |
| 9 | CONFIG_BOOTDELAY=3 |
| 10 | # CONFIG_CONSOLE_MUX is not set |
| 11 | CONFIG_SYS_CONSOLE_IS_IN_ENV=y |
| 12 | # CONFIG_DISPLAY_BOARDINFO is not set |
| 13 | CONFIG_HUSH_PARSER=y |
| 14 | CONFIG_CMD_BOOTZ=y |
| 15 | # CONFIG_CMD_IMI is not set |
| 16 | # CONFIG_CMD_IMLS is not set |
| 17 | # CONFIG_CMD_LOADS is not set |
| 18 | CONFIG_CMD_MMC=y |
| 19 | CONFIG_CMD_SF=y |
| 20 | # CONFIG_CMD_FPGA is not set |
| 21 | CONFIG_CMD_DHCP=y |
| 22 | CONFIG_CMD_MII=y |
| 23 | CONFIG_CMD_PING=y |
| 24 | CONFIG_CMD_FAT=y |
| 25 | CONFIG_OF_CONTROL=y |
| 26 | CONFIG_DM=y |
| 27 | CONFIG_CLK=y |
| 28 | CONFIG_CLK_AT91=y |
| 29 | CONFIG_AT91_UTMI=y |
| 30 | CONFIG_AT91_H32MX=y |
| 31 | CONFIG_DM_GPIO=y |
| 32 | CONFIG_AT91_GPIO=y |
| 33 | CONFIG_DM_MMC=y |
| 34 | CONFIG_GENERIC_ATMEL_MCI=y |
| 35 | CONFIG_DM_SPI_FLASH=y |
| 36 | CONFIG_SPI_FLASH=y |
| 37 | CONFIG_SPI_FLASH_ATMEL=y |
| 38 | CONFIG_DM_ETH=y |
| 39 | CONFIG_MACB=y |
| 40 | CONFIG_PINCTRL=y |
| 41 | CONFIG_PINCTRL_AT91=y |
| 42 | CONFIG_DM_SERIAL=y |
| Wenyou Yang | 1c0ac82 | 2017-03-24 09:26:16 +0800 | [diff] [blame] | 43 | CONFIG_DEBUG_UART_ATMEL=y |
| 44 | CONFIG_DEBUG_UART_BASE=0xffffee00 |
| 45 | CONFIG_DEBUG_UART_CLOCK=132000000 |
| 46 | CONFIG_DEBUG_UART_BOARD_INIT=y |
| 47 | CONFIG_DEBUG_UART_ANNOUNCE=y |
| 48 | CONFIG_ATMEL_USART=y |
| 49 | CONFIG_DM_SPI=y |
| 50 | CONFIG_ATMEL_SPI=y |
| 51 | CONFIG_LCD=y |
| Tom Rini | 91d27a1 | 2017-06-02 11:03:50 -0400 | [diff] [blame] | 52 | CONFIG_FAT_WRITE=y |