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Jaehoon Chung442d5562012-04-23 02:36:28 +00001/*
2 * (C) Copyright 2012 SAMSUNG Electronics
3 * Jaehoon Chung <jh80.chung@samsung.com>
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Jaehoon Chung442d5562012-04-23 02:36:28 +00006 */
7
8#include <common.h>
9#include <malloc.h>
10#include <sdhci.h>
Piotr Wilczek3577fe82014-03-07 14:59:41 +010011#include <fdtdec.h>
12#include <libfdt.h>
13#include <asm/gpio.h>
Jaehoon Chung442d5562012-04-23 02:36:28 +000014#include <asm/arch/mmc.h>
Jaehoon Chungb09ed6e2012-08-30 16:24:11 +000015#include <asm/arch/clk.h>
Piotr Wilczek3577fe82014-03-07 14:59:41 +010016#include <errno.h>
Piotr Wilczek3577fe82014-03-07 14:59:41 +010017#include <asm/arch/pinmux.h>
Jaehoon Chung442d5562012-04-23 02:36:28 +000018
19static char *S5P_NAME = "SAMSUNG SDHCI";
20static void s5p_sdhci_set_control_reg(struct sdhci_host *host)
21{
22 unsigned long val, ctrl;
23 /*
24 * SELCLKPADDS[17:16]
25 * 00 = 2mA
26 * 01 = 4mA
27 * 10 = 7mA
28 * 11 = 9mA
29 */
30 sdhci_writel(host, SDHCI_CTRL4_DRIVE_MASK(0x3), SDHCI_CONTROL4);
31
32 val = sdhci_readl(host, SDHCI_CONTROL2);
Matt Reimer8ebde4f2015-02-23 14:52:22 -070033 val &= SDHCI_CTRL2_SELBASECLK_MASK(3);
Jaehoon Chung442d5562012-04-23 02:36:28 +000034
35 val |= SDHCI_CTRL2_ENSTAASYNCCLR |
36 SDHCI_CTRL2_ENCMDCNFMSK |
37 SDHCI_CTRL2_ENFBCLKRX |
38 SDHCI_CTRL2_ENCLKOUTHOLD;
39
40 sdhci_writel(host, val, SDHCI_CONTROL2);
41
42 /*
43 * FCSEL3[31] FCSEL2[23] FCSEL1[15] FCSEL0[7]
44 * FCSel[1:0] : Rx Feedback Clock Delay Control
45 * Inverter delay means10ns delay if SDCLK 50MHz setting
46 * 01 = Delay1 (basic delay)
47 * 11 = Delay2 (basic delay + 2ns)
48 * 00 = Delay3 (inverter delay)
49 * 10 = Delay4 (inverter delay + 2ns)
50 */
Jaehoon Chungb2686602012-08-30 16:24:08 +000051 val = SDHCI_CTRL3_FCSEL0 | SDHCI_CTRL3_FCSEL1;
Jaehoon Chung442d5562012-04-23 02:36:28 +000052 sdhci_writel(host, val, SDHCI_CONTROL3);
53
54 /*
55 * SELBASECLK[5:4]
56 * 00/01 = HCLK
57 * 10 = EPLL
58 * 11 = XTI or XEXTCLK
59 */
60 ctrl = sdhci_readl(host, SDHCI_CONTROL2);
61 ctrl &= ~SDHCI_CTRL2_SELBASECLK_MASK(0x3);
62 ctrl |= SDHCI_CTRL2_SELBASECLK_MASK(0x2);
63 sdhci_writel(host, ctrl, SDHCI_CONTROL2);
64}
65
Jaehoon Chung9b8c9a32014-05-16 13:59:59 +090066static int s5p_sdhci_core_init(struct sdhci_host *host)
Jaehoon Chung442d5562012-04-23 02:36:28 +000067{
Jaehoon Chung442d5562012-04-23 02:36:28 +000068 host->name = S5P_NAME;
Jaehoon Chung442d5562012-04-23 02:36:28 +000069
Jaehoon Chungb2686602012-08-30 16:24:08 +000070 host->quirks = SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE |
Tushar Behera13243f22012-09-20 20:31:57 +000071 SDHCI_QUIRK_BROKEN_R1B | SDHCI_QUIRK_32BIT_DMA_ADDR |
Jaehoon Chung113e5df2013-07-19 17:44:49 +090072 SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_USE_WIDE8;
Jaehoon Chung442d5562012-04-23 02:36:28 +000073 host->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
Jaehoon Chungb2686602012-08-30 16:24:08 +000074 host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
Jaehoon Chung442d5562012-04-23 02:36:28 +000075
76 host->set_control_reg = &s5p_sdhci_set_control_reg;
Jaehoon Chungb09ed6e2012-08-30 16:24:11 +000077 host->set_clock = set_mmc_clk;
Jaehoon Chung442d5562012-04-23 02:36:28 +000078
Jaehoon Chung9b8c9a32014-05-16 13:59:59 +090079 if (host->bus_width == 8)
Jaehoon Chung113e5df2013-07-19 17:44:49 +090080 host->host_caps |= MMC_MODE_8BIT;
Jaehoon Chung442d5562012-04-23 02:36:28 +000081
Jaehoon Chunga68aac42012-12-13 20:07:12 +000082 return add_sdhci(host, 52000000, 400000);
Jaehoon Chung442d5562012-04-23 02:36:28 +000083}
Piotr Wilczek3577fe82014-03-07 14:59:41 +010084
Jaehoon Chung9b8c9a32014-05-16 13:59:59 +090085int s5p_sdhci_init(u32 regbase, int index, int bus_width)
86{
87 struct sdhci_host *host = malloc(sizeof(struct sdhci_host));
88 if (!host) {
89 printf("sdhci__host malloc fail!\n");
90 return 1;
91 }
92 host->ioaddr = (void *)regbase;
93 host->index = index;
94 host->bus_width = bus_width;
95
96 return s5p_sdhci_core_init(host);
97}
98
Piotr Wilczek3577fe82014-03-07 14:59:41 +010099#ifdef CONFIG_OF_CONTROL
100struct sdhci_host sdhci_host[SDHCI_MAX_HOSTS];
101
102static int do_sdhci_init(struct sdhci_host *host)
103{
104 int dev_id, flag;
105 int err = 0;
106
107 flag = host->bus_width == 8 ? PINMUX_FLAG_8BIT_MODE : PINMUX_FLAG_NONE;
108 dev_id = host->index + PERIPH_ID_SDMMC0;
109
Simon Glass03479602015-01-05 20:05:38 -0700110 if (dm_gpio_is_valid(&host->pwr_gpio)) {
111 dm_gpio_set_value(&host->pwr_gpio, 1);
Piotr Wilczek3577fe82014-03-07 14:59:41 +0100112 err = exynos_pinmux_config(dev_id, flag);
113 if (err) {
114 debug("MMC not configured\n");
115 return err;
116 }
117 }
118
Simon Glass03479602015-01-05 20:05:38 -0700119 if (dm_gpio_is_valid(&host->cd_gpio)) {
120 if (dm_gpio_get_value(&host->cd_gpio))
Piotr Wilczek3577fe82014-03-07 14:59:41 +0100121 return -ENODEV;
122
123 err = exynos_pinmux_config(dev_id, flag);
124 if (err) {
125 printf("external SD not configured\n");
126 return err;
127 }
128 }
129
Jaehoon Chung9b8c9a32014-05-16 13:59:59 +0900130 return s5p_sdhci_core_init(host);
Piotr Wilczek3577fe82014-03-07 14:59:41 +0100131}
132
133static int sdhci_get_config(const void *blob, int node, struct sdhci_host *host)
134{
135 int bus_width, dev_id;
136 unsigned int base;
137
138 /* Get device id */
139 dev_id = pinmux_decode_periph_id(blob, node);
140 if (dev_id < PERIPH_ID_SDMMC0 && dev_id > PERIPH_ID_SDMMC3) {
141 debug("MMC: Can't get device id\n");
142 return -1;
143 }
144 host->index = dev_id - PERIPH_ID_SDMMC0;
145
146 /* Get bus width */
147 bus_width = fdtdec_get_int(blob, node, "samsung,bus-width", 0);
148 if (bus_width <= 0) {
149 debug("MMC: Can't get bus-width\n");
150 return -1;
151 }
152 host->bus_width = bus_width;
153
154 /* Get the base address from the device node */
155 base = fdtdec_get_addr(blob, node, "reg");
156 if (!base) {
157 debug("MMC: Can't get base address\n");
158 return -1;
159 }
160 host->ioaddr = (void *)base;
161
Simon Glass03479602015-01-05 20:05:38 -0700162 gpio_request_by_name_nodev(blob, node, "pwr-gpios", 0, &host->pwr_gpio,
163 GPIOD_IS_OUT);
164 gpio_request_by_name_nodev(blob, node, "cd-gpios", 0, &host->cd_gpio,
165 GPIOD_IS_IN);
Piotr Wilczek3577fe82014-03-07 14:59:41 +0100166
167 return 0;
168}
169
170static int process_nodes(const void *blob, int node_list[], int count)
171{
172 struct sdhci_host *host;
173 int i, node;
174
175 debug("%s: count = %d\n", __func__, count);
176
177 /* build sdhci_host[] for each controller */
178 for (i = 0; i < count; i++) {
179 node = node_list[i];
180 if (node <= 0)
181 continue;
182
183 host = &sdhci_host[i];
184
185 if (sdhci_get_config(blob, node, host)) {
186 printf("%s: failed to decode dev %d\n", __func__, i);
187 return -1;
188 }
189 do_sdhci_init(host);
190 }
191 return 0;
192}
193
194int exynos_mmc_init(const void *blob)
195{
196 int count;
197 int node_list[SDHCI_MAX_HOSTS];
198
199 count = fdtdec_find_aliases_for_id(blob, "mmc",
200 COMPAT_SAMSUNG_EXYNOS_MMC, node_list,
201 SDHCI_MAX_HOSTS);
202
203 process_nodes(blob, node_list, count);
204
205 return 1;
206}
207#endif