Simon Glass | 51e9dad | 2015-03-02 12:40:54 -0700 | [diff] [blame] | 1 | /dts-v1/; |
| 2 | |
| 3 | /include/ "skeleton.dtsi" |
| 4 | /include/ "serial.dtsi" |
Bin Meng | b37b7b2 | 2018-07-19 03:07:33 -0700 | [diff] [blame] | 5 | /include/ "reset.dtsi" |
Bin Meng | 93f8a31 | 2015-07-15 16:23:39 +0800 | [diff] [blame] | 6 | /include/ "rtc.dtsi" |
Bin Meng | 80af398 | 2015-11-13 00:11:22 -0800 | [diff] [blame] | 7 | /include/ "tsc_timer.dtsi" |
Simon Glass | 51e9dad | 2015-03-02 12:40:54 -0700 | [diff] [blame] | 8 | |
| 9 | / { |
| 10 | model = "Google Panther"; |
| 11 | compatible = "google,panther", "intel,haswell"; |
| 12 | |
| 13 | aliases { |
Bin Meng | 81aaa3d | 2016-01-27 00:56:34 -0800 | [diff] [blame] | 14 | spi0 = &spi; |
Simon Glass | 51e9dad | 2015-03-02 12:40:54 -0700 | [diff] [blame] | 15 | }; |
| 16 | |
| 17 | config { |
| 18 | silent-console = <0>; |
| 19 | no-keyboard; |
| 20 | }; |
| 21 | |
Simon Glass | 51e9dad | 2015-03-02 12:40:54 -0700 | [diff] [blame] | 22 | chosen { |
| 23 | stdout-path = "/serial"; |
| 24 | }; |
| 25 | |
Simon Glass | 548fb87 | 2015-08-27 19:54:48 -0600 | [diff] [blame] | 26 | pci { |
| 27 | compatible = "pci-x86"; |
| 28 | #address-cells = <3>; |
| 29 | #size-cells = <2>; |
| 30 | u-boot,dm-pre-reloc; |
| 31 | ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000 |
| 32 | 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 |
| 33 | 0x01000000 0x0 0x1000 0x1000 0 0xf000>; |
Simon Glass | 548fb87 | 2015-08-27 19:54:48 -0600 | [diff] [blame] | 34 | |
Simon Glass | f2b85ab | 2016-01-18 20:19:21 -0700 | [diff] [blame] | 35 | pch@1f,0 { |
| 36 | reg = <0x0000f800 0 0 0 0>; |
| 37 | compatible = "intel,pch9"; |
Bin Meng | 3ddc1c7 | 2016-02-01 01:40:47 -0800 | [diff] [blame] | 38 | #address-cells = <1>; |
| 39 | #size-cells = <1>; |
Simon Glass | f2b85ab | 2016-01-18 20:19:21 -0700 | [diff] [blame] | 40 | |
Bin Meng | 81aaa3d | 2016-01-27 00:56:34 -0800 | [diff] [blame] | 41 | spi: spi { |
Simon Glass | f2b85ab | 2016-01-18 20:19:21 -0700 | [diff] [blame] | 42 | #address-cells = <1>; |
| 43 | #size-cells = <0>; |
Bin Meng | 1f9eb59 | 2016-02-01 01:40:37 -0800 | [diff] [blame] | 44 | compatible = "intel,ich9-spi"; |
Simon Glass | f2b85ab | 2016-01-18 20:19:21 -0700 | [diff] [blame] | 45 | spi-flash@0 { |
| 46 | #size-cells = <1>; |
| 47 | #address-cells = <1>; |
| 48 | reg = <0>; |
| 49 | compatible = "winbond,w25q64", |
| 50 | "spi-flash"; |
| 51 | memory-map = <0xff800000 0x00800000>; |
| 52 | rw-mrc-cache { |
| 53 | label = "rw-mrc-cache"; |
| 54 | reg = <0x003e0000 0x00010000>; |
| 55 | }; |
| 56 | }; |
Simon Glass | 51e9dad | 2015-03-02 12:40:54 -0700 | [diff] [blame] | 57 | }; |
Bin Meng | 3ddc1c7 | 2016-02-01 01:40:47 -0800 | [diff] [blame] | 58 | |
| 59 | gpioa { |
| 60 | compatible = "intel,ich6-gpio"; |
| 61 | u-boot,dm-pre-reloc; |
| 62 | reg = <0 0x10>; |
| 63 | bank-name = "A"; |
| 64 | }; |
| 65 | |
| 66 | gpiob { |
| 67 | compatible = "intel,ich6-gpio"; |
| 68 | u-boot,dm-pre-reloc; |
| 69 | reg = <0x30 0x10>; |
| 70 | bank-name = "B"; |
| 71 | }; |
| 72 | |
| 73 | gpioc { |
| 74 | compatible = "intel,ich6-gpio"; |
| 75 | u-boot,dm-pre-reloc; |
| 76 | reg = <0x40 0x10>; |
| 77 | bank-name = "C"; |
| 78 | }; |
Simon Glass | 51e9dad | 2015-03-02 12:40:54 -0700 | [diff] [blame] | 79 | }; |
| 80 | }; |
| 81 | |
Simon Glass | 6e474ea | 2015-08-22 18:31:37 -0600 | [diff] [blame] | 82 | tpm { |
| 83 | reg = <0xfed40000 0x5000>; |
| 84 | compatible = "infineon,slb9635lpc"; |
| 85 | }; |
| 86 | |
Simon Glass | 51e9dad | 2015-03-02 12:40:54 -0700 | [diff] [blame] | 87 | }; |