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gerrit.devboardsforandroid.linaro.org
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platform
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external
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u-boot
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3c42c0f6734601540bd2be5e83ca12e05079222a
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arch
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riscv
/
cpu
d4ea649
riscv: Provide a mechanism to fix DT for reserved memory
by Atish Patra
· 4 years, 7 months ago
191636e
riscv: Introduce SPL_SMP Kconfig option for U-Boot SPL
by Bin Meng
· 4 years, 7 months ago
84dc9d2
riscv: Merge unnecessary SMP ifdefs in start.S
by Bin Meng
· 4 years, 7 months ago
ed1475e
riscv: qemu: Remove the simple-bus driver for the SoC node
by Bin Meng
· 4 years, 7 months ago
5988bb9
riscv: ax25: cache: Remove SPL_RISCV_MMODE config check
by Pragnesh Patel
· 4 years, 8 months ago
4043397
riscv: Remove unnecessary instruction
by Sean Anderson
· 4 years, 10 months ago
fd1f6e9
riscv: Add option to print registers on exception
by Sean Anderson
· 5 years ago
d9f1cee
riscv: Fix breakage caused by linker relaxation
by Sean Anderson
· 5 years ago
9413387
common: Move relocate_code() to init.h
by Simon Glass
· 5 years ago
90ae281
riscv: add option to wait for ack from secondary harts in smp functions
by Lukas Auer
· 5 years ago
444c464
riscv: Fix clear bss loop in the start-up code
by Rick Chen
· 5 years ago
8ba595b
riscv: ax25: cache: Add SPL_RISCV_MMODE for SPL
by Rick Chen
· 5 years ago
ca06444
riscv: ax25: add SPL support
by Rick Chen
· 5 years ago
67c4e9f
common: Move board_get_usable_ram_top() out of common.h
by Simon Glass
· 5 years ago
36bf446
common: Move enable/disable_interrupts out of common.h
by Simon Glass
· 5 years ago
1eb69ae
common: Move ARM cache operations out of common.h
by Simon Glass
· 5 years ago
9edefc2
common: Move some cache and MMU functions out of common.h
by Simon Glass
· 5 years ago
61ce84b
riscv: cache: use CCTL to flush d-cache
by Rick Chen
· 5 years ago
7045ed9
riscv: cache: Flush L2 cache before jump to linux
by Rick Chen
· 5 years ago
a8323d1
riscv: ax25: add imply v5l2 cache controller
by Rick Chen
· 5 years ago
f6cb427
riscv: update fix_rela_dyn
by Marcus Comstedt
· 5 years ago
c7e1eff
riscv: support SPL stack and global data relocation
by Lukas Auer
· 5 years ago
8c59f20
riscv: add SPL support
by Lukas Auer
· 5 years ago
fbfd92b
riscv: add run mode configuration for SPL
by Lukas Auer
· 5 years ago
4d2583d
riscv: Access CSRs using CSR numbers
by Bin Meng
· 5 years ago
1001502
CONFIG_SPL_SYS_[DI]CACHE_OFF: add
by Trevor Woerner
· 6 years ago
f9281b8
riscv: prior_stage_fdt_address should only be used when OF_PRIOR_STAGE is enabled
by Rick Chen
· 6 years ago
bdce389
riscv: Introduce CONFIG_XIP to support booting from flash
by Rick Chen
· 6 years ago
dda00ae
riscv: ax25: Andes specific cache shall only support in M-mode
by Rick Chen
· 6 years ago
8848474
riscv: ax25: Add platform-specific Kconfig options
by Rick Chen
· 6 years ago
8ac39e2
riscv: hang if relocation of secondary harts fails
by Lukas Auer
· 6 years ago
e043240
riscv: do not rely on hart ID passed by previous boot stage
by Lukas Auer
· 6 years ago
3dea63c
riscv: add support for multi-hart systems
by Lukas Auer
· 6 years ago
1446b26
riscv: save hart ID in register tp instead of s0
by Lukas Auer
· 6 years ago
2503ccc
riscv: delay initialization of caches and debug UART
by Lukas Auer
· 6 years ago
26f4fd1
riscv: generic: Ensure that U-Boot runs within 4GB for 64bit systems
by Anup Patel
· 6 years ago
fdff1f9
riscv: Rename cpu/qemu to cpu/generic
by Anup Patel
· 6 years ago
c905665
riscv: move the AX25-specific implementation of flush_dcache_all
by Lukas Auer
· 6 years ago
51ab457
riscv: Save boot hart id to the global data
by Bin Meng
· 6 years ago
10753ef
riscv: Return to previous privilege level after trap handling
by Bin Meng
· 6 years ago
496262c
riscv: Fix context restore before returning from trap handler
by Bin Meng
· 6 years ago
4b3f5ed
riscv: Move trap handler codes to mtrap.S
by Bin Meng
· 6 years ago
485e822
riscv: Do some basic architecture level cpu initialization
by Bin Meng
· 6 years ago
aef59e5
riscv: Update supports_extension() to use desc from cpu driver
by Bin Meng
· 6 years ago
3c276b2
riscv: Remove non-DM version of print_cpuinfo()
by Bin Meng
· 6 years ago
39cad5b
riscv: Probe cpus during boot
by Bin Meng
· 6 years ago
84304d4
riscv: qemu: Add platform-specific Kconfig options
by Bin Meng
· 6 years ago
44fe795
riscv: ax25: Hide the ax25-specific Kconfig option
by Bin Meng
· 6 years ago
27dc2c1
riscv: qemu: Create a simple-bus driver for the soc node
by Bin Meng
· 6 years ago
48cbf62
riscv: ax25-ae350: Pass dtb address to u-boot with a1 register
by Rick Chen
· 6 years ago
d2db2a8
riscv: Add kconfig option to run U-Boot in S-mode
by Anup Patel
· 6 years ago
52923c6
riscv: cache: Implement i/dcache [status, enable, disable]
by Rick Chen
· 6 years ago
5d8b2e7
riscv: save hart ID and device tree passed by prior boot stage
by Lukas Auer
· 6 years ago
31f9058
riscv: do not blindly modify the mstatus CSR
by Lukas Auer
· 6 years ago
8bfa231
riscv: remove unused labels in start.S
by Lukas Auer
· 6 years ago
c95cafd
Drop CONFIG_INIT_CRITICAL
by Bin Meng
· 6 years ago
2a23ac6
riscv: align mtvec on a 4-byte boundary
by Lukas Auer
· 6 years ago
c55309c
riscv: fix inconsistent use of spaces and tabs in start.S
by Lukas Auer
· 6 years ago
b984ddc
riscv: Move do_reset() to a common place
by Bin Meng
· 6 years ago
510e379
riscv: Add QEMU virt board support
by Bin Meng
· 6 years ago
b5369c5
riscv: Make start.S available for all targets
by Bin Meng
· 6 years ago
2fab2e9
riscv: Add a helper routine to print CPU information
by Bin Meng
· 6 years ago
3d60156
riscv: Fix coding style issues in the linker script
by Bin Meng
· 6 years ago
dfb828e
riscv: Move the linker script to the CPU root directory
by Bin Meng
· 6 years ago
122347f
riscv: Include bss subsections in linker script
by Alexander Graf
· 6 years ago
7e21fbc
efi_loader: Rename sections to allow for implicit data
by Alexander Graf
· 6 years ago
6f4dd62
riscv: cpu: nx25: Rename as ax25
by Rick Chen
· 6 years ago
6836adb
efi_loader: Enable RISC-V support
by Rick Chen
· 6 years ago
83d290c
SPDX: Convert all of our single license tags to Linux Kernel style
by Tom Rini
· 7 years ago
d58717e
riscv: ae250: Support DT provided by the board at runtime
by Rick Chen
· 7 years ago
e8e3959
riscv: cpu: Add nx25 to support RISC-V
by Rick Chen
· 7 years ago