1. 3943d2f ppc4xx: Improve DDR autodetect by Dirk Eibach · 16 years ago
  2. 6d0f6bc rename CFG_ macros to CONFIG_SYS by Jean-Christophe PLAGNIOL-VILLARD · 16 years ago
  3. 7bf5ecf ppc4xx: Fix SDRAM inititialization of multiple 405 based board ports by Stefan Roese · 16 years ago
  4. 9973e3c Change initdram() return type to phys_size_t by Becky Bruce · 16 years ago
  5. bbeff30 ppc4xx: Remove superfluous dram_init() call or replace it by initdram() by Stefan Roese · 16 years ago
  6. c821b5f ppc4xx: Enable Primordial Stack for 40x and Unify ECC Handling by Grant Erickson · 16 years ago
  7. 779e975 ppc4xx: Add initial Zeus (PPC405EP) board support by Stefan Roese · 17 years ago
  8. d4024bb ppc4xx: Add support for AMCC 405EP Taihu board by John Otken · 17 years ago
  9. 5fb692c [PATCH] Add support for AMCC Taishan PPC440GX eval board by Stefan Roese · 18 years ago
  10. f07ae7a [PATCH] 44x: Fix problem with DDR controller setup (refresh rate) by Stefan Roese · 18 years ago
  11. 899620c Add initial support for the ALPR board from Prodrive by Stefan Roese · 18 years ago
  12. a2c95a7 PPC440 DDR setup: Set SDRAM0_CFG0[PMU]=0 for best performance by Stefan Roese · 18 years ago
  13. cf48eb9 Some code cleanup by Wolfgang Denk · 19 years ago
  14. 62534be Updates to common PPC4xx onboard (DDR)SDRAM init code (405 and 440) by Stefan Roese · 19 years ago
  15. 5568e61 Add support for Prodrive P3P440 board: by Stefan Roese · 19 years ago
  16. de8d5a3 cpu/ppc4xx/sdram.c rewritten now using get_ram_size() by stroese · 20 years ago
  17. 342f551 Disable memory controller before setting first values. by stroese · 21 years ago
  18. 8bde7f7 * Code cleanup: by wdenk · 21 years ago
  19. e5ad56b Cleanup: remove trailing white space by wdenk · 22 years ago
  20. 6177445 Added 4MByte and 128MByte onboard SDRAM by stroese · 22 years ago
  21. c609719 Initial revision by wdenk · 22 years ago