1. a7787b7 fsl/sleep: updated the deep sleep framework for QorIQ platforms by Tang Yuantian · 10 years ago
  2. bb57832 driver/ddr/fsl: Fix tXP and tCKE by York Sun · 10 years ago
  3. 1d71efb driver/ddr: Restruct driver to allow standalone memory space by York Sun · 10 years ago
  4. ef87cab driver/ddr/fsl: Add support of overriding chip select write leveling by York Sun · 10 years ago
  5. aade200 mpc85xx/t104x: Add deep sleep framework support by Tang Yuantian · 10 years ago
  6. 34e026f driver/ddr/fsl: Add DDR4 support to Freescale DDR driver by York Sun · 10 years ago
  7. 6b1e125 driver/ddr: Add 256 byte interleaving support by York Sun · 11 years ago
  8. 5614e71 Driver/DDR: Moving Freescale DDR driver to a common driver by York Sun · 11 years ago[Renamed (98%) from arch/powerpc/include/asm/fsl_ddr_sdram.h]
  9. 0dd38a3 powerpc: Fix CamelCase warnings in DDR related code by Priyanka Jain · 11 years ago
  10. c63e137 powerpc/mpc8xxx: Add memory reset control by York Sun · 11 years ago
  11. b61e061 powerpc/mpc8xxx: Add x4 DDR device support by York Sun · 11 years ago
  12. f31cfd1 powerpc/mpc8xxx: Fix DDR initialization waiting for D_INIT by York Sun · 12 years ago
  13. 123922b powerpc/mpc8xxx: Fix DDR driver handling quad-rank DIMMs and address calculation by York Sun · 12 years ago
  14. 57495e4 powerpc/mpc8xxx: Update DDR registers by York Sun · 12 years ago
  15. a4c6650 powerpc/mpc8xxx: Enable 3-way and 4-way DDR interleaving by York Sun · 12 years ago
  16. 9c6b47d p1014rdb: set ddr bus width properly depending on SVR by Matthew McClintock · 12 years ago
  17. 4e57382 powerpc/mpc8xxx: Add DDR2 to unified DDR driver by York Sun · 13 years ago
  18. cae7c1b powerpc/mpc8xxx: Fix DDR code for empty first DIMM slot and enable DQS_en by York Sun · 13 years ago
  19. 23f9670 powerpc/mpc8xxx: Allow override DDR read-to-write turnaround time by York Sun · 13 years ago
  20. 51d498f powerpc/mpc8xxx: Add 16-bit support for DDR3 by York Sun · 13 years ago
  21. c1fc2d4 powerpc/85xx: don't init SDRAM when CONFIG_SYS_RAMBOOT by Zhao Chenhui · 14 years ago
  22. 0b3b176 fsl_ddr: Adds 16 bit DDR Data width option by Poonam Aggrwal · 14 years ago
  23. f0f8994 powerpc/85xx: Declare fsl_ddr_set_memctl_regs in <asm/fsl_ddr_sdram.h> by Kumar Gala · 14 years ago
  24. 9167191 powerpc/mpc85xx: implement workaround for errata DDR111 and DDR134 by York Sun · 14 years ago
  25. 6b06d7d corenet_ds: Extend board specific parameters by York Sun · 14 years ago
  26. fa8d23c mpc85xx: Implement workaround for erratum DDR-A003 by York Sun · 14 years ago
  27. e1fd16b mpc85xx: Enable unique mode registers and dynamic ODT for DDR3 by York Sun · 14 years ago
  28. d2a9568 mpc85xx: Adding more registers and options by York Sun · 14 years ago
  29. 3dbd5d7 powerpc/8xxx: Move fsl_is_spd() into generic 8xxx ddr code by Kumar Gala · 14 years ago
  30. 38dba0c mpc85xx boards: initdram() cleanup/bugfix by Becky Bruce · 14 years ago
  31. 28a9667 Adding fixed sdram setting for cornet_ds board by York Sun · 14 years ago
  32. 7fd101c powerpc/8xxx: Enabled address hashing for 85xx by york · 14 years ago
  33. 5800e7a powerpc/8xxx: Enable quad-rank DIMMs. by york · 14 years ago
  34. f8d05e5 fsl-ddr: add the macro for Rtt_Nom definition by Dave Liu · 15 years ago
  35. a47a12b Move arch/ppc to arch/powerpc by Stefan Roese · 14 years ago[Renamed from arch/ppc/include/asm/fsl_ddr_sdram.h]
  36. 819833a Move architecture-specific includes to arch/$ARCH/include/asm by Peter Tyser · 14 years ago[Renamed from include/asm-ppc/fsl_ddr_sdram.h]
  37. 1aa3d08 fsl-ddr: add override for the Rtt_Wr by Dave Liu · 15 years ago
  38. bdc9f7b fsl-ddr: add the override for write leveling by Dave Liu · 15 years ago
  39. 2abbd31 ppc/8xxx: Remove ddr_pd_cntl register since it doesn't exist by Kumar Gala · 15 years ago
  40. c360cea fsl-ddr: add the DDR3 SPD infrastructure by Dave Liu · 16 years ago
  41. e1be0d2 32bit BUg fix for DDR2 on 8572 by Poonam_Aggrwal-b10812 · 16 years ago
  42. 22cca7e fsl-ddr: make the self refresh idle threshold configurable by Dave Liu · 16 years ago
  43. 22ff3d0 fsl-ddr: clean up the ddr code for DDR3 controller by Dave Liu · 16 years ago
  44. dbbbb3a Make DDR interleaving mode work correctly by Haiying Wang · 16 years ago
  45. 58e5e9a FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. by Kumar Gala · 16 years ago