- b68bf22 configs: andes: add vender prefix for target name by Randolph · 1 year, 2 months ago
- e637e45 riscv: enable CONFIG_DEBUG_UART by default by Heinrich Schuchardt · 1 year, 2 months ago
- 16dbe3d riscv: set fdtfile on VisionFive 2 by Heinrich Schuchardt · 1 year, 3 months ago
- d365f66 riscv: Kconfig: Add SPL_ZERO_MEM_BEFORE_USE by Shengyu Qu · 1 year, 4 months ago
- 5f3a7fd riscv: t-head: licheepi4a: initial support added by Yixun Lan · 1 year, 5 months ago
- 9675d92 riscv: Rename SiFive CLINT to RISC-V ALINT by Bin Meng · 1 year, 5 months ago
- 7f1a30f riscv: clint: Update the sifive clint ipi driver to support aclint by Bin Meng · 1 year, 5 months ago
- 331ad93 board: starfive: Add TARGET_STARFIVE_VISIONFIVE2 to Kconfig by Yanhong Wang · 1 year, 8 months ago
- 8900e2b riscv: Rename Andes cpu and board names by Leo Yu-Chi Liang · 1 year, 10 months ago
- 5c89467 riscv: clarify meaning of CONFIG_SBI_V02 by Heinrich Schuchardt · 2 years, 1 month ago
- a5dfa3b riscv: Rename Andes PLIC to PLICSW by Yu Chien Peter Lin · 2 years, 1 month ago
- e67f34f riscv: support building double-float modules by Heinrich Schuchardt · 2 years, 2 months ago
- e0465f8 riscv: Introduce AVAILABLE_HARTS by Rick Chen · 2 years, 2 months ago
- c2bdf02 spl: introduce SPL_XIP to config by Nikita Shubin · 2 years, 3 months ago
- 776e8ac riscv: alloc space exhausted by Heinrich Schuchardt · 2 years, 8 months ago
- 6674eda Merge tag 'v2021.10-rc4' into next by Tom Rini · 3 years, 2 months ago
- 213ed17 riscv: lib: implement enable_caches for sifive cache by Zong Li · 3 years, 3 months ago
- b4c2c15 Kconfig: Remove all default n/no options by Michal Simek · 3 years, 3 months ago
- ab92b38 Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig by Tom Rini · 3 years, 3 months ago
- 8a44fe6 board: riscv: add openpiton-riscv64 SoC support by Tianrui Wei · 3 years, 5 months ago
- 70415e1 board: sifive: add HiFive Unmatched board support by Green Wan · 3 years, 6 months ago
- a74e9d8 riscv: cpu: fu740: Add support for cpu fu740 by Green Wan · 3 years, 6 months ago
- 8941927 riscv: Group assembly optimized implementation of memory routines into a submenu by Bin Meng · 3 years, 7 months ago
- a6d7e8c riscv: Split SiFive CLINT support between SPL and U-Boot proper by Bin Meng · 3 years, 7 months ago
- 8f0dc4c riscv: assembler versions of memcpy, memmove, memset by Heinrich Schuchardt · 3 years, 8 months ago
- ae2d950 riscv: sifive: Rename fu540 board to unleashed by Bin Meng · 3 years, 9 months ago
- 5af3574 riscv: Add DMA 64-bit address support by Padmarao Begari · 3 years, 11 months ago
- 79b135f riscv: Move Andes PLMT driver to drivers/timer by Sean Anderson · 4 years, 1 month ago
- 32cef69 riscv: Only enable OF_BOARD_FIXUP for S-Mode by Sean Anderson · 4 years, 3 months ago
- e5ca9a7 riscv: Rework Sifive CLINT as UCLASS_TIMER driver by Sean Anderson · 4 years, 2 months ago
- e86463f riscv: Rework Andes PLMT as a UCLASS_TIMER driver by Sean Anderson · 4 years, 2 months ago
- c33efaf riscv: Rework riscv timer driver to only support S-mode by Sean Anderson · 4 years, 2 months ago
- 6e7d7aa Merge branch 'next' by Tom Rini · 4 years, 5 months ago
- 1c17e55 riscv: Enable CONFIG_OF_BOARD_FIXUP by default for OF_SEPARATE by Bin Meng · 4 years, 5 months ago
- a7c81fc riscv: Add Sipeed Maix support by Sean Anderson · 4 years, 5 months ago
- b8bc120 riscv: Add option to support RISC-V privileged spec 1.9 by Sean Anderson · 4 years, 5 months ago
- 7c45fc9 riscv: cpu: fu540: Add support for cpu fu540 by Pragnesh Patel · 4 years, 6 months ago
- fa16ec2 riscv: Make SBI v0.2 the default SBI version by Bin Meng · 4 years, 8 months ago
- ff0fa6c riscv: Add Kconfig option for SBI v0.2 by Bin Meng · 4 years, 8 months ago
- 6fa022e riscv: Add SMP Kconfig option dependency for U-Boot proper by Bin Meng · 4 years, 8 months ago
- 191636e riscv: Introduce SPL_SMP Kconfig option for U-Boot SPL by Bin Meng · 4 years, 8 months ago
- 2b18b89 Merge branch 'next' of git://git.denx.de/u-boot-usb into next by Tom Rini · 4 years, 8 months ago
- 1b3c8d6 riscv: Introduce a new config for SBI v0.1 by Bin Meng · 4 years, 9 months ago
- f58fc34 riscv: Add basic support for SBI v0.2 by Bin Meng · 4 years, 9 months ago
- d91cf00 Kconfig: Remove redundant variable sets by Tom Rini · 4 years, 9 months ago
- fd1f6e9 riscv: Add option to print registers on exception by Sean Anderson · 5 years ago
- 6b20dc1 riscv: increase stack size to avoid a stack overflow during distro boot by Lukas Auer · 5 years ago
- 8c59f20 riscv: add SPL support by Lukas Auer · 5 years ago
- fbfd92b riscv: add run mode configuration for SPL by Lukas Auer · 5 years ago
- 3949482 riscv: Add Microchip MPFS Icicle board support by Padmarao Begari · 6 years ago
- 1001502 CONFIG_SPL_SYS_[DI]CACHE_OFF: add by Trevor Woerner · 6 years ago
- a0aba8a CONFIG_SYS_[DI]CACHE_OFF: convert to Kconfig by Trevor Woerner · 6 years ago
- bdce389 riscv: Introduce CONFIG_XIP to support booting from flash by Rick Chen · 6 years ago
- a1f2487 riscv: Add a SYSCON driver for Andestech's PLMT by Rick Chen · 6 years ago
- 0d38946 riscv: Add a SYSCON driver for Andestech's PLIC by Rick Chen · 6 years ago
- 3dea63c riscv: add support for multi-hart systems by Lukas Auer · 6 years ago
- f152feb riscv: implement IPI platform functions using SBI by Lukas Auer · 6 years ago
- fa33f08 riscv: add infrastructure for calling functions on other harts by Lukas Auer · 6 years ago
- 3fda026 riscv: Add SiFive FU540 board support by Anup Patel · 6 years ago
- fdff1f9 riscv: Rename cpu/qemu to cpu/generic by Anup Patel · 6 years ago
- 92b64fe riscv: Enlarge the default SYS_MALLOC_F_LEN by Bin Meng · 6 years ago
- 84304d4 riscv: qemu: Add platform-specific Kconfig options by Bin Meng · 6 years ago
- 511107d riscv: Implement riscv_get_time() API using rdtime instruction by Anup Patel · 6 years ago
- 644a3cd riscv: Add a SYSCON driver for SiFive's Core Local Interruptor by Bin Meng · 6 years ago
- 3cfc825 riscv: Introduce a Kconfig option for machine mode by Anup Patel · 6 years ago
- 8176ea4 riscv: add Kconfig entries for the code model by Lukas Auer · 6 years ago
- d2db2a8 riscv: Add kconfig option to run U-Boot in S-mode by Anup Patel · 6 years ago
- 52923c6 riscv: cache: Implement i/dcache [status, enable, disable] by Rick Chen · 6 years ago
- d57ffa6 riscv: add Kconfig entries for the C and A ISA extensions by Lukas Auer · 6 years ago
- 7115856 riscv: select CONFIG_PHYS_64BIT on RV64I systems by Lukas Auer · 6 years ago
- 862e2e7 riscv: rename CPU_RISCV_32/64 to match architecture names ARCH_RV32I/64I by Lukas Auer · 6 years ago
- 510e379 riscv: Add QEMU virt board support by Bin Meng · 6 years ago
- 117a433 riscv: kconfig: Normalize architecture name spelling by Bin Meng · 6 years ago
- 6f4dd62 riscv: cpu: nx25: Rename as ax25 by Rick Chen · 7 years ago
- f94c44e riscv: Add Kconfig to support RISC-V by Rick Chen · 7 years ago