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arch
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riscv
4d2583d
riscv: Access CSRs using CSR numbers
by Bin Meng
· 5 years ago
268753f
riscv: Sync csr.h with Linux kernel v5.2
by Bin Meng
· 5 years ago
e7dcf56
env: Drop environment.h header file where not needed
by Simon Glass
· 5 years ago
a35c33c
efi_loader: use predefined constants in crt0_*_efi.S
by Heinrich Schuchardt
· 5 years ago
3949482
riscv: Add Microchip MPFS Icicle board support
by Padmarao Begari
· 5 years ago
1001502
CONFIG_SPL_SYS_[DI]CACHE_OFF: add
by Trevor Woerner
· 6 years ago
a0aba8a
CONFIG_SYS_[DI]CACHE_OFF: convert to Kconfig
by Trevor Woerner
· 6 years ago
3cedc97
RISCV: image: Add booti support
by Atish Patra
· 6 years ago
f9281b8
riscv: prior_stage_fdt_address should only be used when OF_PRIOR_STAGE is enabled
by Rick Chen
· 6 years ago
bdce389
riscv: Introduce CONFIG_XIP to support booting from flash
by Rick Chen
· 6 years ago
ffd4c7c
dts: switch spi-flash to jedec, spi-nor compatible
by Neil Armstrong
· 6 years ago
48b90d9
riscv: dts: fix CONFIG_DEFAULT_DEVICE_TREE failure
by Rick Chen
· 6 years ago
a1ce531
riscv: dts: ae350 support SMP
by Rick Chen
· 6 years ago
dda00ae
riscv: ax25: Andes specific cache shall only support in M-mode
by Rick Chen
· 6 years ago
8848474
riscv: ax25: Add platform-specific Kconfig options
by Rick Chen
· 6 years ago
a1f2487
riscv: Add a SYSCON driver for Andestech's PLMT
by Rick Chen
· 6 years ago
0d38946
riscv: Add a SYSCON driver for Andestech's PLIC
by Rick Chen
· 6 years ago
8ac39e2
riscv: hang if relocation of secondary harts fails
by Lukas Auer
· 6 years ago
e043240
riscv: do not rely on hart ID passed by previous boot stage
by Lukas Auer
· 6 years ago
f28ad25
riscv: boot images passed to bootm on all harts
by Lukas Auer
· 6 years ago
3dea63c
riscv: add support for multi-hart systems
by Lukas Auer
· 6 years ago
1446b26
riscv: save hart ID in register tp instead of s0
by Lukas Auer
· 6 years ago
2503ccc
riscv: delay initialization of caches and debug UART
by Lukas Auer
· 6 years ago
f152feb
riscv: implement IPI platform functions using SBI
by Lukas Auer
· 6 years ago
34a0626
riscv: import the supervisor binary interface header file
by Lukas Auer
· 6 years ago
fa33f08
riscv: add infrastructure for calling functions on other harts
by Lukas Auer
· 6 years ago
98a66ff
riscv: Enable CONFIG_SYS_BOOT_RAMDISK_HIGH for using initrd
by Anup Patel
· 6 years ago
3fda026
riscv: Add SiFive FU540 board support
by Anup Patel
· 6 years ago
26f4fd1
riscv: generic: Ensure that U-Boot runs within 4GB for 64bit systems
by Anup Patel
· 6 years ago
1fa625b
riscv: Add place-holder asm/arch/clk.h for driver compilation
by Anup Patel
· 6 years ago
70b8562
riscv: Add asm/dma-mapping.h for DMA mappings
by Anup Patel
· 6 years ago
fdff1f9
riscv: Rename cpu/qemu to cpu/generic
by Anup Patel
· 6 years ago
91882c4
riscv: qemu: define standalone load address
by Lukas Auer
· 6 years ago
3c37278
riscv: remove RISC-V standalone linker script
by Lukas Auer
· 6 years ago
f74c416
riscv: use invalidate/flush_*cache_range functions in cache.c
by Lukas Auer
· 6 years ago
c905665
riscv: move the AX25-specific implementation of flush_dcache_all
by Lukas Auer
· 6 years ago
0c85c11
riscv: clarify error message on undefined exceptions
by Lukas Auer
· 6 years ago
08337cd
riscv: bootm: Support booting VxWorks
by Bin Meng
· 6 years ago
dcad9b8
riscv: Remove ae350.dts
by Bin Meng
· 6 years ago
3c85099
riscv: bootm: Change to use boot_hart from global data
by Bin Meng
· 6 years ago
51ab457
riscv: Save boot hart id to the global data
by Bin Meng
· 6 years ago
7f5d35a
riscv: Adjust the _exit_trap() position to come before handle_trap()
by Bin Meng
· 6 years ago
10753ef
riscv: Return to previous privilege level after trap handling
by Bin Meng
· 6 years ago
496262c
riscv: Fix context restore before returning from trap handler
by Bin Meng
· 6 years ago
4b3f5ed
riscv: Move trap handler codes to mtrap.S
by Bin Meng
· 6 years ago
485e822
riscv: Do some basic architecture level cpu initialization
by Bin Meng
· 6 years ago
57fe5c6
riscv: Add indirect stringification to csr_xxx ops
by Bin Meng
· 6 years ago
aef59e5
riscv: Update supports_extension() to use desc from cpu driver
by Bin Meng
· 6 years ago
3967156
riscv: Add exception codes for xcause register
by Bin Meng
· 6 years ago
ea53f1c
riscv: Add CSR numbers
by Bin Meng
· 6 years ago
3c276b2
riscv: Remove non-DM version of print_cpuinfo()
by Bin Meng
· 6 years ago
39cad5b
riscv: Probe cpus during boot
by Bin Meng
· 6 years ago
92b64fe
riscv: Enlarge the default SYS_MALLOC_F_LEN
by Bin Meng
· 6 years ago
84304d4
riscv: qemu: Add platform-specific Kconfig options
by Bin Meng
· 6 years ago
511107d
riscv: Implement riscv_get_time() API using rdtime instruction
by Anup Patel
· 6 years ago
644a3cd
riscv: Add a SYSCON driver for SiFive's Core Local Interruptor
by Bin Meng
· 6 years ago
3cfc825
riscv: Introduce a Kconfig option for machine mode
by Anup Patel
· 6 years ago
44fe795
riscv: ax25: Hide the ax25-specific Kconfig option
by Bin Meng
· 6 years ago
27dc2c1
riscv: qemu: Create a simple-bus driver for the soc node
by Bin Meng
· 6 years ago
8176ea4
riscv: add Kconfig entries for the code model
by Lukas Auer
· 6 years ago
48cbf62
riscv: ax25-ae350: Pass dtb address to u-boot with a1 register
by Rick Chen
· 6 years ago
d2db2a8
riscv: Add kconfig option to run U-Boot in S-mode
by Anup Patel
· 6 years ago
a33a4ef
riscv: efi: Generate Microsoft PE format compliant images
by Bin Meng
· 6 years ago
52923c6
riscv: cache: Implement i/dcache [status, enable, disable]
by Rick Chen
· 6 years ago
bae2d72
riscv: dts: Add ae350_32.dts for RV32I
by Rick Chen
· 6 years ago
7424e95
riscv: dts: Sync to Linux Kernel ae350 dts.
by Rick Chen
· 6 years ago
c3b1a99
riscv: align bootm implementation with that of other architectures
by Lukas Auer
· 6 years ago
5d8b2e7
riscv: save hart ID and device tree passed by prior boot stage
by Lukas Auer
· 6 years ago
31f9058
riscv: do not blindly modify the mstatus CSR
by Lukas Auer
· 6 years ago
8bfa231
riscv: remove unused labels in start.S
by Lukas Auer
· 6 years ago
c95cafd
Drop CONFIG_INIT_CRITICAL
by Bin Meng
· 6 years ago
2a23ac6
riscv: align mtvec on a 4-byte boundary
by Lukas Auer
· 6 years ago
c55309c
riscv: fix inconsistent use of spaces and tabs in start.S
by Lukas Auer
· 6 years ago
62a09ad
riscv: implement the invalidate_icache_* functions
by Lukas Auer
· 6 years ago
c93a1c8
riscv: hang on unhandled exceptions
by Lukas Auer
· 6 years ago
e8b522b
riscv: treat undefined exception codes as reserved
by Lukas Auer
· 6 years ago
5a44173
riscv: complete the list of exception codes
by Lukas Auer
· 6 years ago
f105d2e
riscv: do not reimplement generic io functions
by Lukas Auer
· 6 years ago
fc8c76f
riscv: make use of the barrier functions from Linux
by Lukas Auer
· 6 years ago
b2c860c
riscv: fix use of incorrectly sized variables
by Lukas Auer
· 6 years ago
776e633
riscv: enable -fdata-sections
by Lukas Auer
· 6 years ago
0c07484
riscv: set -march and -mabi based on the Kconfig configuration
by Lukas Auer
· 6 years ago
d57ffa6
riscv: add Kconfig entries for the C and A ISA extensions
by Lukas Auer
· 6 years ago
7115856
riscv: select CONFIG_PHYS_64BIT on RV64I systems
by Lukas Auer
· 6 years ago
862e2e7
riscv: rename CPU_RISCV_32/64 to match architecture names ARCH_RV32I/64I
by Lukas Auer
· 6 years ago
5c8fd32
Use _AC and UL macros from linux/const.h
by Baruch Siach
· 6 years ago
1d3b97c
Kbuild: add LDFLAGS_STANDALONE
by Daniel Schwierzeck
· 6 years ago
b1893a9
riscv: bootm: Add dm_remove_devices_flags() call to do_bootm_linux()
by Bin Meng
· 6 years ago
5845f66
riscv: allow native compilation
by Heinrich Schuchardt
· 6 years ago
9d9b3dc
riscv: cosmetic: Reword do_reset() printf message.
by Rick Chen
· 6 years ago
b984ddc
riscv: Move do_reset() to a common place
by Bin Meng
· 6 years ago
510e379
riscv: Add QEMU virt board support
by Bin Meng
· 6 years ago
4694c93
riscv: ae350: Clean up mixed tabs and spaces in the dts
by Bin Meng
· 6 years ago
b5369c5
riscv: Make start.S available for all targets
by Bin Meng
· 6 years ago
ed49ba4
riscv: bootm: Pass mhartid CSR value to kernel
by Bin Meng
· 6 years ago
e5ea1e5
riscv: Remove CSR read/write defines in encoding.h
by Bin Meng
· 6 years ago
2fab2e9
riscv: Add a helper routine to print CPU information
by Bin Meng
· 6 years ago
ce7a8e0
riscv: Explicitly pass -march and -mabi to the compiler
by Bin Meng
· 6 years ago
3d60156
riscv: Fix coding style issues in the linker script
by Bin Meng
· 6 years ago
dfb828e
riscv: Move the linker script to the CPU root directory
by Bin Meng
· 6 years ago
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