1. 1001502 CONFIG_SPL_SYS_[DI]CACHE_OFF: add by Trevor Woerner · 6 years ago
  2. f9281b8 riscv: prior_stage_fdt_address should only be used when OF_PRIOR_STAGE is enabled by Rick Chen · 6 years ago
  3. bdce389 riscv: Introduce CONFIG_XIP to support booting from flash by Rick Chen · 6 years ago
  4. dda00ae riscv: ax25: Andes specific cache shall only support in M-mode by Rick Chen · 6 years ago
  5. 8848474 riscv: ax25: Add platform-specific Kconfig options by Rick Chen · 6 years ago
  6. 8ac39e2 riscv: hang if relocation of secondary harts fails by Lukas Auer · 6 years ago
  7. e043240 riscv: do not rely on hart ID passed by previous boot stage by Lukas Auer · 6 years ago
  8. 3dea63c riscv: add support for multi-hart systems by Lukas Auer · 6 years ago
  9. 1446b26 riscv: save hart ID in register tp instead of s0 by Lukas Auer · 6 years ago
  10. 2503ccc riscv: delay initialization of caches and debug UART by Lukas Auer · 6 years ago
  11. 26f4fd1 riscv: generic: Ensure that U-Boot runs within 4GB for 64bit systems by Anup Patel · 6 years ago
  12. fdff1f9 riscv: Rename cpu/qemu to cpu/generic by Anup Patel · 6 years ago
  13. c905665 riscv: move the AX25-specific implementation of flush_dcache_all by Lukas Auer · 6 years ago
  14. 51ab457 riscv: Save boot hart id to the global data by Bin Meng · 6 years ago
  15. 10753ef riscv: Return to previous privilege level after trap handling by Bin Meng · 6 years ago
  16. 496262c riscv: Fix context restore before returning from trap handler by Bin Meng · 6 years ago
  17. 4b3f5ed riscv: Move trap handler codes to mtrap.S by Bin Meng · 6 years ago
  18. 485e822 riscv: Do some basic architecture level cpu initialization by Bin Meng · 6 years ago
  19. aef59e5 riscv: Update supports_extension() to use desc from cpu driver by Bin Meng · 6 years ago
  20. 3c276b2 riscv: Remove non-DM version of print_cpuinfo() by Bin Meng · 6 years ago
  21. 39cad5b riscv: Probe cpus during boot by Bin Meng · 6 years ago
  22. 84304d4 riscv: qemu: Add platform-specific Kconfig options by Bin Meng · 6 years ago
  23. 44fe795 riscv: ax25: Hide the ax25-specific Kconfig option by Bin Meng · 6 years ago
  24. 27dc2c1 riscv: qemu: Create a simple-bus driver for the soc node by Bin Meng · 6 years ago
  25. 48cbf62 riscv: ax25-ae350: Pass dtb address to u-boot with a1 register by Rick Chen · 6 years ago
  26. d2db2a8 riscv: Add kconfig option to run U-Boot in S-mode by Anup Patel · 6 years ago
  27. 52923c6 riscv: cache: Implement i/dcache [status, enable, disable] by Rick Chen · 6 years ago
  28. 5d8b2e7 riscv: save hart ID and device tree passed by prior boot stage by Lukas Auer · 6 years ago
  29. 31f9058 riscv: do not blindly modify the mstatus CSR by Lukas Auer · 6 years ago
  30. 8bfa231 riscv: remove unused labels in start.S by Lukas Auer · 6 years ago
  31. c95cafd Drop CONFIG_INIT_CRITICAL by Bin Meng · 6 years ago
  32. 2a23ac6 riscv: align mtvec on a 4-byte boundary by Lukas Auer · 6 years ago
  33. c55309c riscv: fix inconsistent use of spaces and tabs in start.S by Lukas Auer · 6 years ago
  34. b984ddc riscv: Move do_reset() to a common place by Bin Meng · 6 years ago
  35. 510e379 riscv: Add QEMU virt board support by Bin Meng · 6 years ago
  36. b5369c5 riscv: Make start.S available for all targets by Bin Meng · 6 years ago
  37. 2fab2e9 riscv: Add a helper routine to print CPU information by Bin Meng · 6 years ago
  38. 3d60156 riscv: Fix coding style issues in the linker script by Bin Meng · 6 years ago
  39. dfb828e riscv: Move the linker script to the CPU root directory by Bin Meng · 6 years ago
  40. 122347f riscv: Include bss subsections in linker script by Alexander Graf · 6 years ago
  41. 7e21fbc efi_loader: Rename sections to allow for implicit data by Alexander Graf · 6 years ago
  42. 6f4dd62 riscv: cpu: nx25: Rename as ax25 by Rick Chen · 6 years ago
  43. 6836adb efi_loader: Enable RISC-V support by Rick Chen · 6 years ago
  44. 83d290c SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · 7 years ago
  45. d58717e riscv: ae250: Support DT provided by the board at runtime by Rick Chen · 7 years ago
  46. e8e3959 riscv: cpu: Add nx25 to support RISC-V by Rick Chen · 7 years ago