1. ffd06e0 powerpc/mpc85xx: Rewrite spin table to comply with ePAPR v1.1 by York Sun · 12 years ago
  2. 3f0997b powerpc/mpc85xx: Remove R6 from spin table by York Sun · 12 years ago
  3. 6d2b9da powerpc/mpc85xx: Enable L2 at the beginning of U-boot for E6500 by York Sun · 12 years ago
  4. 0c7e65f powerpc/mpc85xx: fix Unicode characters in release.S by Timur Tabi · 12 years ago
  5. 709389b powerpc/mpc8xxx: fix core id for multicore booting by York Sun · 12 years ago
  6. 33eee33 powerpc/fsl-corenet: work around erratum A004510 by Scott Wood · 12 years ago
  7. 57125f2 powerpc/mpc85xx: Make NMG_CPU_A011 workaround conditional by York Sun · 12 years ago
  8. feae342 powerpc/mpc85xx: Fix Handling the lack of L2 cache on P2040/P2040E by York Sun · 13 years ago
  9. 5e23ab0 powerpc/mpc85xx: Workaround for erratum CPU_A011 by York Sun · 13 years ago
  10. 1e9ea85 powerpc/P4080: Check SVR for CPU22 workaround by York Sun · 13 years ago
  11. 43f082b powerpc/85xx: Add workaround for erratum CPU-A003999 by Kumar Gala · 13 years ago
  12. acf3f8d powerpc/85xx: Handle the lack of L2 cache on P2040/P2040E by Kumar Gala · 13 years ago
  13. 25ddd1f Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated value by Wolfgang Denk · 14 years ago
  14. fd3c9be powerpc/p4080: Add workaround for erratum CPU22 by Kumar Gala · 15 years ago
  15. a47a12b Move arch/ppc to arch/powerpc by Stefan Roese · 15 years ago[Renamed from arch/ppc/cpu/mpc85xx/release.S]
  16. 8d1f268 ppc: Move cpu/$CPU to arch/ppc/cpu/$CPU by Peter Tyser · 15 years ago[Renamed from cpu/mpc85xx/release.S]
  17. ff8473e 85xx: Set HID1[mbdd] on e500v2 rev5.0 or greater by Sandeep Gopalpet · 15 years ago
  18. 69bcf5b 85xx: Add defines for BUCSR bits to make code more readable by Kumar Gala · 15 years ago
  19. 33f57bd 85xx: Fix enabling of L1 cache parity on secondary cores by Kumar Gala · 15 years ago
  20. abc76eb ppc/85xx: Map boot page guarded for MP boot by Kumar Gala · 15 years ago
  21. 82fd1f8 85xx: Add support for e500mc cache stashing by Kumar Gala · 16 years ago
  22. ff882295 ppc/85xx: Fix misc L2 cache enabling bug by Dave Liu · 15 years ago
  23. 5ccd29c 85xx: MP Boot Page Translation update by Peter Tyser · 15 years ago
  24. 25bacf7 ppc/85xx: Fix enabling of L2 cache by Kumar Gala · 15 years ago
  25. 26f4cdba 85xx: Add support for setting IVORs to fixed offset defaults by Kumar Gala · 15 years ago
  26. 0e87098 8xxx: Removed CONFIG_NUM_CPUS from 85xx/86xx by Poonam Aggrwal · 15 years ago
  27. 1b3e404 85xx: Add support for additional e500mc features by Kumar Gala · 16 years ago
  28. 181a365 Set IVPR to kenrel entry point in second core boot page by Haiying Wang · 16 years ago
  29. 0f060c3 85xx: Add basic e500mc core support by Kumar Gala · 16 years ago
  30. e0ff3d3 85xx: Ensure timebase is zero on secondary cores by Kumar Gala · 16 years ago
  31. 902ca09 85xx: Rename CONFIG_NR_CPUS to CONFIG_NUM_CPUS by Kumar Gala · 16 years ago
  32. cf6cc01 85xx: Additional fixes and cleanup of MP code by Kumar Gala · 17 years ago
  33. 79679d8 85xx: Update multicore boot mechanism to ePAPR v0.81 spec by Kumar Gala · 17 years ago
  34. ec2b74f 85xx: Added support for multicore boot mechanism by Kumar Gala · 17 years ago