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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Simon Glass1938f4a2013-03-11 06:49:53 +00002/*
3 * Copyright (c) 2011 The Chromium OS Authors.
4 * (C) Copyright 2002-2006
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * (C) Copyright 2002
8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
9 * Marius Groeger <mgroeger@sysgo.de>
Simon Glass1938f4a2013-03-11 06:49:53 +000010 */
11
Tom Rini03de3052024-05-20 13:35:03 -060012#include <config.h>
Simon Glassf0293d32018-11-15 18:43:52 -070013#include <bloblist.h>
Simon Glass52f24232020-05-10 11:40:00 -060014#include <bootstage.h>
Simon Glassd96c2602019-12-28 10:44:58 -070015#include <clock_legacy.h>
Simon Glass24b852a2015-11-08 23:47:45 -070016#include <console.h>
Mario Six5d6c61a2018-08-06 10:23:41 +020017#include <cpu.h>
Simon Glass30c7c432019-11-14 12:57:34 -070018#include <cpu_func.h>
Stefan Roese70545642022-09-02 13:57:50 +020019#include <cyclic.h>
Simon Glass4e4bf942022-07-31 12:28:48 -060020#include <display_options.h>
Simon Glassab7cd622014-07-23 06:55:04 -060021#include <dm.h>
Simon Glass4bfd1f52019-08-01 09:46:43 -060022#include <env.h>
Simon Glassf3998fd2019-08-02 09:44:25 -060023#include <env_internal.h>
Simon Glass5a421902022-03-04 08:43:02 -070024#include <event.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000025#include <fdtdec.h>
Simon Glassf828bf22013-04-20 08:42:41 +000026#include <fs.h>
Simon Glassdb41d652019-12-28 10:45:07 -070027#include <hang.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000028#include <i2c.h>
Simon Glass67c4e9f2019-11-14 12:57:45 -070029#include <init.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000030#include <initcall.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -060031#include <log.h>
Simon Glassfb5cf7f2015-02-27 22:06:36 -070032#include <malloc.h>
Joe Hershberger0eb25b62015-03-22 17:08:59 -050033#include <mapmem.h>
Simon Glassa733b062013-04-26 02:53:43 +000034#include <os.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000035#include <post.h>
Simon Glasse47b2d62017-03-31 08:40:38 -060036#include <relocate.h>
Simon Glassb03e0512019-11-14 12:57:24 -070037#include <serial.h>
Simon Glassb0edea32018-11-15 18:44:09 -070038#include <spl.h>
Jeroen Hofsteec5d40012014-06-23 23:20:19 +020039#include <status_led.h>
Mario Six23471ae2018-08-06 10:23:34 +020040#include <sysreset.h>
Simon Glass1057e6c2016-02-24 09:14:50 -070041#include <timer.h>
Simon Glass71c52db2013-06-11 11:14:42 -070042#include <trace.h>
Simon Glass0fc406a2024-08-07 16:47:34 -060043#include <upl.h>
Simon Glass5a541942016-01-18 19:52:21 -070044#include <video.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000045#include <watchdog.h>
Simon Glass90526e92020-05-10 11:39:56 -060046#include <asm/cache.h>
Simon Glass401d1c42020-10-30 21:38:53 -060047#include <asm/global_data.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000048#include <asm/io.h>
49#include <asm/sections.h>
Simon Glassab7cd622014-07-23 06:55:04 -060050#include <dm/root.h>
Simon Glass056285f2017-03-31 08:40:35 -060051#include <linux/errno.h>
Pali Rohár236f7392022-09-18 13:23:27 +020052#include <linux/log2.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000053
Simon Glass1938f4a2013-03-11 06:49:53 +000054DECLARE_GLOBAL_DATA_PTR;
Simon Glass1938f4a2013-03-11 06:49:53 +000055
56/*
Simon Glass4c509342015-04-28 20:25:03 -060057 * TODO(sjg@chromium.org): IMO this code should be
Simon Glass1938f4a2013-03-11 06:49:53 +000058 * refactored to a single function, something like:
59 *
60 * void led_set_state(enum led_colour_t colour, int on);
61 */
62/************************************************************************
63 * Coloured LED functionality
64 ************************************************************************
65 * May be supplied by boards if desired
66 */
Jeroen Hofsteec5d40012014-06-23 23:20:19 +020067__weak void coloured_LED_init(void) {}
68__weak void red_led_on(void) {}
69__weak void red_led_off(void) {}
70__weak void green_led_on(void) {}
71__weak void green_led_off(void) {}
72__weak void yellow_led_on(void) {}
73__weak void yellow_led_off(void) {}
74__weak void blue_led_on(void) {}
75__weak void blue_led_off(void) {}
Simon Glass1938f4a2013-03-11 06:49:53 +000076
77/*
78 * Why is gd allocated a register? Prior to reloc it might be better to
79 * just pass it around to each function in this file?
80 *
81 * After reloc one could argue that it is hardly used and doesn't need
82 * to be in a register. Or if it is it should perhaps hold pointers to all
83 * global data for all modules, so that post-reloc we can avoid the massive
84 * literal pool we get on ARM. Or perhaps just encourage each module to use
85 * a structure...
86 */
87
Sonic Zhangd54d7eb2014-07-17 19:01:34 +080088#if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
Simon Glasse4fef6c2013-03-11 14:30:42 +000089static int init_func_watchdog_init(void)
90{
Tom Riniea3310e2017-03-14 11:08:10 -040091# if defined(CONFIG_HW_WATCHDOG) && \
92 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
Prasanthi Chellakumar1473f6a2018-10-09 11:46:40 -070093 defined(CONFIG_SH) || \
Anatolij Gustschin46d7a3b2016-06-13 14:24:23 +020094 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
Stefan Roese14a380a2015-03-10 08:04:36 +010095 defined(CONFIG_IMX_WATCHDOG))
Sonic Zhangd54d7eb2014-07-17 19:01:34 +080096 hw_watchdog_init();
Simon Glasse4fef6c2013-03-11 14:30:42 +000097 puts(" Watchdog enabled\n");
Anatolij Gustschinba169d92016-06-13 14:24:24 +020098# endif
Stefan Roese29caf932022-09-02 14:10:46 +020099 schedule();
Simon Glasse4fef6c2013-03-11 14:30:42 +0000100
101 return 0;
102}
103
104int init_func_watchdog_reset(void)
105{
Stefan Roese29caf932022-09-02 14:10:46 +0200106 schedule();
Simon Glasse4fef6c2013-03-11 14:30:42 +0000107
108 return 0;
109}
110#endif /* CONFIG_WATCHDOG */
111
Jeroen Hofsteedd2a6cd2014-10-08 22:57:22 +0200112__weak void board_add_ram_info(int use_default)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000113{
114 /* please define platform specific board_add_ram_info() */
115}
116
Simon Glass1938f4a2013-03-11 06:49:53 +0000117static int init_baud_rate(void)
118{
Simon Glassbfebc8c2017-08-03 12:22:13 -0600119 gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
Simon Glass1938f4a2013-03-11 06:49:53 +0000120 return 0;
121}
122
123static int display_text_info(void)
124{
Ben Stoltz9b217492015-07-31 09:31:37 -0600125#if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100126 ulong bss_start, bss_end, text_base;
Simon Glass1938f4a2013-03-11 06:49:53 +0000127
Shiji Yangccea96f2023-08-03 09:47:17 +0800128 bss_start = (ulong)__bss_start;
129 bss_end = (ulong)__bss_end;
Albert ARIBAUDb60eff32014-02-22 17:53:43 +0100130
Simon Glass98463902022-10-20 18:22:39 -0600131#ifdef CONFIG_TEXT_BASE
132 text_base = CONFIG_TEXT_BASE;
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800133#else
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100134 text_base = CONFIG_SYS_MONITOR_BASE;
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800135#endif
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100136
137 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
Mario Six16ef1472018-01-15 11:10:02 +0100138 text_base, bss_start, bss_end);
Simon Glassa733b062013-04-26 02:53:43 +0000139#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000140
Simon Glass1938f4a2013-03-11 06:49:53 +0000141 return 0;
142}
143
Mario Six23471ae2018-08-06 10:23:34 +0200144#ifdef CONFIG_SYSRESET
145static int print_resetinfo(void)
146{
147 struct udevice *dev;
148 char status[256];
Michal Suchanek9259bd12022-10-10 20:29:40 +0200149 bool status_printed = false;
Mario Six23471ae2018-08-06 10:23:34 +0200150 int ret;
151
Bin Mengd8cb1dc2023-07-22 00:15:21 +0800152 /*
153 * Not all boards have sysreset drivers available during early
Michal Suchanek9259bd12022-10-10 20:29:40 +0200154 * boot, so don't fail if one can't be found.
155 */
156 for (ret = uclass_first_device_check(UCLASS_SYSRESET, &dev); dev;
Bin Mengd8cb1dc2023-07-22 00:15:21 +0800157 ret = uclass_next_device_check(&dev)) {
Michal Suchanek9259bd12022-10-10 20:29:40 +0200158 if (ret) {
159 debug("%s: %s sysreset device (error: %d)\n",
160 __func__, dev->name, ret);
161 continue;
162 }
Mario Six23471ae2018-08-06 10:23:34 +0200163
Michal Suchanek9259bd12022-10-10 20:29:40 +0200164 if (!sysreset_get_status(dev, status, sizeof(status))) {
165 printf("%s%s", status_printed ? " " : "", status);
166 status_printed = true;
167 }
168 }
169 if (status_printed)
170 printf("\n");
Mario Six23471ae2018-08-06 10:23:34 +0200171
172 return 0;
173}
174#endif
175
Mario Six5d6c61a2018-08-06 10:23:41 +0200176#if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
177static int print_cpuinfo(void)
178{
179 struct udevice *dev;
180 char desc[512];
181 int ret;
182
Ye Lif5b66af2020-05-03 21:58:50 +0800183 dev = cpu_get_current_dev();
184 if (!dev) {
185 debug("%s: Could not get CPU device\n",
186 __func__);
187 return -ENODEV;
Mario Six5d6c61a2018-08-06 10:23:41 +0200188 }
189
190 ret = cpu_get_desc(dev, desc, sizeof(desc));
191 if (ret) {
192 debug("%s: Could not get CPU description (err = %d)\n",
193 dev->name, ret);
194 return ret;
195 }
196
Bin Mengecfe6632018-10-10 22:06:55 -0700197 printf("CPU: %s\n", desc);
Mario Six5d6c61a2018-08-06 10:23:41 +0200198
199 return 0;
200}
201#endif
202
Simon Glass1938f4a2013-03-11 06:49:53 +0000203static int announce_dram_init(void)
204{
205 puts("DRAM: ");
206 return 0;
207}
208
Pali Rohár236f7392022-09-18 13:23:27 +0200209/*
210 * From input size calculate its nearest rounded unit scale (multiply of 2^10)
211 * and value in calculated unit scale multiplied by 10 (as fractional fixed
212 * point number with one decimal digit), which is human natural format,
213 * same what uses print_size() function for displaying. Mathematically it is:
214 * round_nearest(val * 2^scale) = size * 10; where: 10 <= val < 10240.
215 *
216 * For example for size=87654321 we calculate scale=20 and val=836 which means
217 * that input has natural human format 83.6 M (mega = 2^20).
218 */
219#define compute_size_scale_val(size, scale, val) do { \
220 scale = ilog2(size) / 10 * 10; \
221 val = (10 * size + ((1ULL << scale) >> 1)) >> scale; \
222 if (val == 10240) { val = 10; scale += 10; } \
223} while (0)
224
225/*
226 * Check if the sizes in their natural units written in decimal format with
227 * one fraction number are same.
228 */
229static int sizes_near(unsigned long long size1, unsigned long long size2)
230{
231 unsigned int size1_scale, size1_val, size2_scale, size2_val;
232
233 compute_size_scale_val(size1, size1_scale, size1_val);
234 compute_size_scale_val(size2, size2_scale, size2_val);
235
236 return size1_scale == size2_scale && size1_val == size2_val;
237}
238
Simon Glass1938f4a2013-03-11 06:49:53 +0000239static int show_dram_config(void)
240{
York Sunfa39ffe2014-05-02 17:28:05 -0700241 unsigned long long size;
Simon Glass1938f4a2013-03-11 06:49:53 +0000242 int i;
243
244 debug("\nRAM Configuration:\n");
245 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
246 size += gd->bd->bi_dram[i].size;
Bin Meng715f5992015-08-06 01:31:20 -0700247 debug("Bank #%d: %llx ", i,
248 (unsigned long long)(gd->bd->bi_dram[i].start));
Simon Glass1938f4a2013-03-11 06:49:53 +0000249#ifdef DEBUG
250 print_size(gd->bd->bi_dram[i].size, "\n");
251#endif
252 }
253 debug("\nDRAM: ");
Simon Glass1938f4a2013-03-11 06:49:53 +0000254
Pali Rohár236f7392022-09-18 13:23:27 +0200255 print_size(gd->ram_size, "");
256 if (!sizes_near(gd->ram_size, size)) {
257 printf(" (effective ");
258 print_size(size, ")");
259 }
Simon Glasse4fef6c2013-03-11 14:30:42 +0000260 board_add_ram_info(0);
261 putc('\n');
Simon Glass1938f4a2013-03-11 06:49:53 +0000262
263 return 0;
264}
265
Simon Glass76b00ac2017-03-31 08:40:32 -0600266__weak int dram_init_banksize(void)
Simon Glass1938f4a2013-03-11 06:49:53 +0000267{
Stefan Roesef120aa72020-08-12 13:02:39 +0200268 gd->bd->bi_dram[0].start = gd->ram_base;
Simon Glass1938f4a2013-03-11 06:49:53 +0000269 gd->bd->bi_dram[0].size = get_effective_memsize();
Simon Glass76b00ac2017-03-31 08:40:32 -0600270
271 return 0;
Simon Glass1938f4a2013-03-11 06:49:53 +0000272}
273
Tom Rini55dabcc2021-08-18 23:12:24 -0400274#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000275static int init_func_i2c(void)
276{
277 puts("I2C: ");
trem815a76f2013-09-21 18:13:34 +0200278 i2c_init_all();
Simon Glasse4fef6c2013-03-11 14:30:42 +0000279 puts("ready\n");
280 return 0;
281}
282#endif
283
Simon Glass1938f4a2013-03-11 06:49:53 +0000284static int setup_mon_len(void)
285{
Stefan Boschd8192502024-01-26 12:50:55 +0000286#if defined(CONFIG_ARCH_NEXELL)
287 gd->mon_len = (ulong)__bss_end - (ulong)__image_copy_start;
288#elif defined(__ARM__) || defined(__MICROBLAZE__)
Shiji Yangccea96f2023-08-03 09:47:17 +0800289 gd->mon_len = (ulong)__bss_end - (ulong)_start;
Simon Glass2c88d5e2023-01-15 14:15:40 -0700290#elif defined(CONFIG_SANDBOX) && !defined(__riscv)
Shiji Yangccea96f2023-08-03 09:47:17 +0800291 gd->mon_len = (ulong)_end - (ulong)_init;
Heinrich Schuchardt3c9fc232021-05-19 12:02:39 +0200292#elif defined(CONFIG_SANDBOX)
Simon Glass2c88d5e2023-01-15 14:15:40 -0700293 /* gcc does not provide _init in crti.o on RISC-V */
Heinrich Schuchardt3c9fc232021-05-19 12:02:39 +0200294 gd->mon_len = 0;
295#elif defined(CONFIG_EFI_APP)
Shiji Yangccea96f2023-08-03 09:47:17 +0800296 gd->mon_len = (ulong)_end - (ulong)_init;
Tom Riniea3310e2017-03-14 11:08:10 -0400297#elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800298 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
Tom Rini11232132022-04-06 09:21:25 -0400299#elif defined(CONFIG_SH) || defined(CONFIG_RISCV)
Shiji Yangccea96f2023-08-03 09:47:17 +0800300 gd->mon_len = (ulong)(__bss_end) - (ulong)(_start);
Simon Glassb0b35952016-05-14 18:49:28 -0600301#elif defined(CONFIG_SYS_MONITOR_BASE)
Shiji Yangccea96f2023-08-03 09:47:17 +0800302 /* TODO: use (ulong)__bss_end - (ulong)__text_start; ? */
303 gd->mon_len = (ulong)__bss_end - CONFIG_SYS_MONITOR_BASE;
Simon Glass632efa72013-03-11 07:06:48 +0000304#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000305 return 0;
306}
307
Simon Glassb0edea32018-11-15 18:44:09 -0700308static int setup_spl_handoff(void)
309{
310#if CONFIG_IS_ENABLED(HANDOFF)
Simon Glass7f3b79a2022-01-12 19:26:17 -0700311 gd->spl_handoff = bloblist_find(BLOBLISTT_U_BOOT_SPL_HANDOFF,
Simon Glassb0edea32018-11-15 18:44:09 -0700312 sizeof(struct spl_handoff));
313 debug("Found SPL hand-off info %p\n", gd->spl_handoff);
314#endif
315
316 return 0;
317}
318
Simon Glass1938f4a2013-03-11 06:49:53 +0000319__weak int arch_cpu_init(void)
320{
321 return 0;
322}
323
Paul Burton8ebf5062016-09-21 11:18:46 +0100324__weak int mach_cpu_init(void)
325{
326 return 0;
327}
328
Simon Glass1938f4a2013-03-11 06:49:53 +0000329/* Get the top of usable RAM */
Heinrich Schuchardtd768dd82023-08-12 20:16:58 +0200330__weak phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
Simon Glass1938f4a2013-03-11 06:49:53 +0000331{
Tom Riniaa6e94d2022-11-16 13:10:37 -0500332#if defined(CFG_SYS_SDRAM_BASE) && CFG_SYS_SDRAM_BASE > 0
Stephen Warren1e4d11a2014-12-23 10:34:49 -0700333 /*
Simon Glass4c509342015-04-28 20:25:03 -0600334 * Detect whether we have so much RAM that it goes past the end of our
Stephen Warren1e4d11a2014-12-23 10:34:49 -0700335 * 32-bit address space. If so, clip the usable RAM so it doesn't.
336 */
Tom Riniaa6e94d2022-11-16 13:10:37 -0500337 if (gd->ram_top < CFG_SYS_SDRAM_BASE)
Stephen Warren1e4d11a2014-12-23 10:34:49 -0700338 /*
339 * Will wrap back to top of 32-bit space when reservations
340 * are made.
341 */
342 return 0;
343#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000344 return gd->ram_top;
345}
346
Ovidiu Panaitd63fc992022-09-13 21:31:28 +0300347__weak int arch_setup_dest_addr(void)
348{
349 return 0;
350}
351
Simon Glass1938f4a2013-03-11 06:49:53 +0000352static int setup_dest_addr(void)
353{
354 debug("Monitor len: %08lX\n", gd->mon_len);
355 /*
356 * Ram is setup, size stored in gd !!
357 */
Pali Rohárd92aee52022-09-09 17:32:41 +0200358 debug("Ram size: %08llX\n", (unsigned long long)gd->ram_size);
Tom Rini24c904f2022-04-06 10:33:32 -0400359#if CONFIG_VAL(SYS_MEM_TOP_HIDE)
Simon Glass1938f4a2013-03-11 06:49:53 +0000360 /*
361 * Subtract specified amount of memory to hide so that it won't
362 * get "touched" at all by U-Boot. By fixing up gd->ram_size
363 * the Linux kernel should now get passed the now "corrected"
York Sun36cc0de2017-03-06 09:02:28 -0800364 * memory size and won't touch it either. This should work
365 * for arch/ppc and arch/powerpc. Only Linux board ports in
366 * arch/powerpc with bootwrapper support, that recalculate the
367 * memory size from the SDRAM controller setup will have to
368 * get fixed.
Simon Glass1938f4a2013-03-11 06:49:53 +0000369 */
York Sun36cc0de2017-03-06 09:02:28 -0800370 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
371#endif
Tom Riniaa6e94d2022-11-16 13:10:37 -0500372#ifdef CFG_SYS_SDRAM_BASE
373 gd->ram_base = CFG_SYS_SDRAM_BASE;
Simon Glass1938f4a2013-03-11 06:49:53 +0000374#endif
Siva Durga Prasad Paladugu1473b122018-07-16 15:56:10 +0530375 gd->ram_top = gd->ram_base + get_effective_memsize();
Simon Glass1938f4a2013-03-11 06:49:53 +0000376 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000377 gd->relocaddr = gd->ram_top;
Pali Rohárd92aee52022-09-09 17:32:41 +0200378 debug("Ram top: %08llX\n", (unsigned long long)gd->ram_top);
Ovidiu Panaitd63fc992022-09-13 21:31:28 +0300379
380 return arch_setup_dest_addr();
Simon Glass1938f4a2013-03-11 06:49:53 +0000381}
382
Tom Rini7c5c1372022-12-04 10:13:37 -0500383#ifdef CFG_PRAM
Simon Glass1938f4a2013-03-11 06:49:53 +0000384/* reserve protected RAM */
385static int reserve_pram(void)
386{
387 ulong reg;
388
Tom Rini7c5c1372022-12-04 10:13:37 -0500389 reg = env_get_ulong("pram", 10, CFG_PRAM);
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000390 gd->relocaddr -= (reg << 10); /* size is in kB */
Simon Glass1938f4a2013-03-11 06:49:53 +0000391 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000392 gd->relocaddr);
Simon Glass1938f4a2013-03-11 06:49:53 +0000393 return 0;
394}
Tom Rini7c5c1372022-12-04 10:13:37 -0500395#endif /* CFG_PRAM */
Simon Glass1938f4a2013-03-11 06:49:53 +0000396
397/* Round memory pointer down to next 4 kB limit */
398static int reserve_round_4k(void)
399{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000400 gd->relocaddr &= ~(4096 - 1);
Simon Glass1938f4a2013-03-11 06:49:53 +0000401 return 0;
402}
403
Ovidiu Panait79926e42020-03-29 20:57:41 +0300404__weak int arch_reserve_mmu(void)
405{
406 return 0;
407}
408
Devarsh Thakkar4ef9c772023-12-05 21:25:19 +0530409static int reserve_video_from_videoblob(void)
Simon Glass5a541942016-01-18 19:52:21 -0700410{
Simon Glassb7080bf2023-07-30 11:16:05 -0600411 if (IS_ENABLED(CONFIG_SPL_VIDEO_HANDOFF) && spl_phase() > PHASE_SPL) {
Nikhil M Jain5bc610a2023-07-18 14:27:31 +0530412 struct video_handoff *ho;
Devarsh Thakkareefe23c2023-12-05 21:25:20 +0530413 int ret = 0;
Nikhil M Jain5bc610a2023-07-18 14:27:31 +0530414
415 ho = bloblist_find(BLOBLISTT_U_BOOT_VIDEO, sizeof(*ho));
416 if (!ho)
Devarsh Thakkareefe23c2023-12-05 21:25:20 +0530417 return log_msg_ret("Missing video bloblist", -ENOENT);
418
419 ret = video_reserve_from_bloblist(ho);
420 if (ret)
421 return log_msg_ret("Invalid Video handoff info", ret);
Devarsh Thakkar4ef9c772023-12-05 21:25:19 +0530422
423 /* Sanity check fb from blob is before current relocaddr */
424 if (likely(gd->relocaddr > (unsigned long)ho->fb))
425 gd->relocaddr = ho->fb;
426 }
427
428 return 0;
429}
430
431/*
432 * Check if any bloblist received specifying reserved areas from previous stage and adjust
433 * gd->relocaddr accordingly, so that we start reserving after pre-reserved areas
434 * from previous stage.
435 *
436 * NOTE:
437 * IT is recommended that all bloblists from previous stage are reserved from ram_top
438 * as next stage will simply start reserving further regions after them.
439 */
440static int setup_relocaddr_from_bloblist(void)
441{
442 reserve_video_from_videoblob();
443
444 return 0;
445}
446
447static int reserve_video(void)
448{
449 if (CONFIG_IS_ENABLED(VIDEO)) {
Simon Glassf9b7bd72022-10-16 15:57:41 -0600450 ulong addr;
451 int ret;
Simon Glass5a541942016-01-18 19:52:21 -0700452
Simon Glassf9b7bd72022-10-16 15:57:41 -0600453 addr = gd->relocaddr;
454 ret = video_reserve(&addr);
455 if (ret)
456 return ret;
457 debug("Reserving %luk for video at: %08lx\n",
458 ((unsigned long)gd->relocaddr - addr) >> 10, addr);
459 gd->relocaddr = addr;
460 }
Simon Glass8703ef32016-01-18 19:52:20 -0700461
462 return 0;
463}
Simon Glass8703ef32016-01-18 19:52:20 -0700464
Simon Glass71c52db2013-06-11 11:14:42 -0700465static int reserve_trace(void)
466{
467#ifdef CONFIG_TRACE
468 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
469 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
Heinrich Schuchardt7ea33572019-06-14 21:52:22 +0200470 debug("Reserving %luk for trace data at: %08lx\n",
471 (unsigned long)CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
Simon Glass71c52db2013-06-11 11:14:42 -0700472#endif
473
474 return 0;
475}
476
Simon Glass1938f4a2013-03-11 06:49:53 +0000477static int reserve_uboot(void)
478{
Alexey Brodkinff2b2ba2018-05-25 16:08:14 +0300479 if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
480 /*
481 * reserve memory for U-Boot code, data & bss
482 * round down to next 4 kB limit
483 */
484 gd->relocaddr -= gd->mon_len;
485 gd->relocaddr &= ~(4096 - 1);
486 #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
487 /* round down to next 64 kB limit so that IVPR stays aligned */
488 gd->relocaddr &= ~(65536 - 1);
489 #endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000490
Alexey Brodkinff2b2ba2018-05-25 16:08:14 +0300491 debug("Reserving %ldk for U-Boot at: %08lx\n",
492 gd->mon_len >> 10, gd->relocaddr);
493 }
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000494
495 gd->start_addr_sp = gd->relocaddr;
496
Simon Glass1938f4a2013-03-11 06:49:53 +0000497 return 0;
498}
499
Patrick Delaunay65c141e2020-03-10 10:15:05 +0100500/*
501 * reserve after start_addr_sp the requested size and make the stack pointer
502 * 16-byte aligned, this alignment is needed for cast on the reserved memory
503 * ref = x86_64 ABI: https://reviews.llvm.org/D30049: 16 bytes
504 * = ARMv8 Instruction Set Overview: quad word, 16 bytes
505 */
506static unsigned long reserve_stack_aligned(size_t size)
507{
508 return ALIGN_DOWN(gd->start_addr_sp - size, 16);
509}
510
Vikas Manocha5f7adb52019-08-16 09:57:44 -0700511#ifdef CONFIG_SYS_NONCACHED_MEMORY
512static int reserve_noncached(void)
513{
Stephen Warren5e0404f2019-08-27 11:54:31 -0600514 /*
515 * The value of gd->start_addr_sp must match the value of malloc_start
Tom Rini02f5a012022-10-28 20:27:09 -0400516 * calculated in board_r.c:initr_malloc(), which is passed to
517 * dlmalloc.c:mem_malloc_init() and then used by
Stephen Warren5e0404f2019-08-27 11:54:31 -0600518 * cache.c:noncached_init()
519 *
520 * These calculations must match the code in cache.c:noncached_init()
521 */
522 gd->start_addr_sp = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE) -
523 MMU_SECTION_SIZE;
524 gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
525 MMU_SECTION_SIZE);
Vikas Manocha5f7adb52019-08-16 09:57:44 -0700526 debug("Reserving %dM for noncached_alloc() at: %08lx\n",
527 CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp);
528
529 return 0;
530}
531#endif
532
Simon Glass1938f4a2013-03-11 06:49:53 +0000533/* reserve memory for malloc() area */
534static int reserve_malloc(void)
535{
Patrick Delaunay65c141e2020-03-10 10:15:05 +0100536 gd->start_addr_sp = reserve_stack_aligned(TOTAL_MALLOC_LEN);
Simon Glass1938f4a2013-03-11 06:49:53 +0000537 debug("Reserving %dk for malloc() at: %08lx\n",
Mario Six16ef1472018-01-15 11:10:02 +0100538 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
Vikas Manocha5f7adb52019-08-16 09:57:44 -0700539#ifdef CONFIG_SYS_NONCACHED_MEMORY
540 reserve_noncached();
541#endif
542
Simon Glass1938f4a2013-03-11 06:49:53 +0000543 return 0;
544}
545
546/* (permanently) allocate a Board Info struct */
547static int reserve_board(void)
548{
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800549 if (!gd->bd) {
Masahiro Yamadab75d8dc2020-06-26 15:13:33 +0900550 gd->start_addr_sp = reserve_stack_aligned(sizeof(struct bd_info));
551 gd->bd = (struct bd_info *)map_sysmem(gd->start_addr_sp,
552 sizeof(struct bd_info));
553 memset(gd->bd, '\0', sizeof(struct bd_info));
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800554 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
Masahiro Yamadab75d8dc2020-06-26 15:13:33 +0900555 sizeof(struct bd_info), gd->start_addr_sp);
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800556 }
Simon Glass1938f4a2013-03-11 06:49:53 +0000557 return 0;
558}
559
Simon Glass1938f4a2013-03-11 06:49:53 +0000560static int reserve_global_data(void)
561{
Patrick Delaunay65c141e2020-03-10 10:15:05 +0100562 gd->start_addr_sp = reserve_stack_aligned(sizeof(gd_t));
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000563 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
Simon Glass1938f4a2013-03-11 06:49:53 +0000564 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
Mario Six16ef1472018-01-15 11:10:02 +0100565 sizeof(gd_t), gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000566 return 0;
567}
568
569static int reserve_fdt(void)
570{
Ovidiu Panait19b18da2020-11-28 10:43:07 +0200571 if (!IS_ENABLED(CONFIG_OF_EMBED)) {
572 /*
573 * If the device tree is sitting immediately above our image
574 * then we must relocate it. If it is embedded in the data
575 * section, then it will be relocated with other data.
576 */
577 if (gd->fdt_blob) {
Simon Glass5019d322024-08-21 10:19:10 -0600578 gd->boardf->fdt_size =
579 ALIGN(fdt_totalsize(gd->fdt_blob), 32);
Simon Glass1938f4a2013-03-11 06:49:53 +0000580
Simon Glass5019d322024-08-21 10:19:10 -0600581 gd->start_addr_sp = reserve_stack_aligned(
582 gd->boardf->fdt_size);
583 gd->boardf->new_fdt = map_sysmem(gd->start_addr_sp,
584 gd->boardf->fdt_size);
Ovidiu Panait19b18da2020-11-28 10:43:07 +0200585 debug("Reserving %lu Bytes for FDT at: %08lx\n",
Simon Glass5019d322024-08-21 10:19:10 -0600586 gd->boardf->fdt_size, gd->start_addr_sp);
Ovidiu Panait19b18da2020-11-28 10:43:07 +0200587 }
Simon Glass1938f4a2013-03-11 06:49:53 +0000588 }
589
590 return 0;
591}
592
Simon Glass25e7dc62017-05-22 05:05:30 -0600593static int reserve_bootstage(void)
594{
595#ifdef CONFIG_BOOTSTAGE
596 int size = bootstage_get_size();
597
Patrick Delaunay65c141e2020-03-10 10:15:05 +0100598 gd->start_addr_sp = reserve_stack_aligned(size);
Simon Glass25e7dc62017-05-22 05:05:30 -0600599 gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
600 debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
601 gd->start_addr_sp);
602#endif
603
604 return 0;
605}
606
Patrick Delaunayd6f87712018-03-13 13:57:00 +0100607__weak int arch_reserve_stacks(void)
Andreas Bießmann68145d42015-02-06 23:06:45 +0100608{
609 return 0;
610}
611
Simon Glass1938f4a2013-03-11 06:49:53 +0000612static int reserve_stacks(void)
613{
Andreas Bießmann68145d42015-02-06 23:06:45 +0100614 /* make stack pointer 16-byte aligned */
Patrick Delaunay65c141e2020-03-10 10:15:05 +0100615 gd->start_addr_sp = reserve_stack_aligned(16);
Simon Glass1938f4a2013-03-11 06:49:53 +0000616
617 /*
Simon Glass4c509342015-04-28 20:25:03 -0600618 * let the architecture-specific code tailor gd->start_addr_sp and
Andreas Bießmann68145d42015-02-06 23:06:45 +0100619 * gd->irq_sp
Simon Glass1938f4a2013-03-11 06:49:53 +0000620 */
Andreas Bießmann68145d42015-02-06 23:06:45 +0100621 return arch_reserve_stacks();
Simon Glass1938f4a2013-03-11 06:49:53 +0000622}
623
Simon Glassf0293d32018-11-15 18:43:52 -0700624static int reserve_bloblist(void)
625{
626#ifdef CONFIG_BLOBLIST
Simon Glass4a08fae2020-09-27 18:46:18 -0600627 /* Align to a 4KB boundary for easier reading of addresses */
Simon Glass9fe06462021-01-13 20:29:43 -0700628 gd->start_addr_sp = ALIGN_DOWN(gd->start_addr_sp -
629 CONFIG_BLOBLIST_SIZE_RELOC, 0x1000);
630 gd->new_bloblist = map_sysmem(gd->start_addr_sp,
631 CONFIG_BLOBLIST_SIZE_RELOC);
Simon Glassf0293d32018-11-15 18:43:52 -0700632#endif
633
634 return 0;
635}
636
Simon Glass1938f4a2013-03-11 06:49:53 +0000637static int display_new_sp(void)
638{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000639 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000640
641 return 0;
642}
643
Ovidiu Panait81e7cb12020-07-24 14:12:15 +0300644__weak int arch_setup_bdinfo(void)
Ovidiu Panaitba743102020-07-24 14:12:14 +0300645{
646 return 0;
647}
648
Ovidiu Panait81e7cb12020-07-24 14:12:15 +0300649int setup_bdinfo(void)
650{
Ovidiu Panaita4aa1882020-07-24 14:12:16 +0300651 struct bd_info *bd = gd->bd;
652
Ovidiu Panait49122242020-07-24 14:12:17 +0300653 if (IS_ENABLED(CONFIG_SYS_HAS_SRAM)) {
654 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
655 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
656 }
657
Ovidiu Panait81e7cb12020-07-24 14:12:15 +0300658 return arch_setup_bdinfo();
659}
660
Simon Glass1938f4a2013-03-11 06:49:53 +0000661#ifdef CONFIG_POST
662static int init_post(void)
663{
664 post_bootmode_init();
665 post_run(NULL, POST_ROM | post_bootmode_get(0));
666
667 return 0;
668}
669#endif
670
Simon Glass1938f4a2013-03-11 06:49:53 +0000671static int reloc_fdt(void)
672{
Ovidiu Panait19b18da2020-11-28 10:43:07 +0200673 if (!IS_ENABLED(CONFIG_OF_EMBED)) {
Simon Glass6abd9922024-08-21 10:19:09 -0600674 if (gd->boardf->new_fdt) {
675 memcpy(gd->boardf->new_fdt, gd->fdt_blob,
Ovidiu Panait19b18da2020-11-28 10:43:07 +0200676 fdt_totalsize(gd->fdt_blob));
Simon Glass6abd9922024-08-21 10:19:09 -0600677 gd->fdt_blob = gd->boardf->new_fdt;
Ovidiu Panait19b18da2020-11-28 10:43:07 +0200678 }
Simon Glass1938f4a2013-03-11 06:49:53 +0000679 }
680
681 return 0;
682}
683
Simon Glass25e7dc62017-05-22 05:05:30 -0600684static int reloc_bootstage(void)
685{
686#ifdef CONFIG_BOOTSTAGE
687 if (gd->flags & GD_FLG_SKIP_RELOC)
688 return 0;
689 if (gd->new_bootstage) {
Richard Weinberger1779a582024-07-31 18:07:54 +0200690 bootstage_relocate(gd->new_bootstage);
Simon Glass25e7dc62017-05-22 05:05:30 -0600691 }
692#endif
693
694 return 0;
695}
696
Simon Glassf0293d32018-11-15 18:43:52 -0700697static int reloc_bloblist(void)
698{
699#ifdef CONFIG_BLOBLIST
Simon Glassd5b6e912021-11-03 21:09:20 -0600700 /*
701 * Relocate only if we are supposed to send it
702 */
703 if ((gd->flags & GD_FLG_SKIP_RELOC) &&
704 CONFIG_BLOBLIST_SIZE == CONFIG_BLOBLIST_SIZE_RELOC) {
705 debug("Not relocating bloblist\n");
Simon Glassf0293d32018-11-15 18:43:52 -0700706 return 0;
Simon Glassd5b6e912021-11-03 21:09:20 -0600707 }
Simon Glassf0293d32018-11-15 18:43:52 -0700708 if (gd->new_bloblist) {
Simon Glassf0293d32018-11-15 18:43:52 -0700709 debug("Copying bloblist from %p to %p, size %x\n",
Raymond Mao1ef43f32024-02-03 08:36:22 -0800710 gd->bloblist, gd->new_bloblist, gd->bloblist->total_size);
711 return bloblist_reloc(gd->new_bloblist,
712 CONFIG_BLOBLIST_SIZE_RELOC);
Simon Glassf0293d32018-11-15 18:43:52 -0700713 }
714#endif
715
716 return 0;
717}
718
Eugene Uriev7bceb162024-03-31 23:03:25 +0300719void mcheck_on_ramrelocation(size_t offset);
Simon Glass1938f4a2013-03-11 06:49:53 +0000720static int setup_reloc(void)
721{
Marek Vasut47d7d032021-11-13 18:34:04 +0100722 if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
Simon Glass98463902022-10-20 18:22:39 -0600723#ifdef CONFIG_TEXT_BASE
Lothar Waßmann53207bf2017-06-08 10:18:25 +0200724#ifdef ARM
Marek Vasut47d7d032021-11-13 18:34:04 +0100725 gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
Michal Simekd58c0072022-06-24 14:15:01 +0200726#elif defined(CONFIG_MICROBLAZE)
727 gd->reloc_off = gd->relocaddr - (u32)_start;
Lothar Waßmann53207bf2017-06-08 10:18:25 +0200728#elif defined(CONFIG_M68K)
Marek Vasut47d7d032021-11-13 18:34:04 +0100729 /*
730 * On all ColdFire arch cpu, monitor code starts always
731 * just after the default vector table location, so at 0x400
732 */
Simon Glass98463902022-10-20 18:22:39 -0600733 gd->reloc_off = gd->relocaddr - (CONFIG_TEXT_BASE + 0x400);
Simon Glass001d1882019-04-08 13:20:41 -0600734#elif !defined(CONFIG_SANDBOX)
Simon Glass98463902022-10-20 18:22:39 -0600735 gd->reloc_off = gd->relocaddr - CONFIG_TEXT_BASE;
angelo@sysam.ite310b932015-02-12 01:40:17 +0100736#endif
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800737#endif
Marek Vasut47d7d032021-11-13 18:34:04 +0100738 }
739
Simon Glass1938f4a2013-03-11 06:49:53 +0000740 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
741
Marek Vasut47d7d032021-11-13 18:34:04 +0100742 if (gd->flags & GD_FLG_SKIP_RELOC) {
743 debug("Skipping relocation due to flag\n");
744 } else {
Eugene Uriev7bceb162024-03-31 23:03:25 +0300745#ifdef MCHECK_HEAP_PROTECTION
746 mcheck_on_ramrelocation(gd->reloc_off);
747#endif
Marek Vasut47d7d032021-11-13 18:34:04 +0100748 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
749 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
750 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
751 gd->start_addr_sp);
752 }
Simon Glass1938f4a2013-03-11 06:49:53 +0000753
754 return 0;
755}
756
mario.six@gdsys.cc2a792752017-02-22 16:07:22 +0100757#ifdef CONFIG_OF_BOARD_FIXUP
758static int fix_fdt(void)
759{
760 return board_fix_fdt((void *)gd->fdt_blob);
761}
762#endif
763
Simon Glass1938f4a2013-03-11 06:49:53 +0000764/* ARM calls relocate_code from its crt0.S */
Simon Glass8f015d32023-07-15 21:38:52 -0600765#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glass1938f4a2013-03-11 06:49:53 +0000766
767static int jump_to_copy(void)
768{
Simon Glassf05ad9b2015-08-04 12:33:39 -0600769 if (gd->flags & GD_FLG_SKIP_RELOC)
770 return 0;
Simon Glass48a33802013-03-05 14:39:52 +0000771 /*
772 * x86 is special, but in a nice way. It uses a trampoline which
773 * enables the dcache if possible.
774 *
775 * For now, other archs use relocate_code(), which is implemented
776 * similarly for all archs. When we do generic relocation, hopefully
777 * we can make all archs enable the dcache prior to relocation.
778 */
Alexey Brodkin3fb80162015-02-24 19:40:36 +0300779#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass48a33802013-03-05 14:39:52 +0000780 /*
781 * SDRAM and console are now initialised. The final stack can now
782 * be setup in SDRAM. Code execution will continue in Flash, but
783 * with the stack in SDRAM and Global Data in temporary memory
784 * (CPU cache)
785 */
Simon Glassf0c7d9c2015-08-10 20:44:32 -0600786 arch_setup_gd(gd->new_gd);
Simon Glass8f015d32023-07-15 21:38:52 -0600787# if CONFIG_IS_ENABLED(X86_64)
788 board_init_f_r_trampoline64(gd->new_gd, gd->start_addr_sp);
789# else
790 board_init_f_r_trampoline(gd->start_addr_sp);
791# endif
Simon Glass48a33802013-03-05 14:39:52 +0000792#else
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000793 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
Simon Glass48a33802013-03-05 14:39:52 +0000794#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000795
796 return 0;
797}
798#endif
799
800/* Record the board_init_f() bootstage (after arch_cpu_init()) */
Simon Glassb383d6c2017-05-22 05:05:25 -0600801static int initf_bootstage(void)
Simon Glass1938f4a2013-03-11 06:49:53 +0000802{
Simon Glassbaa7d342017-06-07 10:28:46 -0600803 bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
804 IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
Simon Glassb383d6c2017-05-22 05:05:25 -0600805 int ret;
806
Simon Glass824bb1b2017-05-22 05:05:35 -0600807 ret = bootstage_init(!from_spl);
Simon Glassb383d6c2017-05-22 05:05:25 -0600808 if (ret)
809 return ret;
Simon Glass824bb1b2017-05-22 05:05:35 -0600810 if (from_spl) {
Tom Rinib81e31a2024-07-15 12:42:00 +0100811 ret = bootstage_stash_default();
Simon Glass824bb1b2017-05-22 05:05:35 -0600812 if (ret && ret != -ENOENT) {
813 debug("Failed to unstash bootstage: err=%d\n", ret);
814 return ret;
815 }
816 }
Simon Glassb383d6c2017-05-22 05:05:25 -0600817
Simon Glass1938f4a2013-03-11 06:49:53 +0000818 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
819
820 return 0;
821}
822
Simon Glassab7cd622014-07-23 06:55:04 -0600823static int initf_dm(void)
824{
Simon Glass3d6d5072023-09-26 08:14:27 -0600825#if defined(CONFIG_DM) && CONFIG_IS_ENABLED(SYS_MALLOC_F)
Simon Glassab7cd622014-07-23 06:55:04 -0600826 int ret;
827
Simon Glassb67eefd2020-05-10 11:39:59 -0600828 bootstage_start(BOOTSTAGE_ID_ACCUM_DM_F, "dm_f");
Simon Glassab7cd622014-07-23 06:55:04 -0600829 ret = dm_init_and_scan(true);
Simon Glassb67eefd2020-05-10 11:39:59 -0600830 bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_F);
Simon Glassab7cd622014-07-23 06:55:04 -0600831 if (ret)
832 return ret;
Ovidiu Panait4b9a1212020-11-28 10:43:05 +0200833
834 if (IS_ENABLED(CONFIG_TIMER_EARLY)) {
835 ret = dm_timer_init();
836 if (ret)
837 return ret;
838 }
Simon Glass1057e6c2016-02-24 09:14:50 -0700839#endif
Simon Glassab7cd622014-07-23 06:55:04 -0600840
841 return 0;
842}
843
Simon Glass146251f2015-01-19 22:16:12 -0700844/* Architecture-specific memory reservation */
845__weak int reserve_arch(void)
846{
847 return 0;
848}
849
Ovidiu Panait016e4ae2020-01-22 22:28:25 +0200850__weak int checkcpu(void)
851{
852 return 0;
853}
854
Ovidiu Panaitfbf9c152020-02-05 08:54:42 +0200855__weak int clear_bss(void)
856{
857 return 0;
858}
859
Simon Glass0fc406a2024-08-07 16:47:34 -0600860static int initf_upl(void)
861{
862 struct upl *upl;
863 int ret;
864
865 if (!IS_ENABLED(CONFIG_UPL_IN) || !(gd->flags & GD_FLG_UPL))
866 return 0;
867
868 upl = malloc(sizeof(struct upl));
869 if (upl)
870 ret = upl_read_handoff(upl, oftree_default());
871 if (ret) {
872 printf("UPL handoff: read failure (err=%dE)\n", ret);
873 return ret;
874 }
875 gd_set_upl(upl);
876
877 return 0;
878}
879
Simon Glass4acff452017-01-16 07:03:50 -0700880static const init_fnc_t init_sequence_f[] = {
Simon Glass1938f4a2013-03-11 06:49:53 +0000881 setup_mon_len,
Simon Glassb45122f2015-02-27 22:06:34 -0700882#ifdef CONFIG_OF_CONTROL
Simon Glass08793612015-02-27 22:06:35 -0700883 fdtdec_setup,
Simon Glassb45122f2015-02-27 22:06:34 -0700884#endif
Heinrich Schuchardt7ef8e9b2019-06-02 00:53:24 +0200885#ifdef CONFIG_TRACE_EARLY
Simon Glass71c52db2013-06-11 11:14:42 -0700886 trace_early_init,
Kevin Hilmand2107182014-12-09 15:03:58 -0800887#endif
Simon Glass768e0f52014-11-10 18:00:18 -0700888 initf_malloc,
Simon Glass0fc406a2024-08-07 16:47:34 -0600889 initf_upl,
Simon Glassaf1bc0c2017-12-04 13:48:28 -0700890 log_init,
Simon Glass5ac44a52017-05-22 05:05:31 -0600891 initf_bootstage, /* uses its own timer, so does not need DM */
Simon Glass5a421902022-03-04 08:43:02 -0700892 event_init,
Simon Glass3d653182023-09-26 08:14:51 -0600893 bloblist_maybe_init,
Simon Glassb0edea32018-11-15 18:44:09 -0700894 setup_spl_handoff,
Ovidiu Panait8e8d45e2020-11-28 10:43:04 +0200895#if defined(CONFIG_CONSOLE_RECORD_INIT_F)
896 console_record_init,
897#endif
Simon Glass13a7db92023-08-21 21:16:59 -0600898 INITCALL_EVENT(EVT_FSP_INIT_F),
Simon Glass1938f4a2013-03-11 06:49:53 +0000899 arch_cpu_init, /* basic arch cpu dependent setup */
Paul Burton8ebf5062016-09-21 11:18:46 +0100900 mach_cpu_init, /* SoC/machine dependent CPU setup */
Simon Glass3ea09532014-09-03 17:36:59 -0600901 initf_dm,
Simon Glass1938f4a2013-03-11 06:49:53 +0000902#if defined(CONFIG_BOARD_EARLY_INIT_F)
903 board_early_init_f,
904#endif
Simon Glass727e94a2017-03-28 10:27:26 -0600905#if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
Simon Glassc252c062017-03-28 10:27:19 -0600906 /* get CPU and bus clocks according to the environment variable */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000907 get_clocks, /* get CPU and bus clocks (etc.) */
Simon Glass1793e782017-03-28 10:27:23 -0600908#endif
Marek Vasut56c3aa92023-03-23 01:20:40 +0100909#if !defined(CONFIG_M68K) || (defined(CONFIG_M68K) && !defined(CONFIG_MCFTMR))
Simon Glass1938f4a2013-03-11 06:49:53 +0000910 timer_init, /* initialize timer */
Angelo Dureghello0ce45282017-05-10 23:58:06 +0200911#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000912#if defined(CONFIG_BOARD_POSTCLK_INIT)
913 board_postclk_init,
914#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000915 env_init, /* initialize environment */
916 init_baud_rate, /* initialze baudrate settings */
917 serial_init, /* serial communications setup */
918 console_init_f, /* stage 1 init of console */
919 display_options, /* say that we are here */
920 display_text_info, /* show debugging info if required */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000921 checkcpu,
Mario Six23471ae2018-08-06 10:23:34 +0200922#if defined(CONFIG_SYSRESET)
923 print_resetinfo,
924#endif
Simon Glasscc664002017-01-23 13:31:25 -0700925#if defined(CONFIG_DISPLAY_CPUINFO)
Simon Glass1938f4a2013-03-11 06:49:53 +0000926 print_cpuinfo, /* display cpu info (and speed) */
Simon Glasscc664002017-01-23 13:31:25 -0700927#endif
Cooper Jr., Franklinaf9e6ad2017-06-16 17:25:12 -0500928#if defined(CONFIG_DTB_RESELECT)
929 embedded_dtb_select,
930#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000931#if defined(CONFIG_DISPLAY_BOARDINFO)
Masahiro Yamada0365ffc2015-01-14 17:07:05 +0900932 show_board_info,
Simon Glass1938f4a2013-03-11 06:49:53 +0000933#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000934 INIT_FUNC_WATCHDOG_INIT
Simon Glassc9eff0a2023-08-21 21:16:54 -0600935 INITCALL_EVENT(EVT_MISC_INIT_F),
Simon Glasse4fef6c2013-03-11 14:30:42 +0000936 INIT_FUNC_WATCHDOG_RESET
Tom Rini55dabcc2021-08-18 23:12:24 -0400937#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000938 init_func_i2c,
939#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000940 announce_dram_init,
Simon Glass1938f4a2013-03-11 06:49:53 +0000941 dram_init, /* configure available RAM banks */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000942#ifdef CONFIG_POST
943 post_init_f,
944#endif
945 INIT_FUNC_WATCHDOG_RESET
Tom Rini65cc0e22022-11-16 13:10:41 -0500946#if defined(CFG_SYS_DRAM_TEST)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000947 testdram,
Tom Rini65cc0e22022-11-16 13:10:41 -0500948#endif /* CFG_SYS_DRAM_TEST */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000949 INIT_FUNC_WATCHDOG_RESET
950
Simon Glass1938f4a2013-03-11 06:49:53 +0000951#ifdef CONFIG_POST
952 init_post,
953#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000954 INIT_FUNC_WATCHDOG_RESET
Simon Glass1938f4a2013-03-11 06:49:53 +0000955 /*
956 * Now that we have DRAM mapped and working, we can
957 * relocate the code and continue running from DRAM.
958 *
959 * Reserve memory at end of RAM for (top down in that order):
960 * - area that won't get touched by U-Boot and Linux (optional)
961 * - kernel log buffer
962 * - protected RAM
963 * - LCD framebuffer
964 * - monitor code
965 * - board info struct
966 */
967 setup_dest_addr,
Pali Rohár0858e032024-06-06 18:33:21 +0200968#if defined(CONFIG_OF_BOARD_FIXUP) && !defined(CONFIG_OF_INITIAL_DTB_READONLY)
Pragnesh Patel313981c2020-08-13 10:12:26 +0530969 fix_fdt,
970#endif
Tom Rini7c5c1372022-12-04 10:13:37 -0500971#ifdef CFG_PRAM
Simon Glass1938f4a2013-03-11 06:49:53 +0000972 reserve_pram,
973#endif
974 reserve_round_4k,
Devarsh Thakkar4ef9c772023-12-05 21:25:19 +0530975 setup_relocaddr_from_bloblist,
Ovidiu Panait79926e42020-03-29 20:57:41 +0300976 arch_reserve_mmu,
Simon Glass5a541942016-01-18 19:52:21 -0700977 reserve_video,
Simon Glass8703ef32016-01-18 19:52:20 -0700978 reserve_trace,
Simon Glass1938f4a2013-03-11 06:49:53 +0000979 reserve_uboot,
980 reserve_malloc,
981 reserve_board,
Simon Glass1938f4a2013-03-11 06:49:53 +0000982 reserve_global_data,
983 reserve_fdt,
Pali Rohár0858e032024-06-06 18:33:21 +0200984#if defined(CONFIG_OF_BOARD_FIXUP) && defined(CONFIG_OF_INITIAL_DTB_READONLY)
985 reloc_fdt,
986 fix_fdt,
987#endif
Simon Glass25e7dc62017-05-22 05:05:30 -0600988 reserve_bootstage,
Simon Glassf0293d32018-11-15 18:43:52 -0700989 reserve_bloblist,
Simon Glass146251f2015-01-19 22:16:12 -0700990 reserve_arch,
Simon Glass1938f4a2013-03-11 06:49:53 +0000991 reserve_stacks,
Simon Glass76b00ac2017-03-31 08:40:32 -0600992 dram_init_banksize,
Simon Glass1938f4a2013-03-11 06:49:53 +0000993 show_dram_config,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000994 INIT_FUNC_WATCHDOG_RESET
Ovidiu Panait15328852020-07-24 14:12:20 +0300995 setup_bdinfo,
Simon Glass1938f4a2013-03-11 06:49:53 +0000996 display_new_sp,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000997 INIT_FUNC_WATCHDOG_RESET
Pali Rohár0858e032024-06-06 18:33:21 +0200998#if !defined(CONFIG_OF_BOARD_FIXUP) || !defined(CONFIG_OF_INITIAL_DTB_READONLY)
Simon Glass1938f4a2013-03-11 06:49:53 +0000999 reloc_fdt,
Pali Rohár0858e032024-06-06 18:33:21 +02001000#endif
Simon Glass25e7dc62017-05-22 05:05:30 -06001001 reloc_bootstage,
Simon Glassf0293d32018-11-15 18:43:52 -07001002 reloc_bloblist,
Simon Glass1938f4a2013-03-11 06:49:53 +00001003 setup_reloc,
Alexey Brodkin3fb80162015-02-24 19:40:36 +03001004#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass313aef32015-01-01 16:18:09 -07001005 copy_uboot_to_ram,
Simon Glass313aef32015-01-01 16:18:09 -07001006 do_elf_reloc_fixups,
1007#endif
Chris Zankelde5e5ce2016-08-10 18:36:43 +03001008 clear_bss,
Rasmus Villemoes50128ae2022-10-28 13:50:54 +02001009 /*
1010 * Deregister all cyclic functions before relocation, so that
1011 * gd->cyclic_list does not contain any references to pre-relocation
1012 * devices. Drivers will register their cyclic functions anew when the
1013 * devices are probed again.
1014 *
1015 * This should happen as late as possible so that the window where a
1016 * watchdog device is not serviced is as small as possible.
1017 */
1018 cyclic_unregister_all,
Simon Glass8f015d32023-07-15 21:38:52 -06001019#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glass1938f4a2013-03-11 06:49:53 +00001020 jump_to_copy,
1021#endif
1022 NULL,
1023};
1024
1025void board_init_f(ulong boot_flags)
1026{
Simon Glass6abd9922024-08-21 10:19:09 -06001027 struct board_f boardf;
1028
Simon Glass1938f4a2013-03-11 06:49:53 +00001029 gd->flags = boot_flags;
Simon Glassf44fded2024-08-21 10:19:04 -06001030 gd->flags &= ~GD_FLG_HAVE_CONSOLE;
Simon Glass6abd9922024-08-21 10:19:09 -06001031 gd->boardf = &boardf;
Simon Glass1938f4a2013-03-11 06:49:53 +00001032
1033 if (initcall_run_list(init_sequence_f))
1034 hang();
1035
Ben Stoltz9b217492015-07-31 09:31:37 -06001036#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
Alexey Brodkin264d2982015-12-16 19:24:10 +03001037 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
1038 !defined(CONFIG_ARC)
Simon Glass1938f4a2013-03-11 06:49:53 +00001039 /* NOTREACHED - jump_to_copy() does not return */
1040 hang();
1041#endif
1042}
1043
Alexey Brodkin3fb80162015-02-24 19:40:36 +03001044#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass48a33802013-03-05 14:39:52 +00001045/*
1046 * For now this code is only used on x86.
1047 *
1048 * init_sequence_f_r is the list of init functions which are run when
1049 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1050 * The following limitations must be considered when implementing an
1051 * '_f_r' function:
1052 * - 'static' variables are read-only
1053 * - Global Data (gd->xxx) is read/write
1054 *
1055 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1056 * supported). It _should_, if possible, copy global data to RAM and
1057 * initialise the CPU caches (to speed up the relocation process)
1058 *
1059 * NOTE: At present only x86 uses this route, but it is intended that
1060 * all archs will move to this when generic relocation is implemented.
1061 */
Simon Glass4acff452017-01-16 07:03:50 -07001062static const init_fnc_t init_sequence_f_r[] = {
Simon Glass530f27e2017-01-16 07:03:49 -07001063#if !CONFIG_IS_ENABLED(X86_64)
Simon Glass48a33802013-03-05 14:39:52 +00001064 init_cache_f_r,
Simon Glass530f27e2017-01-16 07:03:49 -07001065#endif
Simon Glass48a33802013-03-05 14:39:52 +00001066
1067 NULL,
1068};
1069
1070void board_init_f_r(void)
1071{
1072 if (initcall_run_list(init_sequence_f_r))
1073 hang();
1074
1075 /*
Simon Glasse4d6ab02016-03-11 22:06:51 -07001076 * The pre-relocation drivers may be using memory that has now gone
1077 * away. Mark serial as unavailable - this will fall back to the debug
1078 * UART if available.
Simon Glassaf1bc0c2017-12-04 13:48:28 -07001079 *
1080 * Do the same with log drivers since the memory may not be available.
Simon Glasse4d6ab02016-03-11 22:06:51 -07001081 */
Simon Glassaf1bc0c2017-12-04 13:48:28 -07001082 gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
Simon Glass5ee94b42017-09-05 19:49:45 -06001083#ifdef CONFIG_TIMER
1084 gd->timer = NULL;
1085#endif
Simon Glasse4d6ab02016-03-11 22:06:51 -07001086
1087 /*
Simon Glass48a33802013-03-05 14:39:52 +00001088 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1089 * Transfer execution from Flash to RAM by calculating the address
1090 * of the in-RAM copy of board_init_r() and calling it
1091 */
Alexey Brodkin7bf9f202015-02-25 17:59:02 +03001092 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
Simon Glass48a33802013-03-05 14:39:52 +00001093
1094 /* NOTREACHED - board_init_r() does not return */
1095 hang();
1096}
Alexey Brodkin5bcd19a2015-03-24 11:12:47 +03001097#endif /* CONFIG_X86 */