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Tom Warrenf01b6312012-12-11 13:34:18 +00001/*
2 * (C) Copyright 2010-2012
3 * NVIDIA Corporation <www.nvidia.com>
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Tom Warrenf01b6312012-12-11 13:34:18 +00006 */
7
Tom Warrenbfcf46d2013-02-26 12:18:48 +00008#ifndef _TEGRA_COMMON_H_
9#define _TEGRA_COMMON_H_
Alexey Brodkin1ace4022014-02-26 17:47:58 +040010#include <linux/sizes.h>
Tom Warrenf01b6312012-12-11 13:34:18 +000011#include <linux/stringify.h>
12
13/*
14 * High Level Configuration Options
15 */
16#define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */
Tom Warrenf01b6312012-12-11 13:34:18 +000017#define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */
18
Tom Warrenf01b6312012-12-11 13:34:18 +000019#include <asm/arch/tegra.h> /* get chip and board defs */
20
Simon Glass47f3d3c2014-06-11 23:29:53 -060021#define CONFIG_DM
22#define CONFIG_CMD_DM
Simon Glass2fccd2d2014-09-03 17:37:03 -060023#define CONFIG_DM_GPIO
Simon Glass858530a2014-09-04 16:27:36 -060024#ifndef CONFIG_SPL_BUILD
25#define CONFIG_DM_SERIAL
26#endif
Simon Glassfda6fac2014-10-13 23:42:13 -060027#define CONFIG_DM_SPI
28#define CONFIG_DM_SPI_FLASH
Simon Glassb0e6ef42014-12-10 08:55:57 -070029#define CONFIG_DM_I2C
Simon Glass47f3d3c2014-06-11 23:29:53 -060030
Rob Herring31df9892013-10-04 10:22:47 -050031#define CONFIG_SYS_TIMER_RATE 1000000
32#define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE
33
Tom Warrenf01b6312012-12-11 13:34:18 +000034/*
35 * Display CPU and Board information
36 */
37#define CONFIG_DISPLAY_CPUINFO
38#define CONFIG_DISPLAY_BOARDINFO
39
40#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
Tom Warrenf01b6312012-12-11 13:34:18 +000041
42/* Environment */
43#define CONFIG_ENV_VARS_UBOOT_CONFIG
44#define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */
45
46/*
47 * Size of malloc() pool
48 */
49#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */
Simon Glassa4741112014-09-03 17:37:02 -060050#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
Tom Warrenf01b6312012-12-11 13:34:18 +000051
52/*
Tom Warrenbfcf46d2013-02-26 12:18:48 +000053 * NS16550 Configuration
Tom Warrenf01b6312012-12-11 13:34:18 +000054 */
Simon Glass858530a2014-09-04 16:27:36 -060055#ifdef CONFIG_SPL_BUILD
Tom Warrenf01b6312012-12-11 13:34:18 +000056#define CONFIG_SYS_NS16550_SERIAL
57#define CONFIG_SYS_NS16550_REG_SIZE (-4)
58#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
Simon Glass858530a2014-09-04 16:27:36 -060059#else
60#define CONFIG_TEGRA_SERIAL
61#endif
62#define CONFIG_SYS_NS16550
Tom Warrenf01b6312012-12-11 13:34:18 +000063
64/*
Stephen Warrenf1756032014-04-18 10:56:11 -060065 * Common HW configuration.
66 * If this varies between SoCs later, move to tegraNN-common.h
67 * Note: This is number of devices, not max device ID.
68 */
69#define CONFIG_SYS_MMC_MAX_DEVICE 4
70
71/*
Tom Warrenf01b6312012-12-11 13:34:18 +000072 * select serial console configuration
73 */
74#define CONFIG_CONS_INDEX 1
75
76/* allow to overwrite serial and ethaddr */
77#define CONFIG_ENV_OVERWRITE
78#define CONFIG_BAUDRATE 115200
79
80/* include default commands */
81#include <config_cmd_default.h>
82
83/* remove unused commands */
84#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
85#undef CONFIG_CMD_FPGA /* FPGA configuration support */
86#undef CONFIG_CMD_IMI
87#undef CONFIG_CMD_IMLS
88#undef CONFIG_CMD_NFS /* NFS support */
89#undef CONFIG_CMD_NET /* network support */
90
91/* turn on command-line edit/hist/auto */
Tom Warrenf01b6312012-12-11 13:34:18 +000092#define CONFIG_COMMAND_HISTORY
Tom Warrenf01b6312012-12-11 13:34:18 +000093
Stephen Warren11d9c032013-02-28 15:03:48 +000094/* turn on commonly used storage-related commands */
Stephen Warren11d9c032013-02-28 15:03:48 +000095#define CONFIG_PARTITION_UUIDS
Stephen Warren11d9c032013-02-28 15:03:48 +000096#define CONFIG_CMD_PART
97
Tom Warrenf01b6312012-12-11 13:34:18 +000098#define CONFIG_SYS_NO_FLASH
99
100#define CONFIG_CONSOLE_MUX
101#define CONFIG_SYS_CONSOLE_IS_IN_ENV
Tom Warrenf01b6312012-12-11 13:34:18 +0000102
103/*
104 * Miscellaneous configurable options
105 */
Tom Warrenf01b6312012-12-11 13:34:18 +0000106#define CONFIG_SYS_PROMPT V_PROMPT
107/*
108 * Increasing the size of the IO buffer as default nfsargs size is more
109 * than 256 and so it is not possible to edit it
110 */
111#define CONFIG_SYS_CBSIZE (256 * 2) /* Console I/O Buffer Size */
112/* Print Buffer Size */
113#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
114 sizeof(CONFIG_SYS_PROMPT) + 16)
115#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
116/* Boot Argument Buffer Size */
117#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
118
119#define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000)
120#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
121
Simon Glass9dacbb22014-11-10 17:16:42 -0700122#ifndef CONFIG_SPL_BUILD
Marcel Ziswiler4270d5a2014-08-26 11:49:46 +0200123#define CONFIG_USE_ARCH_MEMCPY
Simon Glass9dacbb22014-11-10 17:16:42 -0700124#endif
Marcel Ziswiler4270d5a2014-08-26 11:49:46 +0200125
Tom Warrenf01b6312012-12-11 13:34:18 +0000126/*-----------------------------------------------------------------------
127 * Physical Memory Map
128 */
129#define CONFIG_NR_DRAM_BANKS 1
130#define PHYS_SDRAM_1 NV_PA_SDRC_CS0
131#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */
132
133#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
134#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
135
136#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */
137
138#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE
139#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
140#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
141 CONFIG_SYS_INIT_RAM_SIZE - \
142 GENERATED_GBL_DATA_SIZE)
143
144#define CONFIG_TEGRA_GPIO
145#define CONFIG_CMD_GPIO
146#define CONFIG_CMD_ENTERRCM
Tom Warrenf01b6312012-12-11 13:34:18 +0000147
148/* Defines for SPL */
Tom Warrenf01b6312012-12-11 13:34:18 +0000149#define CONFIG_SPL_FRAMEWORK
150#define CONFIG_SPL_RAM_DEVICE
151#define CONFIG_SPL_BOARD_INIT
152#define CONFIG_SPL_NAND_SIMPLE
Albert ARIBAUD6ebc3462013-04-12 05:14:30 +0000153#define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \
Tom Warrenf01b6312012-12-11 13:34:18 +0000154 CONFIG_SPL_TEXT_BASE)
155#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
156
157#define CONFIG_SPL_LIBCOMMON_SUPPORT
158#define CONFIG_SPL_LIBGENERIC_SUPPORT
159#define CONFIG_SPL_SERIAL_SUPPORT
160#define CONFIG_SPL_GPIO_SUPPORT
161
Simon Glassdd7f65f2013-03-05 14:39:56 +0000162#define CONFIG_SYS_GENERIC_BOARD
Tom Warren3efff992013-03-26 10:39:33 -0700163
Stephen Warrena885f852013-02-28 15:03:45 +0000164/* Misc utility code */
165#define CONFIG_BOUNCE_BUFFER
Tom Warren3efff992013-03-26 10:39:33 -0700166#define CONFIG_CRC32_VERIFY
Simon Glassdd7f65f2013-03-05 14:39:56 +0000167
Stephen Warren68cf64d2014-02-05 09:24:57 -0700168#ifndef CONFIG_SPL_BUILD
169#include <config_distro_defaults.h>
170#endif
171
Tom Warrenf01b6312012-12-11 13:34:18 +0000172#endif /* _TEGRA_COMMON_H_ */