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Tom Warrenf01b6312012-12-11 13:34:18 +00001/*
2 * (C) Copyright 2010-2012
3 * NVIDIA Corporation <www.nvidia.com>
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Tom Warrenf01b6312012-12-11 13:34:18 +00006 */
7
Tom Warrenbfcf46d2013-02-26 12:18:48 +00008#ifndef _TEGRA_COMMON_H_
9#define _TEGRA_COMMON_H_
Alexey Brodkin1ace4022014-02-26 17:47:58 +040010#include <linux/sizes.h>
Tom Warrenf01b6312012-12-11 13:34:18 +000011#include <linux/stringify.h>
12
13/*
14 * High Level Configuration Options
15 */
16#define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */
Tom Warrenf01b6312012-12-11 13:34:18 +000017#define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */
18
Tom Warrenf01b6312012-12-11 13:34:18 +000019#include <asm/arch/tegra.h> /* get chip and board defs */
20
Simon Glass47f3d3c2014-06-11 23:29:53 -060021#define CONFIG_DM
22#define CONFIG_CMD_DM
Simon Glass2fccd2d2014-09-03 17:37:03 -060023#define CONFIG_DM_GPIO
Simon Glass858530a2014-09-04 16:27:36 -060024#ifndef CONFIG_SPL_BUILD
25#define CONFIG_DM_SERIAL
26#endif
Simon Glass47f3d3c2014-06-11 23:29:53 -060027
Rob Herring31df9892013-10-04 10:22:47 -050028#define CONFIG_SYS_TIMER_RATE 1000000
29#define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE
30
Tom Warrenf01b6312012-12-11 13:34:18 +000031/*
32 * Display CPU and Board information
33 */
34#define CONFIG_DISPLAY_CPUINFO
35#define CONFIG_DISPLAY_BOARDINFO
36
37#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
Tom Warrenf01b6312012-12-11 13:34:18 +000038
39/* Environment */
40#define CONFIG_ENV_VARS_UBOOT_CONFIG
41#define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */
42
43/*
44 * Size of malloc() pool
45 */
46#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */
Simon Glassa4741112014-09-03 17:37:02 -060047#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
Tom Warrenf01b6312012-12-11 13:34:18 +000048
49/*
Tom Warrenbfcf46d2013-02-26 12:18:48 +000050 * NS16550 Configuration
Tom Warrenf01b6312012-12-11 13:34:18 +000051 */
Simon Glass858530a2014-09-04 16:27:36 -060052#ifdef CONFIG_SPL_BUILD
Tom Warrenf01b6312012-12-11 13:34:18 +000053#define CONFIG_SYS_NS16550_SERIAL
54#define CONFIG_SYS_NS16550_REG_SIZE (-4)
55#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
Simon Glass858530a2014-09-04 16:27:36 -060056#else
57#define CONFIG_TEGRA_SERIAL
58#endif
59#define CONFIG_SYS_NS16550
Tom Warrenf01b6312012-12-11 13:34:18 +000060
61/*
Stephen Warrenf1756032014-04-18 10:56:11 -060062 * Common HW configuration.
63 * If this varies between SoCs later, move to tegraNN-common.h
64 * Note: This is number of devices, not max device ID.
65 */
66#define CONFIG_SYS_MMC_MAX_DEVICE 4
67
68/*
Tom Warrenf01b6312012-12-11 13:34:18 +000069 * select serial console configuration
70 */
71#define CONFIG_CONS_INDEX 1
72
73/* allow to overwrite serial and ethaddr */
74#define CONFIG_ENV_OVERWRITE
75#define CONFIG_BAUDRATE 115200
76
77/* include default commands */
78#include <config_cmd_default.h>
79
80/* remove unused commands */
81#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
82#undef CONFIG_CMD_FPGA /* FPGA configuration support */
83#undef CONFIG_CMD_IMI
84#undef CONFIG_CMD_IMLS
85#undef CONFIG_CMD_NFS /* NFS support */
86#undef CONFIG_CMD_NET /* network support */
87
88/* turn on command-line edit/hist/auto */
Tom Warrenf01b6312012-12-11 13:34:18 +000089#define CONFIG_COMMAND_HISTORY
Tom Warrenf01b6312012-12-11 13:34:18 +000090
Stephen Warren11d9c032013-02-28 15:03:48 +000091/* turn on commonly used storage-related commands */
Stephen Warren11d9c032013-02-28 15:03:48 +000092#define CONFIG_PARTITION_UUIDS
Stephen Warren11d9c032013-02-28 15:03:48 +000093#define CONFIG_CMD_PART
94
Tom Warrenf01b6312012-12-11 13:34:18 +000095#define CONFIG_SYS_NO_FLASH
96
97#define CONFIG_CONSOLE_MUX
98#define CONFIG_SYS_CONSOLE_IS_IN_ENV
Tom Warrenf01b6312012-12-11 13:34:18 +000099
100/*
101 * Miscellaneous configurable options
102 */
Tom Warrenf01b6312012-12-11 13:34:18 +0000103#define CONFIG_SYS_PROMPT V_PROMPT
104/*
105 * Increasing the size of the IO buffer as default nfsargs size is more
106 * than 256 and so it is not possible to edit it
107 */
108#define CONFIG_SYS_CBSIZE (256 * 2) /* Console I/O Buffer Size */
109/* Print Buffer Size */
110#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
111 sizeof(CONFIG_SYS_PROMPT) + 16)
112#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
113/* Boot Argument Buffer Size */
114#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
115
116#define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000)
117#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
118
Marcel Ziswiler4270d5a2014-08-26 11:49:46 +0200119#define CONFIG_USE_ARCH_MEMCPY
120
Tom Warrenf01b6312012-12-11 13:34:18 +0000121/*-----------------------------------------------------------------------
122 * Physical Memory Map
123 */
124#define CONFIG_NR_DRAM_BANKS 1
125#define PHYS_SDRAM_1 NV_PA_SDRC_CS0
126#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */
127
128#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
129#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
130
131#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */
132
133#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE
134#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
135#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
136 CONFIG_SYS_INIT_RAM_SIZE - \
137 GENERATED_GBL_DATA_SIZE)
138
139#define CONFIG_TEGRA_GPIO
140#define CONFIG_CMD_GPIO
141#define CONFIG_CMD_ENTERRCM
Tom Warrenf01b6312012-12-11 13:34:18 +0000142
143/* Defines for SPL */
Tom Warrenf01b6312012-12-11 13:34:18 +0000144#define CONFIG_SPL_FRAMEWORK
145#define CONFIG_SPL_RAM_DEVICE
146#define CONFIG_SPL_BOARD_INIT
147#define CONFIG_SPL_NAND_SIMPLE
Albert ARIBAUD6ebc3462013-04-12 05:14:30 +0000148#define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \
Tom Warrenf01b6312012-12-11 13:34:18 +0000149 CONFIG_SPL_TEXT_BASE)
150#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
151
152#define CONFIG_SPL_LIBCOMMON_SUPPORT
153#define CONFIG_SPL_LIBGENERIC_SUPPORT
154#define CONFIG_SPL_SERIAL_SUPPORT
155#define CONFIG_SPL_GPIO_SUPPORT
156
Masahiro Yamadacd2e46c2014-03-05 16:59:38 +0900157#ifdef CONFIG_SPL_BUILD
158# define CONFIG_USE_PRIVATE_LIBGCC
159#endif
160
Simon Glassdd7f65f2013-03-05 14:39:56 +0000161#define CONFIG_SYS_GENERIC_BOARD
Tom Warren3efff992013-03-26 10:39:33 -0700162
Stephen Warrena885f852013-02-28 15:03:45 +0000163/* Misc utility code */
164#define CONFIG_BOUNCE_BUFFER
Tom Warren3efff992013-03-26 10:39:33 -0700165#define CONFIG_CRC32_VERIFY
Simon Glassdd7f65f2013-03-05 14:39:56 +0000166
Stephen Warren68cf64d2014-02-05 09:24:57 -0700167#ifndef CONFIG_SPL_BUILD
168#include <config_distro_defaults.h>
169#endif
170
Tom Warrenf01b6312012-12-11 13:34:18 +0000171#endif /* _TEGRA_COMMON_H_ */