wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 1 | /* |
wdenk | 414eec3 | 2005-04-02 22:37:54 +0000 | [diff] [blame] | 2 | * 2004-2005 Gary Jennejohn <garyj@denx.de> |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 3 | * |
wdenk | 9d5028c | 2004-11-21 00:06:33 +0000 | [diff] [blame] | 4 | * Configuration settings for the CMC PU2 board. |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 5 | * |
| 6 | * See file CREDITS for list of people who contributed to this |
| 7 | * project. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or |
| 10 | * modify it under the terms of the GNU General Public License as |
| 11 | * published by the Free Software Foundation; either version 2 of |
| 12 | * the License, or (at your option) any later version. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
wdenk | 45ea3fc | 2004-12-14 23:28:24 +0000 | [diff] [blame] | 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 22 | * MA 02111-1307 USA |
| 23 | */ |
| 24 | |
| 25 | #ifndef __CONFIG_H |
| 26 | #define __CONFIG_H |
| 27 | |
Jens Scharsig | 425de62 | 2010-02-03 22:45:42 +0100 | [diff] [blame] | 28 | #define CONFIG_AT91_LEGACY |
| 29 | |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 30 | /* ARM asynchronous clock */ |
Wolfgang Denk | df3c7c8 | 2005-08-19 00:36:45 +0200 | [diff] [blame] | 31 | #define AT91C_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 39) */ |
wdenk | 101e8df | 2005-04-04 12:08:28 +0000 | [diff] [blame] | 32 | #define AT91C_MASTER_CLOCK (AT91C_MAIN_CLOCK/3) /* peripheral clock */ |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 33 | |
| 34 | #define AT91_SLOW_CLOCK 32768 /* slow clock */ |
| 35 | |
wdenk | a85f9f2 | 2005-04-06 13:52:31 +0000 | [diff] [blame] | 36 | #define CONFIG_ARM920T 1 /* This is an ARM920T Core */ |
| 37 | #define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */ |
wdenk | a85f9f2 | 2005-04-06 13:52:31 +0000 | [diff] [blame] | 38 | #define CONFIG_CMC_PU2 1 /* on an CMC_PU2 Board */ |
| 39 | #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ |
| 40 | #define USE_920T_MMU 1 |
| 41 | |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 42 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
| 43 | #define CONFIG_SETUP_MEMORY_TAGS 1 |
| 44 | #define CONFIG_INITRD_TAG 1 |
| 45 | |
wdenk | 8aa1a2d | 2005-04-04 12:44:11 +0000 | [diff] [blame] | 46 | #ifndef CONFIG_SKIP_LOWLEVEL_INIT |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 47 | #define CONFIG_SYS_USE_MAIN_OSCILLATOR 1 |
wdenk | ef2807c | 2005-03-31 23:44:33 +0000 | [diff] [blame] | 48 | /* flash */ |
Jean-Christophe PLAGNIOL-VILLARD | d481c80 | 2009-01-03 17:22:25 +0100 | [diff] [blame] | 49 | #define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 |
| 50 | #define CONFIG_SYS_SMC_CSR0_VAL 0x100032ad /* 16bit, 2 TDF, 4 WS */ |
wdenk | ef2807c | 2005-03-31 23:44:33 +0000 | [diff] [blame] | 51 | |
| 52 | /* clocks */ |
Jean-Christophe PLAGNIOL-VILLARD | d481c80 | 2009-01-03 17:22:25 +0100 | [diff] [blame] | 53 | #define CONFIG_SYS_PLLAR_VAL 0x2026BE04 /* 179,712 MHz for PCK */ |
| 54 | #define CONFIG_SYS_PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */ |
| 55 | #define CONFIG_SYS_MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 69.120MHz from PLLA */ |
wdenk | ef2807c | 2005-03-31 23:44:33 +0000 | [diff] [blame] | 56 | |
| 57 | /* sdram */ |
Jean-Christophe PLAGNIOL-VILLARD | d481c80 | 2009-01-03 17:22:25 +0100 | [diff] [blame] | 58 | #define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */ |
| 59 | #define CONFIG_SYS_PIOC_BSR_VAL 0x00000000 |
| 60 | #define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000 |
| 61 | #define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */ |
| 62 | #define CONFIG_SYS_SDRC_CR_VAL 0x3399c1d4 /* set up the CONFIG_SYS_SDRAM */ |
| 63 | #define CONFIG_SYS_SDRAM 0x20000000 /* address of the CONFIG_SYS_SDRAM */ |
| 64 | #define CONFIG_SYS_SDRAM1 0x20000080 /* address of the CONFIG_SYS_SDRAM */ |
| 65 | #define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to CONFIG_SYS_SDRAM */ |
| 66 | #define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */ |
| 67 | #define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */ |
| 68 | #define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ |
| 69 | #define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */ |
| 70 | #define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ |
wdenk | 8aa1a2d | 2005-04-04 12:44:11 +0000 | [diff] [blame] | 71 | #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ |
wdenk | ef2807c | 2005-03-31 23:44:33 +0000 | [diff] [blame] | 72 | |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 73 | /* |
| 74 | * Size of malloc() pool |
| 75 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 76 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 77 | |
wdenk | 45ea3fc | 2004-12-14 23:28:24 +0000 | [diff] [blame] | 78 | #define CONFIG_BAUDRATE 9600 |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 79 | |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 80 | /* |
| 81 | * Hardware drivers |
| 82 | */ |
| 83 | |
| 84 | /* define one of these to choose the DBGU, USART0 or USART1 as console */ |
Jean-Christophe PLAGNIOL-VILLARD | beebd85 | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 85 | #define CONFIG_AT91RM9200_USART |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 86 | #undef CONFIG_DBGU |
wdenk | 9d5028c | 2004-11-21 00:06:33 +0000 | [diff] [blame] | 87 | #define CONFIG_USART0 |
| 88 | #undef CONFIG_USART1 |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 89 | |
| 90 | #undef CONFIG_HWFLOW /* don't include RTS/CTS flow control support */ |
| 91 | |
| 92 | #undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */ |
| 93 | |
wdenk | 9d5028c | 2004-11-21 00:06:33 +0000 | [diff] [blame] | 94 | #define CONFIG_HARD_I2C |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 95 | |
| 96 | #ifdef CONFIG_HARD_I2C |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 97 | #define CONFIG_SYS_I2C_SPEED 0 /* not used */ |
| 98 | #define CONFIG_SYS_I2C_SLAVE 0 /* not used */ |
wdenk | 45ea3fc | 2004-12-14 23:28:24 +0000 | [diff] [blame] | 99 | #define CONFIG_RTC_RS5C372A /* RICOH I2C RTC */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 100 | #define CONFIG_SYS_I2C_RTC_ADDR 0x32 |
| 101 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 |
| 102 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 |
| 103 | #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW |
Jon Loeliger | 37e4f24 | 2007-07-04 22:31:56 -0500 | [diff] [blame] | 104 | #else |
| 105 | #define CONFIG_TIMESTAMP |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 106 | #endif |
wdenk | ed54e62 | 2004-11-24 23:35:19 +0000 | [diff] [blame] | 107 | /* still about 20 kB free with this defined */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 108 | #define CONFIG_SYS_LONGHELP |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 109 | |
Wolfgang Denk | 1ac7e17 | 2006-06-16 16:43:33 +0200 | [diff] [blame] | 110 | #define CONFIG_BOOTDELAY 1 |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 111 | |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 112 | |
Jon Loeliger | 37e4f24 | 2007-07-04 22:31:56 -0500 | [diff] [blame] | 113 | /* |
Jon Loeliger | 80ff4f9 | 2007-07-10 09:29:01 -0500 | [diff] [blame] | 114 | * BOOTP options |
| 115 | */ |
| 116 | #define CONFIG_BOOTP_BOOTFILESIZE |
| 117 | #define CONFIG_BOOTP_BOOTPATH |
| 118 | #define CONFIG_BOOTP_GATEWAY |
| 119 | #define CONFIG_BOOTP_HOSTNAME |
| 120 | |
| 121 | |
| 122 | /* |
Jon Loeliger | 37e4f24 | 2007-07-04 22:31:56 -0500 | [diff] [blame] | 123 | * Command line configuration. |
| 124 | */ |
| 125 | #include <config_cmd_default.h> |
| 126 | |
| 127 | #define CONFIG_CMD_DHCP |
| 128 | #define CONFIG_CMD_NFS |
| 129 | #define CONFIG_CMD_SNTP |
| 130 | |
| 131 | #undef CONFIG_CMD_FPGA |
| 132 | #undef CONFIG_CMD_MISC |
| 133 | |
| 134 | #if defined(CONFIG_HARD_I2C) |
| 135 | #define CONFIG_CMD_DATE |
| 136 | #define CONFIG_CMD_EEPROM |
| 137 | #define CONFIG_CMD_I2C |
| 138 | #endif |
| 139 | |
| 140 | |
Mike Frysinger | 92b50ff | 2009-02-11 19:55:01 -0500 | [diff] [blame] | 141 | #define CONFIG_MISC_INIT_R |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 142 | #define CONFIG_SYS_LONGHELP |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 143 | |
wdenk | 45ea3fc | 2004-12-14 23:28:24 +0000 | [diff] [blame] | 144 | #define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */ |
| 145 | #define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */ |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 146 | |
wdenk | 45ea3fc | 2004-12-14 23:28:24 +0000 | [diff] [blame] | 147 | #define CONFIG_NR_DRAM_BANKS 1 |
| 148 | #define PHYS_SDRAM 0x20000000 |
Ladislav Michl | 2c5260f | 2007-12-06 23:24:57 +0100 | [diff] [blame] | 149 | #define PHYS_SDRAM_SIZE 0x1000000 /* 16 megs */ |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 150 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 151 | #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM |
| 152 | #define CONFIG_SYS_MEMTEST_END CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 262144 |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 153 | |
Jens Scharsig | c041e9d | 2010-01-23 12:03:45 +0100 | [diff] [blame] | 154 | #define CONFIG_NET_MULTI 1 |
| 155 | #ifdef CONFIG_NET_MULTI |
| 156 | #define CONFIG_DRIVER_AT91EMAC 1 |
| 157 | #define CONFIG_SYS_RX_ETH_BUFFER 8 |
| 158 | #else |
| 159 | #define CONFIG_DRIVER_ETHER 1 |
| 160 | #endif |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 161 | #define CONFIG_NET_RETRY_COUNT 20 |
| 162 | #define CONFIG_AT91C_USE_RMII |
| 163 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 164 | #define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ) |
| 165 | #define CONFIG_SYS_MAX_DATAFLASH_BANKS 2 |
| 166 | #define CONFIG_SYS_MAX_DATAFLASH_PAGES 16384 |
| 167 | #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* Logical adress for CS0 */ |
| 168 | #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* Logical adress for CS3 */ |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 169 | |
| 170 | #define PHYS_FLASH_1 0x10000000 |
wdenk | 9d5028c | 2004-11-21 00:06:33 +0000 | [diff] [blame] | 171 | #define PHYS_FLASH_SIZE 0x800000 /* 8 megs main flash */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 172 | #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 |
| 173 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE |
| 174 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
| 175 | #define CONFIG_SYS_MAX_FLASH_SECT 256 |
| 176 | #define CONFIG_SYS_FLASH_ERASE_TOUT (11 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */ |
| 177 | #define CONFIG_SYS_FLASH_WRITE_TOUT ( 2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */ |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 178 | |
Jean-Christophe PLAGNIOL-VILLARD | 5a1aceb | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 179 | #define CONFIG_ENV_IS_IN_FLASH 1 |
Jean-Christophe PLAGNIOL-VILLARD | 0e8d158 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 180 | #define CONFIG_ENV_OFFSET 0x20000 /* after u-boot.bin */ |
| 181 | #define CONFIG_ENV_SECT_SIZE (64 << 10) /* sectors are 64 kB */ |
| 182 | #define CONFIG_ENV_SIZE (16 << 10) /* Use only 16 kB */ |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 183 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 184 | #define CONFIG_SYS_LOAD_ADDR 0x21000000 /* default load address */ |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 185 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 186 | #define CONFIG_SYS_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 } |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 187 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 188 | #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ |
| 189 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
| 190 | #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ |
| 191 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 192 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 193 | #define CONFIG_SYS_HZ 1000 |
| 194 | #define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK/2) /* AT91C_TC0_CMR is implicitly set to */ |
wdenk | 59acc29 | 2005-04-03 14:18:51 +0000 | [diff] [blame] | 195 | /* AT91C_TC_TIMER_DIV1_CLOCK */ |
wdenk | 2cbe571 | 2004-10-10 17:05:18 +0000 | [diff] [blame] | 196 | |
| 197 | #define CONFIG_STACKSIZE (32*1024) /* regular stack */ |
| 198 | |
| 199 | #ifdef CONFIG_USE_IRQ |
| 200 | #error CONFIG_USE_IRQ not supported |
| 201 | #endif |
| 202 | |
wdenk | 3dd7f0f | 2005-04-04 23:43:44 +0000 | [diff] [blame] | 203 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
Wolfgang Denk | fe126d8 | 2005-11-20 21:40:11 +0100 | [diff] [blame] | 204 | "net_nfs=tftp ${loadaddr} ${bootfile};run nfsargs addip addcons " \ |
wdenk | 3dd7f0f | 2005-04-04 23:43:44 +0000 | [diff] [blame] | 205 | "addmtd;bootm\0" \ |
| 206 | "nfsargs=setenv bootargs root=/dev/nfs rw " \ |
Wolfgang Denk | fe126d8 | 2005-11-20 21:40:11 +0100 | [diff] [blame] | 207 | "nfsroot=${serverip}:${rootpath}\0" \ |
| 208 | "net_cramfs=tftp ${loadaddr} ${bootfile}; run flashargs addip " \ |
wdenk | 3dd7f0f | 2005-04-04 23:43:44 +0000 | [diff] [blame] | 209 | "addcons addmtd; bootm\0" \ |
| 210 | "flash_cramfs=run flashargs addip addcons addmtd; bootm 10030000\0" \ |
| 211 | "flashargs=setenv bootargs root=/dev/mtdblock3 ro\0" \ |
Wolfgang Denk | fe126d8 | 2005-11-20 21:40:11 +0100 | [diff] [blame] | 212 | "addip=setenv bootargs ${bootargs} ethaddr=${ethaddr} " \ |
| 213 | "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:" \ |
| 214 | "${hostname}::off\0" \ |
| 215 | "addcons=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \ |
| 216 | "addmtd=setenv bootargs ${bootargs} mtdparts=cmc_pu2:128k(uboot)ro," \ |
wdenk | 3dd7f0f | 2005-04-04 23:43:44 +0000 | [diff] [blame] | 217 | "64k(environment),768k(linux),4096k(root),-\0" \ |
Wolfgang Denk | fe126d8 | 2005-11-20 21:40:11 +0100 | [diff] [blame] | 218 | "load=tftp ${loadaddr} ${loadfile}\0" \ |
wdenk | 3dd7f0f | 2005-04-04 23:43:44 +0000 | [diff] [blame] | 219 | "update=protect off 10000000 1001ffff;erase 10000000 1001ffff; " \ |
Wolfgang Denk | fe126d8 | 2005-11-20 21:40:11 +0100 | [diff] [blame] | 220 | "cp.b ${loadaddr} 10000000 ${filesize};" \ |
wdenk | 3dd7f0f | 2005-04-04 23:43:44 +0000 | [diff] [blame] | 221 | "protect on 10000000 1001ffff\0" \ |
Wolfgang Denk | fe126d8 | 2005-11-20 21:40:11 +0100 | [diff] [blame] | 222 | "updatel=era 10030000 100effff;tftp ${loadaddr} ${bootfile}; " \ |
| 223 | "cp.b ${loadaddr} 10030000 ${filesize}\0" \ |
| 224 | "updatec=era 100f0000 104effff;tftp ${loadaddr} ${cramfsimage}; " \ |
| 225 | "cp.b ${loadaddr} 100f0000 ${filesize}\0" \ |
| 226 | "updatej=era 104f0000 107fffff;tftp ${loadaddr} ${jffsimage}; " \ |
| 227 | "cp.b ${loadaddr} 104f0000 ${filesize}\0" \ |
wdenk | 3dd7f0f | 2005-04-04 23:43:44 +0000 | [diff] [blame] | 228 | "cramfsimage=cramfs_cmc-pu2.img\0" \ |
| 229 | "jffsimage=jffs2_cmc-pu2.img\0" \ |
| 230 | "loadfile=u-boot_cmc-pu2.bin\0" \ |
| 231 | "bootfile=uImage_cmc-pu2\0" \ |
| 232 | "loadaddr=0x20800000\0" \ |
| 233 | "hostname=CMC-TC-PU2\0" \ |
| 234 | "bootcmd=run dhcp_start;run flash_cramfs\0" \ |
| 235 | "autoload=n\0" \ |
| 236 | "dhcp_start=echo no DHCP\0" \ |
| 237 | "ipaddr=192.168.0.190\0" |
wdenk | 45ea3fc | 2004-12-14 23:28:24 +0000 | [diff] [blame] | 238 | #endif /* __CONFIG_H */ |