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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Enric Balletbo i Serra8a3f6bb2010-10-14 16:54:59 -04002/*
3 * (C) Copyright 2010
4 * ISEE 2007 SL, <www.iseebcn.com>
Enric Balletbo i Serra8a3f6bb2010-10-14 16:54:59 -04005 */
6#include <common.h>
Simon Glass9fb625c2019-08-01 09:46:51 -06007#include <env.h>
Simon Glass691d7192020-05-10 11:40:02 -06008#include <init.h>
Simon Glass336d4612020-02-03 07:36:16 -07009#include <malloc.h>
Simon Glass90526e92020-05-10 11:39:56 -060010#include <net.h>
Enric Balletbo i Serraf3b4bc42015-01-28 15:01:32 +010011#include <status_led.h>
Simon Glassb3f4ca12014-10-22 21:37:15 -060012#include <dm.h>
13#include <ns16550.h>
Enric Balletbo i Serra8a3f6bb2010-10-14 16:54:59 -040014#include <twl4030.h>
Javier Martinez Canillas77eea282012-12-27 01:35:56 +000015#include <netdev.h>
Ladislav Michlfe9f6282016-07-12 20:28:34 +020016#include <spl.h>
Sanjeev Premi84c3b632011-09-08 10:51:01 -040017#include <asm/gpio.h>
Javier Martinez Canillas77eea282012-12-27 01:35:56 +000018#include <asm/io.h>
Enric Balletbo i Serra8a3f6bb2010-10-14 16:54:59 -040019#include <asm/arch/mem.h>
Enric Balletbo i Serraf49d7b62010-11-04 15:34:33 -040020#include <asm/arch/mmc_host_def.h>
Enric Balletbo i Serra8a3f6bb2010-10-14 16:54:59 -040021#include <asm/arch/mux.h>
22#include <asm/arch/sys_proto.h>
Simon Glassc05ed002020-05-10 11:40:11 -060023#include <linux/delay.h>
Ladislav Michla5debaa2016-07-12 20:28:33 +020024#include <linux/mtd/mtd.h>
Masahiro Yamada6ae39002017-11-30 13:45:24 +090025#include <linux/mtd/rawnand.h>
Ladislav Michl97ee7062016-07-12 20:28:31 +020026#include <linux/mtd/onenand.h>
27#include <jffs2/load_kernel.h>
Ladislav Michl568b4712017-01-09 11:21:06 +010028#include <mtd_node.h>
29#include <fdt_support.h>
Javier Martinez Canillas77eea282012-12-27 01:35:56 +000030#include "igep00x0.h"
Enric Balletbo i Serra8a3f6bb2010-10-14 16:54:59 -040031
Simon Glass8a8d24b2020-12-03 16:55:23 -070032static const struct ns16550_plat igep_serial = {
Adam Ford2f6ed3b2016-03-07 21:08:49 -060033 .base = OMAP34XX_UART3,
34 .reg_shift = 2,
Heiko Schocher17fa0322017-01-18 08:05:49 +010035 .clock = V_NS16550_CLK,
36 .fcr = UART_FCR_DEFVAL,
Simon Glassb3f4ca12014-10-22 21:37:15 -060037};
38
Simon Glass20e442a2020-12-28 20:34:54 -070039U_BOOT_DRVINFO(igep_uart) = {
Thomas Chouc7b96862015-11-19 21:48:12 +080040 "ns16550_serial",
Simon Glassb3f4ca12014-10-22 21:37:15 -060041 &igep_serial
42};
43
Pau Pajuelo195dc232017-08-17 03:09:14 +020044/*
45 * Routine: get_board_revision
46 * Description: GPIO_28 and GPIO_129 are used to read board and revision from
47 * IGEP00x0 boards. First of all, it is necessary to reset USB transceiver from
48 * IGEP0030 in order to read GPIO_IGEP00X0_BOARD_DETECTION correctly, because
49 * this functionality is shared by USB HOST.
50 * Once USB reset is applied, U-boot configures these pins as input pullup to
51 * detect board and revision:
52 * IGEP0020-RF = 0b00
53 * IGEP0020-RC = 0b01
54 * IGEP0030-RG = 0b10
55 * IGEP0030-RE = 0b11
56 */
57static int get_board_revision(void)
58{
59 int revision;
60
61 gpio_request(IGEP0030_USB_TRANSCEIVER_RESET,
62 "igep0030_usb_transceiver_reset");
63 gpio_direction_output(IGEP0030_USB_TRANSCEIVER_RESET, 0);
64
65 gpio_request(GPIO_IGEP00X0_BOARD_DETECTION, "igep00x0_board_detection");
66 gpio_direction_input(GPIO_IGEP00X0_BOARD_DETECTION);
67 revision = 2 * gpio_get_value(GPIO_IGEP00X0_BOARD_DETECTION);
68 gpio_free(GPIO_IGEP00X0_BOARD_DETECTION);
69
70 gpio_request(GPIO_IGEP00X0_REVISION_DETECTION,
71 "igep00x0_revision_detection");
72 gpio_direction_input(GPIO_IGEP00X0_REVISION_DETECTION);
73 revision = revision + gpio_get_value(GPIO_IGEP00X0_REVISION_DETECTION);
74 gpio_free(GPIO_IGEP00X0_REVISION_DETECTION);
75
76 gpio_free(IGEP0030_USB_TRANSCEIVER_RESET);
77
78 return revision;
79}
80
Ladislav Michl97ee7062016-07-12 20:28:31 +020081int onenand_board_init(struct mtd_info *mtd)
82{
83 if (gpmc_cs0_flash == MTD_DEV_TYPE_ONENAND) {
84 struct onenand_chip *this = mtd->priv;
85 this->base = (void *)CONFIG_SYS_ONENAND_BASE;
86 return 0;
87 }
88 return 1;
89}
90
Javier Martinez Canillas77eea282012-12-27 01:35:56 +000091#if defined(CONFIG_CMD_NET)
Ladislav Michl6ed75ba2016-01-04 23:07:59 +010092static void reset_net_chip(int gpio)
93{
94 if (!gpio_request(gpio, "eth nrst")) {
95 gpio_direction_output(gpio, 1);
96 udelay(1);
97 gpio_set_value(gpio, 0);
98 udelay(40);
99 gpio_set_value(gpio, 1);
100 mdelay(10);
101 }
102}
103
Enric Balletbo i Serra8a3f6bb2010-10-14 16:54:59 -0400104/*
105 * Routine: setup_net_chip
106 * Description: Setting up the configuration GPMC registers specific to the
107 * Ethernet hardware.
108 */
Enric Balletbo i Serra8a3f6bb2010-10-14 16:54:59 -0400109static void setup_net_chip(void)
110{
111 struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
Ladislav Michlb0c47632016-07-12 20:28:28 +0200112 static const u32 gpmc_lan_config[] = {
113 NET_LAN9221_GPMC_CONFIG1,
114 NET_LAN9221_GPMC_CONFIG2,
115 NET_LAN9221_GPMC_CONFIG3,
116 NET_LAN9221_GPMC_CONFIG4,
117 NET_LAN9221_GPMC_CONFIG5,
118 NET_LAN9221_GPMC_CONFIG6,
119 };
Enric Balletbo i Serra8a3f6bb2010-10-14 16:54:59 -0400120
Ladislav Michl6ed75ba2016-01-04 23:07:59 +0100121 enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5],
122 CONFIG_SMC911X_BASE, GPMC_SIZE_16M);
Enric Balletbo i Serra8a3f6bb2010-10-14 16:54:59 -0400123
124 /* Enable off mode for NWE in PADCONF_GPMC_NWE register */
125 writew(readw(&ctrl_base->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
126 /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
127 writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
128 /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
129 writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
130 &ctrl_base->gpmc_nadv_ale);
131
Ladislav Michl6ed75ba2016-01-04 23:07:59 +0100132 reset_net_chip(64);
Enric Balletbo i Serra8a3f6bb2010-10-14 16:54:59 -0400133}
Ladislav Michlb0c47632016-07-12 20:28:28 +0200134
Masahiro Yamadab75d8dc2020-06-26 15:13:33 +0900135int board_eth_init(struct bd_info *bis)
Ladislav Michlb0c47632016-07-12 20:28:28 +0200136{
137#ifdef CONFIG_SMC911X
138 return smc911x_initialize(0, CONFIG_SMC911X_BASE);
139#else
140 return 0;
141#endif
142}
Javier Martinez Canillas77eea282012-12-27 01:35:56 +0000143#else
144static inline void setup_net_chip(void) {}
Enric Balletbo i Serra8a3f6bb2010-10-14 16:54:59 -0400145#endif
146
Ladislav Michl568b4712017-01-09 11:21:06 +0100147#ifdef CONFIG_OF_BOARD_SETUP
Ladislav Michle4290aa2017-02-19 00:24:49 +0100148static int ft_enable_by_compatible(void *blob, char *compat, int enable)
149{
150 int off = fdt_node_offset_by_compatible(blob, -1, compat);
151 if (off < 0)
152 return off;
153
154 if (enable)
155 fdt_status_okay(blob, off);
156 else
157 fdt_status_disabled(blob, off);
158
159 return 0;
160}
161
Masahiro Yamadab75d8dc2020-06-26 15:13:33 +0900162int ft_board_setup(void *blob, struct bd_info *bd)
Ladislav Michl568b4712017-01-09 11:21:06 +0100163{
164#ifdef CONFIG_FDT_FIXUP_PARTITIONS
Masahiro Yamadab35fb6a2018-07-19 16:28:23 +0900165 static const struct node_info nodes[] = {
Ladislav Michl568b4712017-01-09 11:21:06 +0100166 { "ti,omap2-nand", MTD_DEV_TYPE_NAND, },
167 { "ti,omap2-onenand", MTD_DEV_TYPE_ONENAND, },
168 };
169
170 fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
171#endif
Ladislav Michle4290aa2017-02-19 00:24:49 +0100172 ft_enable_by_compatible(blob, "ti,omap2-nand",
173 gpmc_cs0_flash == MTD_DEV_TYPE_NAND);
174 ft_enable_by_compatible(blob, "ti,omap2-onenand",
175 gpmc_cs0_flash == MTD_DEV_TYPE_ONENAND);
176
Ladislav Michl568b4712017-01-09 11:21:06 +0100177 return 0;
178}
179#endif
180
Pau Pajuelo195dc232017-08-17 03:09:14 +0200181void set_led(void)
Javier Martinez Canillasa2fa28b2013-08-07 17:53:19 +0200182{
Pau Pajuelo195dc232017-08-17 03:09:14 +0200183 switch (get_board_revision()) {
184 case 0:
185 case 1:
186 gpio_request(IGEP0020_GPIO_LED, "igep0020_gpio_led");
187 gpio_direction_output(IGEP0020_GPIO_LED, 1);
Javier Martinez Canillasa2fa28b2013-08-07 17:53:19 +0200188 break;
Pau Pajuelo195dc232017-08-17 03:09:14 +0200189 case 2:
190 case 3:
191 gpio_request(IGEP0030_GPIO_LED, "igep0030_gpio_led");
192 gpio_direction_output(IGEP0030_GPIO_LED, 0);
193 break;
194 default:
195 /* Should not happen... */
Javier Martinez Canillasa2fa28b2013-08-07 17:53:19 +0200196 break;
197 }
198}
199
Pau Pajuelo195dc232017-08-17 03:09:14 +0200200void set_boardname(void)
201{
202 char rev[5] = { 'F','C','G','E', };
203 int i = get_board_revision();
204
205 rev[i+1] = 0;
206 env_set("board_rev", rev + i);
207 env_set("board_name", i < 2 ? "igep0020" : "igep0030");
208}
209
Enric Balletbo i Serra8a3f6bb2010-10-14 16:54:59 -0400210/*
211 * Routine: misc_init_r
212 * Description: Configure board specific parts
213 */
214int misc_init_r(void)
215{
Pau Pajuelo195dc232017-08-17 03:09:14 +0200216 t2_t *t2_base = (t2_t *)T2_BASE;
217 u32 pbias_lite;
218
Enric Balletbo i Serra8a3f6bb2010-10-14 16:54:59 -0400219 twl4030_power_init();
220
Pau Pajuelo195dc232017-08-17 03:09:14 +0200221 /* set VSIM to 1.8V */
222 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VSIM_DEDICATED,
223 TWL4030_PM_RECEIVER_VSIM_VSEL_18,
224 TWL4030_PM_RECEIVER_VSIM_DEV_GRP,
225 TWL4030_PM_RECEIVER_DEV_GRP_P1);
226
227 /* set up dual-voltage GPIOs to 1.8V */
228 pbias_lite = readl(&t2_base->pbias_lite);
229 pbias_lite &= ~PBIASLITEVMODE1;
230 pbias_lite |= PBIASLITEPWRDNZ1;
231 writel(pbias_lite, &t2_base->pbias_lite);
232 if (get_cpu_family() == CPU_OMAP36XX)
233 writel(readl(OMAP34XX_CTRL_WKUP_CTRL) |
234 OMAP34XX_CTRL_WKUP_CTRL_GPIO_IO_PWRDNZ,
235 OMAP34XX_CTRL_WKUP_CTRL);
236
Enric Balletbo i Serra8a3f6bb2010-10-14 16:54:59 -0400237 setup_net_chip();
Enric Balletbo i Serra8a3f6bb2010-10-14 16:54:59 -0400238
Paul Kocialkowski679f82c2015-08-27 19:37:13 +0200239 omap_die_id_display();
Enric Balletbo i Serra8a3f6bb2010-10-14 16:54:59 -0400240
Pau Pajuelo195dc232017-08-17 03:09:14 +0200241 set_led();
242
243 set_boardname();
Javier Martinez Canillasa2fa28b2013-08-07 17:53:19 +0200244
Enric Balletbo i Serra8a3f6bb2010-10-14 16:54:59 -0400245 return 0;
246}
247
Ladislav Michla5debaa2016-07-12 20:28:33 +0200248void board_mtdparts_default(const char **mtdids, const char **mtdparts)
249{
250 struct mtd_info *mtd = get_mtd_device(NULL, 0);
251 if (mtd) {
252 static char ids[24];
253 static char parts[48];
254 const char *linux_name = "omap2-nand";
255 if (strncmp(mtd->name, "onenand0", 8) == 0)
256 linux_name = "omap2-onenand";
257 snprintf(ids, sizeof(ids), "%s=%s", mtd->name, linux_name);
258 snprintf(parts, sizeof(parts), "mtdparts=%s:%dk(SPL),-(UBI)",
259 linux_name, 4 * mtd->erasesize >> 10);
260 *mtdids = ids;
261 *mtdparts = parts;
262 }
263}