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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
wdenk2262cfe2002-11-18 00:14:45 +00002/*
Bin Mengfe0c33a2014-12-12 21:05:22 +08003 * U-Boot - x86 Startup Code
wdenk2262cfe2002-11-18 00:14:45 +00004 *
Simon Glass08deb6d2019-09-25 08:11:44 -06005 * This is always the first code to run from the U-Boot source. To spell it out:
6 *
7 * 1. When TPL (Tertiary Program Loader) is enabled, the boot flow is
8 * TPL->SPL->U-Boot and this file is used for TPL. Then start_from_tpl.S is used
9 * for SPL and start_from_spl.S is used for U-Boot proper.
10 *
11 * 2. When SPL (Secondary Program Loader) is enabled, but not TPL, the boot
12 * flow is SPL->U-Boot and this file is used for SPL. Then start_from_spl.S is
13 * used for U-Boot proper.
14 *
15 * 3. When neither TPL nor SPL is used, this file is used for U-Boot proper.
16 *
Graeme Russdbf71152011-04-13 19:43:26 +100017 * (C) Copyright 2008-2011
18 * Graeme Russ, <graeme.russ@gmail.com>
19 *
20 * (C) Copyright 2002
Albert ARIBAUDfa82f872011-08-04 18:45:45 +020021 * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
wdenk2262cfe2002-11-18 00:14:45 +000022 */
23
wdenk2262cfe2002-11-18 00:14:45 +000024#include <config.h>
Graeme Russ161b3582010-10-07 20:03:29 +110025#include <asm/global_data.h>
Simon Glassd1cd0452014-11-12 22:42:09 -070026#include <asm/post.h>
Graeme Russ109ad142011-12-31 10:24:36 +110027#include <asm/processor.h>
Graeme Russ0c24c9c2011-02-12 15:11:32 +110028#include <asm/processor-flags.h>
Graeme Russ9e6c5722011-12-31 22:58:15 +110029#include <generated/generic-asm-offsets.h>
Bin Mengfe0c33a2014-12-12 21:05:22 +080030#include <generated/asm-offsets.h>
Bin Meng3d2be802018-10-25 03:05:37 -070031#include <linux/linkage.h>
wdenk2262cfe2002-11-18 00:14:45 +000032
Alexander Graf7e21fbc2018-06-12 07:48:37 +020033.section .text.start
wdenk2262cfe2002-11-18 00:14:45 +000034.code32
35.globl _start
wdenk8bde7f72003-06-27 21:31:46 +000036.type _start, @function
Graeme Russfea25722011-04-13 19:43:28 +100037.globl _x86boot_start
38_x86boot_start:
Graeme Russ077e1952010-04-24 00:05:42 +100039 /*
Simon Glassda3a95d2015-07-31 09:31:25 -060040 * This is the fail-safe 32-bit bootstrap entry point.
41 *
42 * This code is used when booting from another boot loader like
43 * coreboot or EFI. So we repeat some of the same init found in
44 * start16.
Graeme Russ077e1952010-04-24 00:05:42 +100045 */
46 cli
47 cld
48
Graeme Russ2f0e0cd2011-11-08 02:33:23 +000049 /* Turn off cache (this might require a 486-class CPU) */
Graeme Russ077e1952010-04-24 00:05:42 +100050 movl %cr0, %eax
Graeme Russ0c24c9c2011-02-12 15:11:32 +110051 orl $(X86_CR0_NW | X86_CR0_CD), %eax
Graeme Russ077e1952010-04-24 00:05:42 +100052 movl %eax, %cr0
53 wbinvd
54
Simon Glass42fde3052015-08-04 12:33:57 -060055 /*
56 * Zero the BIST (Built-In Self Test) value since we don't have it.
57 * It must be 0 or the previous loader would have reported an error.
58 */
59 movl $0, %ebp
60
Gabe Black91d82a22012-11-03 11:41:28 +000061 jmp 1f
Simon Glass83ec7de2015-07-31 09:31:28 -060062
63 /* Add a way for tools to discover the _start entry point */
64 .align 4
65 .long 0x12345678
wdenk8bde7f72003-06-27 21:31:46 +000066_start:
Stefan Roese8ad01ce2019-08-16 14:45:28 +020067 /* This is the 32-bit cold-reset entry point, coming from start16 */
Simon Glass42fde3052015-08-04 12:33:57 -060068
Simon Glassf67cd512014-11-06 13:20:10 -070069 /* Save BIST */
70 movl %eax, %ebp
Simon Glass42fde3052015-08-04 12:33:57 -0600711:
72
73 /* Save table pointer */
74 movl %ecx, %esi
Graeme Russ077e1952010-04-24 00:05:42 +100075
Andy Shevchenko446d4e02017-02-05 16:52:00 +030076#ifdef CONFIG_X86_LOAD_FROM_32_BIT
Simon Glasse5aa8a92016-03-16 07:44:40 -060077 lgdt gdt_ptr2
78#endif
79
Simon Glassda3a95d2015-07-31 09:31:25 -060080 /* Load the segement registers to match the GDT loaded in start16.S */
Graeme Russ109ad142011-12-31 10:24:36 +110081 movl $(X86_GDT_ENTRY_32BIT_DS * X86_GDT_ENTRY_SIZE), %eax
Graeme Russ8ffb2e82010-10-07 20:03:21 +110082 movw %ax, %fs
83 movw %ax, %ds
84 movw %ax, %gs
85 movw %ax, %es
86 movw %ax, %ss
wdenk8bde7f72003-06-27 21:31:46 +000087
Mike Williams16263082011-07-22 04:01:30 +000088 /* Clear the interrupt vectors */
Graeme Russ077e1952010-04-24 00:05:42 +100089 lidt blank_idt_ptr
90
Simon Glassda3a95d2015-07-31 09:31:25 -060091 /*
92 * Critical early platform init - generally not used, we prefer init
93 * to happen later when we have a console, in case something goes
94 * wrong.
95 */
wdenk2262cfe2002-11-18 00:14:45 +000096 jmp early_board_init
Graeme Russ88fa0a62010-10-07 20:03:27 +110097.globl early_board_init_ret
wdenk2262cfe2002-11-18 00:14:45 +000098early_board_init_ret:
Simon Glassd1cd0452014-11-12 22:42:09 -070099 post_code(POST_START)
wdenk8bde7f72003-06-27 21:31:46 +0000100
Graeme Russed4cba72011-02-12 15:11:52 +1100101 /* Initialise Cache-As-RAM */
102 jmp car_init
103.globl car_init_ret
104car_init_ret:
Simon Glass6172e942019-09-25 08:11:43 -0600105#ifdef CONFIG_USE_CAR
Graeme Russed4cba72011-02-12 15:11:52 +1100106 /*
107 * We now have CONFIG_SYS_CAR_SIZE bytes of Cache-As-RAM (or SRAM,
108 * or fully initialised SDRAM - we really don't care which)
109 * starting at CONFIG_SYS_CAR_ADDR to be used as a temporary stack
Simon Glassda3a95d2015-07-31 09:31:25 -0600110 * and early malloc() area. The MRC requires some space at the top.
Simon Glass76f90f32014-11-06 13:20:04 -0700111 *
112 * Stack grows down from top of CAR. We have:
113 *
114 * top-> CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE
Simon Glass65dd74a2014-11-12 22:42:28 -0700115 * MRC area
Simon Glassf0c7d9c2015-08-10 20:44:32 -0600116 * global_data with x86 global descriptor table
Simon Glass76f90f32014-11-06 13:20:04 -0700117 * early malloc area
118 * stack
119 * bottom-> CONFIG_SYS_CAR_ADDR
Graeme Russed4cba72011-02-12 15:11:52 +1100120 */
Simon Glass65dd74a2014-11-12 22:42:28 -0700121 movl $(CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE - 4), %esp
122#ifdef CONFIG_DCACHE_RAM_MRC_VAR_SIZE
123 subl $CONFIG_DCACHE_RAM_MRC_VAR_SIZE, %esp
124#endif
Bin Mengbceb9f02014-12-12 21:05:31 +0800125#else
126 /*
Bin Meng48aa6c22015-08-20 06:40:20 -0700127 * U-Boot enters here twice. For the first time it comes from
128 * car_init_done() with esp points to a temporary stack and esi
129 * set to zero. For the second time it comes from fsp_init_done()
130 * with esi holding the HOB list address returned by the FSP.
Bin Mengbceb9f02014-12-12 21:05:31 +0800131 */
132#endif
Simon Glassf0c7d9c2015-08-10 20:44:32 -0600133 /* Set up global data */
134 mov %esp, %eax
Albert ARIBAUDecc30662015-11-25 17:56:32 +0100135 call board_init_f_alloc_reserve
Simon Glassf0c7d9c2015-08-10 20:44:32 -0600136 mov %eax, %esp
Albert ARIBAUDecc30662015-11-25 17:56:32 +0100137 call board_init_f_init_reserve
Graeme Russ8d616252012-11-27 15:38:36 +0000138
Simon Glass60994a02015-10-18 19:51:26 -0600139#ifdef CONFIG_DEBUG_UART
140 call debug_uart_init
141#endif
Simon Glassbbbe55f2015-08-02 18:07:21 -0600142
Simon Glassf0c7d9c2015-08-10 20:44:32 -0600143 /* Get address of global_data */
144 mov %fs:0, %edx
Simon Glass6172e942019-09-25 08:11:43 -0600145#if defined(CONFIG_USE_HOB) && !defined(CONFIG_USE_CAR)
Simon Glassf0c7d9c2015-08-10 20:44:32 -0600146 /* Store the HOB list if we have one */
Bin Mengaefaff82015-06-07 11:33:14 +0800147 test %esi, %esi
148 jz skip_hob
Simon Glassf0c7d9c2015-08-10 20:44:32 -0600149 movl %esi, GD_HOB_LIST(%edx)
Bin Mengbceb9f02014-12-12 21:05:31 +0800150
Park, Aiden544293f2019-08-03 08:30:12 +0000151#ifdef CONFIG_HAVE_FSP
Bin Meng57b10f52015-08-20 06:40:19 -0700152 /*
153 * After fsp_init() returns, the stack has already been switched to a
154 * place within system memory as defined by CONFIG_FSP_TEMP_RAM_ADDR.
155 * Enlarge the size of malloc() pool before relocation since we have
156 * plenty of memory now.
157 */
158 subl $CONFIG_FSP_SYS_MALLOC_F_LEN, %esp
159 movl %esp, GD_MALLOC_BASE(%edx)
Park, Aiden544293f2019-08-03 08:30:12 +0000160#endif
Bin Mengaefaff82015-06-07 11:33:14 +0800161skip_hob:
Simon Glass42fde3052015-08-04 12:33:57 -0600162#else
163 /* Store table pointer */
Simon Glassf0c7d9c2015-08-10 20:44:32 -0600164 movl %esi, GD_TABLE(%edx)
Bin Mengaefaff82015-06-07 11:33:14 +0800165#endif
Simon Glassf0c7d9c2015-08-10 20:44:32 -0600166 /* Store BIST */
167 movl %ebp, GD_BIST(%edx)
Graeme Russ9e6c5722011-12-31 22:58:15 +1100168
Graeme Russ96cd6642011-02-12 15:11:54 +1100169 /* Set parameter to board_init_f() to boot flags */
Simon Glassd1cd0452014-11-12 22:42:09 -0700170 post_code(POST_START_DONE)
Graeme Russdbf71152011-04-13 19:43:26 +1000171 xorl %eax, %eax
Graeme Russ161b3582010-10-07 20:03:29 +1100172
Simon Glassda3a95d2015-07-31 09:31:25 -0600173 /* Enter, U-Boot! */
Graeme Russdbf71152011-04-13 19:43:26 +1000174 call board_init_f
wdenk2262cfe2002-11-18 00:14:45 +0000175
176 /* indicate (lack of) progress */
wdenk8bde7f72003-06-27 21:31:46 +0000177 movw $0x85, %ax
Graeme Russfb002902011-02-12 15:11:58 +1100178 jmp die
179
Graeme Russf48dd6f2012-01-01 15:06:39 +1100180.globl board_init_f_r_trampoline
181.type board_init_f_r_trampoline, @function
182board_init_f_r_trampoline:
Graeme Russfb002902011-02-12 15:11:58 +1100183 /*
184 * SDRAM has been initialised, U-Boot code has been copied into
185 * RAM, BSS has been cleared and relocation adjustments have been
186 * made. It is now time to jump into the in-RAM copy of U-Boot
187 *
Graeme Russf48dd6f2012-01-01 15:06:39 +1100188 * %eax = Address of top of new stack
Graeme Russfb002902011-02-12 15:11:58 +1100189 */
190
Graeme Russ8d616252012-11-27 15:38:36 +0000191 /* Stack grows down from top of SDRAM */
Graeme Russfb002902011-02-12 15:11:58 +1100192 movl %eax, %esp
193
Simon Glassf0c7d9c2015-08-10 20:44:32 -0600194 /* See if we need to disable CAR */
Simon Glass801d70c2015-01-01 16:18:13 -0700195 call car_uninit
Bin Meng3d2be802018-10-25 03:05:37 -0700196
Simon Glassda3a95d2015-07-31 09:31:25 -0600197 /* Re-enter U-Boot by calling board_init_f_r() */
Graeme Russf48dd6f2012-01-01 15:06:39 +1100198 call board_init_f_r
Graeme Russfb002902011-02-12 15:11:58 +1100199
Simon Glass49dffb72019-05-02 10:52:27 -0600200#ifdef CONFIG_TPL
201.globl jump_to_spl
202.type jump_to_spl, @function
203jump_to_spl:
204 /* Reset stack to the top of CAR space */
205 movl $(CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE - 4), %esp
206#ifdef CONFIG_DCACHE_RAM_MRC_VAR_SIZE
207 subl $CONFIG_DCACHE_RAM_MRC_VAR_SIZE, %esp
208#endif
209
210 jmp *%eax
211#endif
212
Graeme Russ2f0e0cd2011-11-08 02:33:23 +0000213die:
214 hlt
wdenk2262cfe2002-11-18 00:14:45 +0000215 jmp die
wdenk8bde7f72003-06-27 21:31:46 +0000216 hlt
Graeme Russ077e1952010-04-24 00:05:42 +1000217
Bin Meng3d2be802018-10-25 03:05:37 -0700218WEAK(car_uninit)
219 ret
220ENDPROC(car_uninit)
221
Graeme Russ077e1952010-04-24 00:05:42 +1000222blank_idt_ptr:
223 .word 0 /* limit */
224 .long 0 /* base */
Graeme Russa206cc22011-11-08 02:33:19 +0000225
226 .p2align 2 /* force 4-byte alignment */
227
Simon Glassda3a95d2015-07-31 09:31:25 -0600228 /* Add a multiboot header so U-Boot can be loaded by GRUB2 */
Graeme Russa206cc22011-11-08 02:33:19 +0000229multiboot_header:
230 /* magic */
Simon Glassda3a95d2015-07-31 09:31:25 -0600231 .long 0x1badb002
Graeme Russa206cc22011-11-08 02:33:19 +0000232 /* flags */
233 .long (1 << 16)
234 /* checksum */
235 .long -0x1BADB002 - (1 << 16)
236 /* header addr */
237 .long multiboot_header - _x86boot_start + CONFIG_SYS_TEXT_BASE
238 /* load addr */
239 .long CONFIG_SYS_TEXT_BASE
240 /* load end addr */
241 .long 0
242 /* bss end addr */
243 .long 0
244 /* entry addr */
245 .long CONFIG_SYS_TEXT_BASE
Simon Glasse5aa8a92016-03-16 07:44:40 -0600246
Andy Shevchenko446d4e02017-02-05 16:52:00 +0300247#ifdef CONFIG_X86_LOAD_FROM_32_BIT
Simon Glasse5aa8a92016-03-16 07:44:40 -0600248 /*
249 * The following Global Descriptor Table is just enough to get us into
250 * 'Flat Protected Mode' - It will be discarded as soon as the final
251 * GDT is setup in a safe location in RAM
252 */
253gdt_ptr2:
254 .word 0x1f /* limit (31 bytes = 4 GDT entries - 1) */
255 .long gdt_rom2 /* base */
256
257 /* Some CPUs are picky about GDT alignment... */
258 .align 16
259.globl gdt_rom2
260gdt_rom2:
261 /*
262 * The GDT table ...
263 *
264 * Selector Type
265 * 0x00 NULL
266 * 0x08 Unused
267 * 0x10 32bit code
268 * 0x18 32bit data/stack
269 */
270 /* The NULL Desciptor - Mandatory */
271 .word 0x0000 /* limit_low */
272 .word 0x0000 /* base_low */
273 .byte 0x00 /* base_middle */
274 .byte 0x00 /* access */
275 .byte 0x00 /* flags + limit_high */
276 .byte 0x00 /* base_high */
277
278 /* Unused Desciptor - (matches Linux) */
279 .word 0x0000 /* limit_low */
280 .word 0x0000 /* base_low */
281 .byte 0x00 /* base_middle */
282 .byte 0x00 /* access */
283 .byte 0x00 /* flags + limit_high */
284 .byte 0x00 /* base_high */
285
286 /*
287 * The Code Segment Descriptor:
288 * - Base = 0x00000000
289 * - Size = 4GB
290 * - Access = Present, Ring 0, Exec (Code), Readable
291 * - Flags = 4kB Granularity, 32-bit
292 */
293 .word 0xffff /* limit_low */
294 .word 0x0000 /* base_low */
295 .byte 0x00 /* base_middle */
296 .byte 0x9b /* access */
297 .byte 0xcf /* flags + limit_high */
298 .byte 0x00 /* base_high */
299
300 /*
301 * The Data Segment Descriptor:
302 * - Base = 0x00000000
303 * - Size = 4GB
304 * - Access = Present, Ring 0, Non-Exec (Data), Writable
305 * - Flags = 4kB Granularity, 32-bit
306 */
307 .word 0xffff /* limit_low */
308 .word 0x0000 /* base_low */
309 .byte 0x00 /* base_middle */
310 .byte 0x93 /* access */
311 .byte 0xcf /* flags + limit_high */
312 .byte 0x00 /* base_high */
313#endif