blob: d0380b33732d05c416fb708cf3acf7f0a54eb322 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Mingkai Huf3a8e2b2015-10-26 19:47:52 +08002/*
3 * Copyright (C) 2015 Freescale Semiconductor
Yangbo Lu34f39ce2021-06-03 10:51:19 +08004 * Copyright 2019-2021 NXP
Mingkai Huf3a8e2b2015-10-26 19:47:52 +08005 */
6
7#ifndef __LS1043A_COMMON_H
8#define __LS1043A_COMMON_H
9
Sumit Garg4139b172017-03-30 09:52:38 +053010/* SPL build */
11#ifdef CONFIG_SPL_BUILD
12#define SPL_NO_FMAN
13#define SPL_NO_DSPI
14#define SPL_NO_PCIE
15#define SPL_NO_ENV
16#define SPL_NO_MISC
17#define SPL_NO_USB
18#define SPL_NO_SATA
19#define SPL_NO_QE
20#define SPL_NO_EEPROM
21#endif
22#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT))
23#define SPL_NO_MMC
24#endif
Yangbo Lu3c7d6472017-09-15 09:51:58 +080025#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT_QSPI))
Sumit Garg4139b172017-03-30 09:52:38 +053026#define SPL_NO_IFC
27#endif
28
Bharat Bhushan5344c7b2017-03-22 12:06:27 +053029#include <asm/arch/stream_id_lsch2.h>
Mingkai Huf3a8e2b2015-10-26 19:47:52 +080030#include <asm/arch/config.h>
Mingkai Huf3a8e2b2015-10-26 19:47:52 +080031
32/* Link Definitions */
Mingkai Huf3a8e2b2015-10-26 19:47:52 +080033
Tom Rini65cc0e22022-11-16 13:10:41 -050034#define CFG_SYS_DDR_SDRAM_BASE 0x80000000
Tom Rini6cc04542022-10-28 20:27:13 -040035#define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
Tom Rini65cc0e22022-11-16 13:10:41 -050036#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE
37#define CFG_SYS_DDR_BLOCK2_BASE 0x880000000ULL
Mingkai Huf3a8e2b2015-10-26 19:47:52 +080038
Michael Walle3d3fe8b2020-06-01 21:53:26 +020039#define CPU_RELEASE_ADDR secondary_boot_addr
Hou Zhiqiang831c0682015-10-26 19:47:57 +080040
Mingkai Huf3a8e2b2015-10-26 19:47:52 +080041/* Serial Port */
Tom Rini91092132022-11-16 13:10:28 -050042#define CFG_SYS_NS16550_CLK (get_serial_clock())
Mingkai Huf3a8e2b2015-10-26 19:47:52 +080043
Gong Qianyuc7ca8b02015-10-26 19:47:56 +080044/* SD boot SPL */
45#ifdef CONFIG_SD_BOOT
Udit Agarwal5536c3c2019-11-07 16:11:32 +000046#ifdef CONFIG_NXP_ESBC
Ruchika Gupta70f96612017-04-17 18:07:17 +053047#define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
48/*
49 * HDR would be appended at end of image and copied to DDR along
50 * with U-Boot image. Here u-boot max. size is 512K. So if binary
51 * size increases then increase this size in case of secure boot as
52 * it uses raw u-boot image instead of fit image.
53 */
Udit Agarwal5536c3c2019-11-07 16:11:32 +000054#endif /* ifdef CONFIG_NXP_ESBC */
Gong Qianyuc7ca8b02015-10-26 19:47:56 +080055#endif
56
Gong Qianyu3ad44722015-10-26 19:47:53 +080057/* NAND SPL */
58#ifdef CONFIG_NAND_BOOT
Tom Rini4e590942022-11-12 17:36:51 -050059#define CFG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE
60#define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
Ruchika Gupta762f92a2017-04-17 18:07:18 +053061
Udit Agarwal5536c3c2019-11-07 16:11:32 +000062#ifdef CONFIG_NXP_ESBC
Ruchika Gupta762f92a2017-04-17 18:07:18 +053063#define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
Udit Agarwal5536c3c2019-11-07 16:11:32 +000064#endif /* ifdef CONFIG_NXP_ESBC */
Ruchika Gupta762f92a2017-04-17 18:07:18 +053065
66#ifdef CONFIG_U_BOOT_HDR_SIZE
67/*
68 * HDR would be appended at end of image and copied to DDR along
69 * with U-Boot image. Here u-boot max. size is 512K. So if binary
70 * size increases then increase this size in case of secure boot as
71 * it uses raw u-boot image instead of fit image.
72 */
Ruchika Gupta762f92a2017-04-17 18:07:18 +053073#endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */
74
Gong Qianyu3ad44722015-10-26 19:47:53 +080075#endif
76
Biwen Libe7b6d52021-02-05 19:01:56 +080077/* GPIO */
Biwen Libe7b6d52021-02-05 19:01:56 +080078
Mingkai Huf3a8e2b2015-10-26 19:47:52 +080079/* IFC */
Sumit Garg4139b172017-03-30 09:52:38 +053080#ifndef SPL_NO_IFC
Rajesh Bhagatf71b5f12018-11-05 18:02:44 +000081#if defined(CONFIG_TFABOOT) || \
82 (!defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI))
Mingkai Huf3a8e2b2015-10-26 19:47:52 +080083/*
Tom Rini65cc0e22022-11-16 13:10:41 -050084 * CFG_SYS_FLASH_BASE has the final address (core view)
85 * CFG_SYS_FLASH_BASE_PHYS has the final address (IFC view)
86 * CFG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address
Simon Glass98463902022-10-20 18:22:39 -060087 * CONFIG_TEXT_BASE is linked to 0x60000000 for booting
Mingkai Huf3a8e2b2015-10-26 19:47:52 +080088 */
Tom Rini65cc0e22022-11-16 13:10:41 -050089#define CFG_SYS_FLASH_BASE 0x60000000
90#define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE
91#define CFG_SYS_FLASH_BASE_PHYS_EARLY 0x00000000
Gong Qianyu166ef1e2016-01-25 15:16:06 +080092#endif
Sumit Garg4139b172017-03-30 09:52:38 +053093#endif
Mingkai Huf3a8e2b2015-10-26 19:47:52 +080094
95/* I2C */
Mingkai Huf3a8e2b2015-10-26 19:47:52 +080096
Gong Qianyue0579a52016-01-25 15:16:05 +080097/* DSPI */
Gong Qianyue0579a52016-01-25 15:16:05 +080098
Shaohui Xiee8297342015-10-26 19:47:54 +080099/* FMan ucode */
Sumit Garg4139b172017-03-30 09:52:38 +0530100#ifndef SPL_NO_FMAN
Shaohui Xiee8297342015-10-26 19:47:54 +0800101#ifdef CONFIG_SYS_DPAA_FMAN
Tom Rini65cc0e22022-11-16 13:10:41 -0500102#define CFG_SYS_FM_MURAM_SIZE 0x60000
Shaohui Xiee8297342015-10-26 19:47:54 +0800103#endif
Sumit Garg4139b172017-03-30 09:52:38 +0530104#endif
Shaohui Xiee8297342015-10-26 19:47:54 +0800105
Mingkai Huf3a8e2b2015-10-26 19:47:52 +0800106/* Miscellaneous configurable options */
Mingkai Huf3a8e2b2015-10-26 19:47:52 +0800107
Mingkai Huf3a8e2b2015-10-26 19:47:52 +0800108#define HWCONFIG_BUFFER_SIZE 128
109
Sumit Garg4139b172017-03-30 09:52:38 +0530110#ifndef SPL_NO_MISC
Shengzhou Liu5ba909f2017-06-08 15:59:48 +0800111#define BOOT_TARGET_DEVICES(func) \
112 func(MMC, mmc, 0) \
Mian Yousaf Kaukab688cdf42019-01-29 16:38:40 +0100113 func(USB, usb, 0) \
114 func(DHCP, dhcp, na)
Shengzhou Liu5ba909f2017-06-08 15:59:48 +0800115#include <config_distro_bootcmd.h>
Shengzhou Liu5ba909f2017-06-08 15:59:48 +0800116
Mingkai Huf3a8e2b2015-10-26 19:47:52 +0800117/* Initial environment variables */
118#define CONFIG_EXTRA_ENV_SETTINGS \
119 "hwconfig=fsl_ddr:bank_intlv=auto\0" \
Mingkai Huf3a8e2b2015-10-26 19:47:52 +0800120 "fdt_high=0xffffffffffffffff\0" \
121 "initrd_high=0xffffffffffffffff\0" \
Vinitha Pillai-B572239b457cc2017-11-22 10:38:35 +0530122 "kernel_addr=0x61000000\0" \
Shengzhou Liu5ba909f2017-06-08 15:59:48 +0800123 "scriptaddr=0x80000000\0" \
Sumit Garg76bbf1c2017-06-05 23:51:51 +0530124 "scripthdraddr=0x80080000\0" \
Shengzhou Liu5ba909f2017-06-08 15:59:48 +0800125 "fdtheader_addr_r=0x80100000\0" \
126 "kernelheader_addr_r=0x80200000\0" \
127 "kernel_addr_r=0x81000000\0" \
Wen Heeb967b92018-11-20 16:55:25 +0800128 "kernel_start=0x1000000\0" \
129 "kernelheader_start=0x800000\0" \
Shengzhou Liu5ba909f2017-06-08 15:59:48 +0800130 "fdt_addr_r=0x90000000\0" \
131 "load_addr=0xa0000000\0" \
Manish Tomar507103f2020-11-05 14:08:55 +0530132 "kernelheader_addr=0x60600000\0" \
Qianyu Gongad6767b2016-03-15 16:35:57 +0800133 "kernel_size=0x2800000\0" \
Vinitha Pillai-B572239b457cc2017-11-22 10:38:35 +0530134 "kernelheader_size=0x40000\0" \
Shengzhou Liu1c8263d2017-11-09 17:57:55 +0800135 "kernel_addr_sd=0x8000\0" \
136 "kernel_size_sd=0x14000\0" \
Manish Tomar507103f2020-11-05 14:08:55 +0530137 "kernelhdr_addr_sd=0x3000\0" \
Vinitha Pillai-B572239b457cc2017-11-22 10:38:35 +0530138 "kernelhdr_size_sd=0x10\0" \
Shengzhou Liu5ba909f2017-06-08 15:59:48 +0800139 "console=ttyS0,115200\0" \
York Sun23af4842017-09-28 08:42:16 -0700140 "boot_os=y\0" \
Shengzhou Liu5ba909f2017-06-08 15:59:48 +0800141 BOOTENV \
142 "boot_scripts=ls1043ardb_boot.scr\0" \
Sumit Garg76bbf1c2017-06-05 23:51:51 +0530143 "boot_script_hdr=hdr_ls1043ardb_bs.out\0" \
Shengzhou Liu5ba909f2017-06-08 15:59:48 +0800144 "scan_dev_for_boot_part=" \
145 "part list ${devtype} ${devnum} devplist; " \
146 "env exists devplist || setenv devplist 1; " \
147 "for distro_bootpart in ${devplist}; do " \
148 "if fstype ${devtype} " \
149 "${devnum}:${distro_bootpart} " \
150 "bootfstype; then " \
151 "run scan_dev_for_boot; " \
152 "fi; " \
153 "done\0" \
Sumit Garg76bbf1c2017-06-05 23:51:51 +0530154 "boot_a_script=" \
155 "load ${devtype} ${devnum}:${distro_bootpart} " \
156 "${scriptaddr} ${prefix}${script}; " \
157 "env exists secureboot && load ${devtype} " \
158 "${devnum}:${distro_bootpart} " \
Vinitha V Pillai78c58082019-04-23 05:52:17 +0000159 "${scripthdraddr} ${prefix}${boot_script_hdr}; " \
160 "env exists secureboot " \
Sumit Garg76bbf1c2017-06-05 23:51:51 +0530161 "&& esbc_validate ${scripthdraddr};" \
162 "source ${scriptaddr}\0" \
Shengzhou Liu5ba909f2017-06-08 15:59:48 +0800163 "qspi_bootcmd=echo Trying load from qspi..;" \
164 "sf probe && sf read $load_addr " \
Wen He283e4ab2019-11-14 15:08:15 +0800165 "$kernel_start $kernel_size; env exists secureboot " \
166 "&& sf read $kernelheader_addr_r $kernelheader_start " \
Vinitha Pillai-B572239b457cc2017-11-22 10:38:35 +0530167 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
168 "bootm $load_addr#$board\0" \
Shengzhou Liu5ba909f2017-06-08 15:59:48 +0800169 "nor_bootcmd=echo Trying load from nor..;" \
170 "cp.b $kernel_addr $load_addr " \
Vinitha Pillai-B572239b457cc2017-11-22 10:38:35 +0530171 "$kernel_size; env exists secureboot " \
172 "&& cp.b $kernelheader_addr $kernelheader_addr_r " \
173 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
174 "bootm $load_addr#$board\0" \
Wen Heeb967b92018-11-20 16:55:25 +0800175 "nand_bootcmd=echo Trying load from NAND..;" \
176 "nand info; nand read $load_addr " \
177 "$kernel_start $kernel_size; env exists secureboot " \
178 "&& nand read $kernelheader_addr_r $kernelheader_start " \
179 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
180 "bootm $load_addr#$board\0" \
Shengzhou Liu1c8263d2017-11-09 17:57:55 +0800181 "sd_bootcmd=echo Trying load from SD ..;" \
182 "mmcinfo; mmc read $load_addr " \
183 "$kernel_addr_sd $kernel_size_sd && " \
Vinitha Pillai-B572239b457cc2017-11-22 10:38:35 +0530184 "env exists secureboot && mmc read $kernelheader_addr_r " \
185 "$kernelhdr_addr_sd $kernelhdr_size_sd " \
186 " && esbc_validate ${kernelheader_addr_r};" \
Shengzhou Liu1c8263d2017-11-09 17:57:55 +0800187 "bootm $load_addr#$board\0"
188
Shengzhou Liu5ba909f2017-06-08 15:59:48 +0800189
Rajesh Bhagatf71b5f12018-11-05 18:02:44 +0000190#ifdef CONFIG_TFABOOT
191#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \
192 "env exists secureboot && esbc_halt;"
193#define SD_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; " \
194 "env exists secureboot && esbc_halt;"
195#define IFC_NOR_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; " \
196 "env exists secureboot && esbc_halt;"
Pankit Garg1f3d7392018-12-27 04:37:53 +0000197#define IFC_NAND_BOOTCOMMAND "run distro_bootcmd; run nand_bootcmd; " \
198 "env exists secureboot && esbc_halt;"
Sumit Garg4139b172017-03-30 09:52:38 +0530199#endif
Rajesh Bhagatf71b5f12018-11-05 18:02:44 +0000200#endif
Mingkai Huf3a8e2b2015-10-26 19:47:52 +0800201
Simon Glass457e51c2017-05-17 08:23:10 -0600202#include <asm/arch/soc.h>
203
Mingkai Huf3a8e2b2015-10-26 19:47:52 +0800204#endif /* __LS1043A_COMMON_H */