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wdenk153d5112002-08-30 11:07:04 +00001/*
stroese8b1ccd82004-09-16 12:34:51 +00002 * (C) Copyright 2001-2004
wdenk153d5112002-08-30 11:07:04 +00003 * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include "ar405.h"
26#include <asm/processor.h>
27#include <command.h>
wdenk153d5112002-08-30 11:07:04 +000028
Wolfgang Denkd87080b2006-03-31 18:32:53 +020029DECLARE_GLOBAL_DATA_PTR;
30
wdenk8bde7f72003-06-27 21:31:46 +000031/*cmd_boot.c*/
32extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
stroese8b1ccd82004-09-16 12:34:51 +000033extern void lxt971_no_sleep(void);
wdenk153d5112002-08-30 11:07:04 +000034
35/* ------------------------------------------------------------------------- */
36
37#if 0
38#define FPGA_DEBUG
39#endif
40
41/* fpga configuration data - generated by bin2cc */
42const unsigned char fpgadata[] = {
43#include "fpgadata.c"
44};
45
stroese8b1ccd82004-09-16 12:34:51 +000046const unsigned char fpgadata_xl30[] = {
47#include "fpgadata_xl30.c"
48};
49
wdenk153d5112002-08-30 11:07:04 +000050/*
51 * include common fpga code (for esd boards)
52 */
53#include "../common/fpga.c"
54
55
wdenkc837dcb2004-01-20 23:12:12 +000056int board_early_init_f (void)
wdenk153d5112002-08-30 11:07:04 +000057{
wdenk153d5112002-08-30 11:07:04 +000058 int index, len, i;
59 int status;
60
61#ifdef FPGA_DEBUG
62 /* set up serial port with default baudrate */
63 (void) get_clocks ();
64 gd->baudrate = CONFIG_BAUDRATE;
65 serial_init ();
66 console_init_f ();
67#endif
68
69 /*
70 * Boot onboard FPGA
71 */
stroese8b1ccd82004-09-16 12:34:51 +000072 /* first try 40er image */
73 gd->board_type = 40;
wdenk153d5112002-08-30 11:07:04 +000074 status = fpga_boot ((unsigned char *) fpgadata, sizeof (fpgadata));
75 if (status != 0) {
stroese8b1ccd82004-09-16 12:34:51 +000076 /* try xl30er image */
77 gd->board_type = 30;
78 status = fpga_boot ((unsigned char *) fpgadata_xl30, sizeof (fpgadata_xl30));
79 if (status != 0) {
80 /* booting FPGA failed */
wdenk153d5112002-08-30 11:07:04 +000081#ifndef FPGA_DEBUG
stroese8b1ccd82004-09-16 12:34:51 +000082 /* set up serial port with default baudrate */
83 (void) get_clocks ();
84 gd->baudrate = CONFIG_BAUDRATE;
85 serial_init ();
86 console_init_f ();
wdenk153d5112002-08-30 11:07:04 +000087#endif
stroese8b1ccd82004-09-16 12:34:51 +000088 printf ("\nFPGA: Booting failed ");
89 switch (status) {
90 case ERROR_FPGA_PRG_INIT_LOW:
91 printf ("(Timeout: INIT not low after asserting PROGRAM*)\n ");
92 break;
93 case ERROR_FPGA_PRG_INIT_HIGH:
94 printf ("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
95 break;
96 case ERROR_FPGA_PRG_DONE:
97 printf ("(Timeout: DONE not high after programming FPGA)\n ");
98 break;
99 }
wdenk153d5112002-08-30 11:07:04 +0000100
stroese8b1ccd82004-09-16 12:34:51 +0000101 /* display infos on fpgaimage */
102 index = 15;
103 for (i = 0; i < 4; i++) {
104 len = fpgadata[index];
105 printf ("FPGA: %s\n", &(fpgadata[index + 1]));
106 index += len + 3;
107 }
108 putc ('\n');
109 /* delayed reboot */
110 for (i = 20; i > 0; i--) {
111 printf ("Rebooting in %2d seconds \r", i);
112 for (index = 0; index < 1000; index++)
113 udelay (1000);
114 }
115 putc ('\n');
116 do_reset (NULL, 0, 0, NULL);
wdenk153d5112002-08-30 11:07:04 +0000117 }
wdenk153d5112002-08-30 11:07:04 +0000118 }
119
120 /*
121 * IRQ 0-15 405GP internally generated; active high; level sensitive
122 * IRQ 16 405GP internally generated; active low; level sensitive
123 * IRQ 17-24 RESERVED
124 * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
125 * IRQ 26 (EXT IRQ 1) CAN1; active low; level sensitive
126 * IRQ 27 (EXT IRQ 2) PCI SLOT 0; active low; level sensitive
127 * IRQ 28 (EXT IRQ 3) PCI SLOT 1; active low; level sensitive
128 * IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive
129 * IRQ 30 (EXT IRQ 5) PCI SLOT 3; active low; level sensitive
130 * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
131 */
132 mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
133 mtdcr (uicer, 0x00000000); /* disable all ints */
134 mtdcr (uiccr, 0x00000000); /* set all to be non-critical */
135 mtdcr (uicpr, 0xFFFFFF81); /* set int polarities */
136 mtdcr (uictr, 0x10000000); /* set int trigger levels */
137 mtdcr (uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */
138 mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
139
140 *(ushort *) 0xf03000ec = 0x0fff; /* enable all interrupts in fpga */
141
142 return 0;
143}
144
145
146/* ------------------------------------------------------------------------- */
147
148/*
149 * Check Board Identity:
150 */
151
152int checkboard (void)
153{
154 int index;
155 int len;
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200156 char str[64];
wdenk153d5112002-08-30 11:07:04 +0000157 int i = getenv_r ("serial#", str, sizeof (str));
stroese8b1ccd82004-09-16 12:34:51 +0000158 const unsigned char *fpga;
wdenk153d5112002-08-30 11:07:04 +0000159
160 puts ("Board: ");
161
stroese8b1ccd82004-09-16 12:34:51 +0000162 if (i == -1) {
163 puts ("### No HW ID - assuming AR405");
164 } else {
165 puts(str);
wdenk153d5112002-08-30 11:07:04 +0000166 }
167
wdenk153d5112002-08-30 11:07:04 +0000168 puts ("\nFPGA: ");
169
170 /* display infos on fpgaimage */
stroese8b1ccd82004-09-16 12:34:51 +0000171 if (gd->board_type == 30) {
172 fpga = fpgadata_xl30;
173 } else {
174 fpga = fpgadata;
175 }
wdenk153d5112002-08-30 11:07:04 +0000176 index = 15;
177 for (i = 0; i < 4; i++) {
stroese8b1ccd82004-09-16 12:34:51 +0000178 len = fpga[index];
179 printf ("%s ", &(fpga[index + 1]));
wdenk153d5112002-08-30 11:07:04 +0000180 index += len + 3;
181 }
182
183 putc ('\n');
184
stroese8b1ccd82004-09-16 12:34:51 +0000185 /*
186 * Disable sleep mode in LXT971
187 */
188 lxt971_no_sleep();
189
wdenk153d5112002-08-30 11:07:04 +0000190 return 0;
191}
192
193/* ------------------------------------------------------------------------- */
194
195long int initdram (int board_type)
196{
stroese8d3efe42004-12-16 18:30:36 +0000197 unsigned long val;
198
199 mtdcr(memcfga, mem_mb0cf);
200 val = mfdcr(memcfgd);
201
202 return (4*1024*1024 << ((val & 0x000e0000) >> 17));
wdenk153d5112002-08-30 11:07:04 +0000203}
204
205/* ------------------------------------------------------------------------- */
206
207int testdram (void)
208{
209 /* TODO: XXX XXX XXX */
210 printf ("test: 16 MB - ok\n");
211
212 return (0);
213}
214
stroese8d3efe42004-12-16 18:30:36 +0000215
216#if 1 /* test-only: some internal test routines... */
217/*
218 * Some test routines
219 */
220int do_digtest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
221{
222 volatile uchar *digen = (volatile uchar *)0xf03000b4;
223 volatile ushort *digout = (volatile ushort *)0xf03000b0;
224 volatile ushort *digin = (volatile ushort *)0xf03000a0;
225 int i;
226 int k;
227 int start;
228 int end;
229
230 if (argc != 3) {
231 puts("Usage: digtest n_start n_end (digtest 0 7)\n");
232 return 0;
233 }
234
235 start = simple_strtol (argv[1], NULL, 10);
236 end = simple_strtol (argv[2], NULL, 10);
237
238 /*
239 * Enable digital outputs
240 */
241 *digen = 0x08;
242
243 printf("\nStarting digital In-/Out Test from I/O %d to %d (Cntrl-C to abort)...\n",
244 start, end);
245
246 /*
247 * Set outputs one by one
248 */
249 for (;;) {
250 for (i=start; i<=end; i++) {
251 *digout = 0x0001 << i;
252 for (k=0; k<200; k++)
253 udelay(1000);
254
255 if (*digin != (0x0001 << i)) {
256 printf("ERROR: OUT=0x%04X, IN=0x%04X\n", 0x0001 << i, *digin);
257 return 0;
258 }
259
260 /* Abort if ctrl-c was pressed */
261 if (ctrlc()) {
262 puts("\nAbort\n");
263 return 0;
264 }
265 }
266 }
267
268 return 0;
269}
270U_BOOT_CMD(
271 digtest, 3, 1, do_digtest,
272 "digtest - Test digital in-/output\n",
273 NULL
274 );
275
276
277#define ERROR_DELTA 256
278
279struct io {
280 volatile short val;
281 short dummy;
282};
283
284int do_anatest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
285{
286 volatile short val;
287 int i;
288 int volt;
289 struct io *out;
290 struct io *in;
291
292 out = (struct io *)0xf0300090;
293 in = (struct io *)0xf0300000;
294
295 i = simple_strtol (argv[1], NULL, 10);
296
297 volt = 0;
298 printf("Setting Channel %d to %dV...\n", i, volt);
299 out[i].val = (volt * 0x7fff) / 10;
300 udelay(10000);
301 val = in[i*2].val;
302 printf("-> InChannel %d: 0x%04x=%dV\n", i*2, val, (val * 4000) / 0x7fff);
303 if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
304 (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
305 printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
306 ((volt * 0x7fff) / 40) + ERROR_DELTA);
307 return -1;
308 }
309 val = in[i*2+1].val;
310 printf("-> InChannel %d: 0x%04x=%dV\n", i*2+1, val, (val * 4000) / 0x7fff);
311 if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
312 (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
313 printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
314 ((volt * 0x7fff) / 40) + ERROR_DELTA);
315 return -1;
316 }
317
318 volt = 5;
319 printf("Setting Channel %d to %dV...\n", i, volt);
320 out[i].val = (volt * 0x7fff) / 10;
321 udelay(10000);
322 val = in[i*2].val;
323 printf("-> InChannel %d: 0x%04x=%dV\n", i*2, val, (val * 4000) / 0x7fff);
324 if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
325 (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
326 printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
327 ((volt * 0x7fff) / 40) + ERROR_DELTA);
328 return -1;
329 }
330 val = in[i*2+1].val;
331 printf("-> InChannel %d: 0x%04x=%dV\n", i*2+1, val, (val * 4000) / 0x7fff);
332 if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
333 (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
334 printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
335 ((volt * 0x7fff) / 40) + ERROR_DELTA);
336 return -1;
337 }
338
339 volt = 10;
340 printf("Setting Channel %d to %dV...\n", i, volt);
341 out[i].val = (volt * 0x7fff) / 10;
342 udelay(10000);
343 val = in[i*2].val;
344 printf("-> InChannel %d: 0x%04x=%dV\n", i*2, val, (val * 4000) / 0x7fff);
345 if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
346 (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
347 printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
348 ((volt * 0x7fff) / 40) + ERROR_DELTA);
349 return -1;
350 }
351 val = in[i*2+1].val;
352 printf("-> InChannel %d: 0x%04x=%dV\n", i*2+1, val, (val * 4000) / 0x7fff);
353 if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
354 (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
355 printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
356 ((volt * 0x7fff) / 40) + ERROR_DELTA);
357 return -1;
358 }
359
360 printf("Channel %d OK!\n", i);
361
362 return 0;
363}
364U_BOOT_CMD(
365 anatest, 2, 1, do_anatest,
366 "anatest - Test analog in-/output\n",
367 NULL
368 );
369
370
371int counter = 0;
372
373void cyclicInt(void *ptr)
374{
375 *(ushort *)0xf03000e8 = 0x0800; /* ack int */
376 counter++;
377}
378
379
380int do_inctest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
381{
382 volatile uchar *digout = (volatile uchar *)0xf03000b4;
383 volatile ulong *incin;
384 int i;
385
386 incin = (volatile ulong *)0xf0300040;
387
388 /*
389 * Clear inc counter
390 */
391 incin[0] = 0;
392 incin[1] = 0;
393 incin[2] = 0;
394 incin[3] = 0;
395
396 incin = (volatile ulong *)0xf0300050;
397
398 /*
399 * Inc a little
400 */
401 for (i=0; i<10000; i++) {
402 switch (i & 0x03) {
403 case 0:
404 *digout = 0x02;
405 break;
406 case 1:
407 *digout = 0x03;
408 break;
409 case 2:
410 *digout = 0x01;
411 break;
412 case 3:
413 *digout = 0x00;
414 break;
415 }
416 udelay(10);
417 }
418
419 printf("Inc 0 = %ld\n", incin[0]);
420 printf("Inc 1 = %ld\n", incin[1]);
421 printf("Inc 2 = %ld\n", incin[2]);
422 printf("Inc 3 = %ld\n", incin[3]);
423
424 *(ushort *)0xf03000e0 = 0x0c80-1; /* set counter */
425 *(ushort *)0xf03000ec |= 0x0800; /* enable int */
426 irq_install_handler (30, (interrupt_handler_t *) cyclicInt, NULL);
427 printf("counter=%d\n", counter);
428
429 return 0;
430}
431U_BOOT_CMD(
432 inctest, 3, 1, do_inctest,
433 "inctest - Test incremental encoder inputs\n",
434 NULL
435 );
436#endif